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* ConstantInt has some getters which return ConstantInt's or ConstantVector's ofNick Lewycky2011-03-062-28/+53
| | | | | | | | the value splatted into every element. Extend this to getTrue and getFalse which by providing new overloads that take Types that are either i1 or <N x i1>. Use it in InstCombine to add vector support to some code, fixing PR8469! llvm-svn: 127116
* lib/CodeGen/AsmPrinter/CMakeLists.txt: Fix CMake build, following up to r127099.NAKAMURA Takumi2011-03-061-0/+1
| | | | llvm-svn: 127114
* Disable a couple of experimental heuristics to get the best results from the ↵Andrew Trick2011-03-061-2/+2
| | | | | | current implementation of -pre-RA-sched=list-ilp. llvm-svn: 127113
* ARM assembler stuff is crazy: for .setfp positive values of offset ↵Anton Korobeynikov2011-03-051-3/+4
| | | | | | corresponds to "add" instruction, not to "sub" as in .pad case llvm-svn: 127106
* In Thumb1 mode the constant might be materialized via the load from ↵Anton Korobeynikov2011-03-052-5/+19
| | | | | | constpool. Emit unwinding information in case when this load from constpool is used to change the stack pointer in the prologue. llvm-svn: 127105
* Implement frame unwinding information emission for Thumb1. Not finished yet ↵Anton Korobeynikov2011-03-058-52/+82
| | | | | | because there is no way given the constpool index to examine the actual entry: the reason is clones inserted by constant island pass, which are not tracked at all! The only connection is done during asmprinting time via magic label names which is really gross and needs to be eventually fixed. llvm-svn: 127104
* Add unwind information emission for thumb stuffAnton Korobeynikov2011-03-051-3/+29
| | | | llvm-svn: 127103
* Handle MI flags inside Thumb2SizeReduction pass.Anton Korobeynikov2011-03-051-0/+9
| | | | llvm-svn: 127102
* Preliminary support for ARM frame save directives emission via MI flags.Anton Korobeynikov2011-03-0516-50/+208
| | | | | | | This is just very first approximation how the stuff should be done (e.g. ARM-only for now). More to follow. llvm-svn: 127101
* Some first rudimentary support for ARM EHABI: print exception table in "text ↵Anton Korobeynikov2011-03-058-1/+193
| | | | | | mode". llvm-svn: 127099
* Add FrameSetup MI flagsAnton Korobeynikov2011-03-051-10/+23
| | | | llvm-svn: 127098
* Work around a coalescer bug.Jakob Stoklund Olesen2011-03-052-4/+23
| | | | | | | | | | | | The coalescer can in very rare cases leave too large live intervals around after rematerializing cheap-as-a-move instructions. Linear scan doesn't really care, but live range splitting gets very confused when a live range is killed by a ghost instruction. I will fix this properly in the coalescer after 2.9 branches. llvm-svn: 127096
* Remove unused conditional negate operations.Bob Wilson2011-03-055-48/+0
| | | | llvm-svn: 127090
* InstCombine: We know the number of items initially added to the worklist ↵Benjamin Kramer2011-03-051-0/+1
| | | | | | map, reserve space early to avoid rehashing. llvm-svn: 127089
* ptx: add basic intrinsic supportChe-Liang Chiou2011-03-052-0/+39
| | | | llvm-svn: 127084
* Be explicit with abs(). Visual Studio workaround.Andrew Trick2011-03-051-4/+6
| | | | llvm-svn: 127075
* Fix for -sched-high-latency-cycles in sched=list-ilp mode.Andrew Trick2011-03-051-1/+3
| | | | llvm-svn: 127071
* Fix PR9398 - 10% of llc compile time is spent in Value::getNumUses. This reducesCameron Zwarich2011-03-051-7/+22
| | | | | | | the percentage of time spent in CodeGenPrepare when llcing 403.gcc from 12.6% to 1.8% of total llc time. llvm-svn: 127069
* Missing comment.Andrew Trick2011-03-051-0/+2
| | | | llvm-svn: 127068
* Increased the register pressure limit on x86_64 from 8 to 12Andrew Trick2011-03-055-30/+169
| | | | | | | | | | | | | | | | | | | | | | | regs. This is the only change in this checkin that may affects the default scheduler. With better register tracking and heuristics, it doesn't make sense to artificially lower the register limit so much. Added -sched-high-latency-cycles and X86InstrInfo::isHighLatencyDef to give the scheduler a way to account for div and sqrt on targets that don't have an itinerary. It is currently defaults to 10 (the actual number doesn't matter much), but only takes effect on non-default schedulers: list-hybrid and list-ilp. Added several heuristics that can be individually disabled for the non-default sched=list-ilp mode. This helps us determine how much better we can do on a given benchmark than the default scheduler. Certain compute intensive loops run much faster in this mode with the right set of heuristics, and it doesn't seem to have much negative impact elsewhere. Not all of the heuristics are needed, but we still need to experiment to decide which should be disabled by default for sched=list-ilp. llvm-svn: 127067
* whitespaceAndrew Trick2011-03-051-51/+51
| | | | llvm-svn: 127065
* Thread comparisons over udiv/sdiv/ashr/lshr exact and lshr nuw/nsw wheneverNick Lewycky2011-03-052-1/+54
| | | | | | | | | possible. This goes into instcombine and instsimplify because instsimplify doesn't need to check hasOneUse since it returns (almost exclusively) constants. This fixes PR9343 #4 #5 and #8! llvm-svn: 127064
* Try once again to optimize "icmp (srem X, Y), Y" by turning the comparison intoNick Lewycky2011-03-051-0/+29
| | | | | | true/false or "icmp slt/sge Y, 0". llvm-svn: 127063
* Rework the global split cost calculation.Jakob Stoklund Olesen2011-03-051-21/+30
| | | | | | | The global cost is the sum of block frequencies for spill code that must be inserted because preferences weren't met. llvm-svn: 127062
* Compute the constraints for global live range splitting from an interference ↵Jakob Stoklund Olesen2011-03-051-163/+67
| | | | | | | | | | | pattern. This simplifies the code and makes it faster too. The interference patterns are saved for each candidate register. It will be reused for actually executing the split. Work in progress. llvm-svn: 127054
* Teach the register scavenger to take subregs into account when finding a ↵Jim Grosbach2011-03-051-5/+10
| | | | | | free register. llvm-svn: 127049
* Support unregistering exception frames of functions when they are removed.Eric Christopher2011-03-042-6/+8
| | | | | | | | Patch by Johannes Schaub! Fixes PR8548 llvm-svn: 127047
* Improve readability with some whitespace!Eric Christopher2011-03-041-1/+1
| | | | llvm-svn: 127043
* Extract a method. No functional change.Jakob Stoklund Olesen2011-03-041-40/+52
| | | | llvm-svn: 127040
* Initialize variable.Bill Wendling2011-03-041-1/+1
| | | | llvm-svn: 127038
* Go back to comparing spill weights when deciding if interference can be evicted.Jakob Stoklund Olesen2011-03-041-9/+5
| | | | | | | It gives better results. Sometimes, a live range can be large and still have high spill weight. Such a range should not be spilled. llvm-svn: 127036
* Improve div/rem node handling on mips. Patch by Akira HatanakaBruno Cardoso Lopes2011-03-044-34/+80
| | | | llvm-svn: 127034
* Expands register/immediate pairs when the immediate is too large to fit in ↵Bruno Cardoso Lopes2011-03-043-8/+122
| | | | | | 16-bit field. Patch by Akira Hatanaka llvm-svn: 127032
* When decling to reuse existing expressions that involve casts, ignoreDan Gohman2011-03-041-1/+1
| | | | | | | bitcasts, which are really no-ops here. This fixes slowdowns on MultiSource/Applications/aha and others. llvm-svn: 127031
* Rewrite and simplify o32 vaarg passing, no functional changes. Patch by Sasa ↵Bruno Cardoso Lopes2011-03-041-37/+19
| | | | | | Stankovic llvm-svn: 127029
* Be nice to Xcore and the XMOS assembler and avoid quoting section namesJoerg Sonnenberger2011-03-041-12/+18
| | | | | | that contain only letters, digits and the characters "_" and ".". llvm-svn: 127028
* Lowers block address. Currently asserts when relocation model is not PIC. ↵Bruno Cardoso Lopes2011-03-045-1/+40
| | | | | | Patch by Akira Hatanaka llvm-svn: 127027
* raw_ostream: while it is generally desirable to do larger writes, it can lead toBenjamin Kramer2011-03-041-3/+7
| | | | | | | | | | inefficient file system buffering if the writes are not a multiple of the desired buffer size. Avoid this by limiting the large write to a multiple of the buffer size and copying the remainder into the buffer. Thanks to Dan for pointing this out. llvm-svn: 127026
* Renumber slot indexes locally when possible.Jakob Stoklund Olesen2011-03-041-2/+25
| | | | | | | | | | | | | Initially, slot indexes are quad-spaced. There is room for inserting up to 3 new instructions between the original instructions. When we run out of indexes between two instructions, renumber locally using double-spaced indexes. The original quad-spacing means that we catch up quickly, and we only have to renumber a handful of instructions to get a monotonic sequence. This is much faster than renumbering the whole function as we did before. llvm-svn: 127023
* Revert broken srem logic from r126991.Nick Lewycky2011-03-041-15/+0
| | | | llvm-svn: 127021
* Fix an old copy-n-pasteBruno Cardoso Lopes2011-03-041-2/+2
| | | | llvm-svn: 127020
* Disable ARMGlobalMerge on darwin. The debugger is not yet able to extract ↵Devang Patel2011-03-041-0/+6
| | | | | | individual variable's info from merged global. llvm-svn: 127019
* Expands FCOS and FSIN nodes when type is f64.Bruno Cardoso Lopes2011-03-041-0/+2
| | | | llvm-svn: 127017
* Number SlotIndexes uniformly without looking at the number of defs on each ↵Jakob Stoklund Olesen2011-03-041-24/+5
| | | | | | | | | | | | instruction. You can't really predict how many indexes will be needed from the number of defs, so let's keep it simple. Also remove an extra empty index that was inserted after each basic block. It was intended for live-out ranges, but it was never used that way. llvm-svn: 127014
* raw_ostream: If writing a string that is larger than the buffer, write it ↵Benjamin Kramer2011-03-041-9/+13
| | | | | | | | directly instead of doing many buffer-sized writes. This caps the number of write(2) calls per string to a maximum of 2. llvm-svn: 127010
* Add SlotIndex statistics.Jakob Stoklund Olesen2011-03-041-0/+4
| | | | llvm-svn: 127007
* Tweak debug output. No functional changes.Jakob Stoklund Olesen2011-03-042-10/+6
| | | | llvm-svn: 127006
* Fixes addc pattern when immediate cannot be represented with 16-bit. Patch ↵Bruno Cardoso Lopes2011-03-041-1/+1
| | | | | | by Akira Hatanaka llvm-svn: 127005
* Remove (hopefully) all trailing whitespaces from the mips backend. Patch by ↵Bruno Cardoso Lopes2011-03-0420-265/+265
| | | | | | Hatanaka, Akira llvm-svn: 127003
* Revert commit 126684 "Use the correct shift amount type". It is only the ↵Duncan Sands2011-03-041-1/+1
| | | | | | | | | | | correct type after type legalization has completed. Before then it may simply not be big enough to hold the shift amount, particularly on x86 which uses a very small type for shifts (this issue broke stuff in the past which is why LegalizeTypes carefully uses a large type for shift amounts). llvm-svn: 127000
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