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* New and improved comment.Andrew Trick2012-04-201-1/+1
| | | | llvm-svn: 155229
* SparseSet: Add support for key-derived indexes and arbitrary key types.Andrew Trick2012-04-202-3/+3
| | | | | | | | | | | | | | | | | | | This nicely handles the most common case of virtual register sets, but also handles anticipated cases where we will map pointers to IDs. The goal is not to develop a completely generic SparseSet template. Instead we want to handle the expected uses within llvm without any template antics in the client code. I'm adding a bit of template nastiness here, and some assumption about expected usage in order to make the client code very clean. The expected common uses cases I'm designing for: - integer keys that need to be reindexed, and may map to additional data - densely numbered objects where we want pointer keys because no number->object map exists. llvm-svn: 155227
* misched: initialize BBAndrew Trick2012-04-201-2/+4
| | | | llvm-svn: 155226
* ARM: Update NEON assembly two-operand aliases.Jim Grosbach2012-04-202-305/+14
| | | | | | | | Use the new TwoOperandAliasConstraint to handle lots of the two-operand aliases for NEON instructions. There's still more to go, but this is a good chunk of them. llvm-svn: 155210
* effectively back out my last change (r155190)Gabor Greif2012-04-201-2/+2
| | | | llvm-svn: 155195
* fix obviously bogus (IMO) operand index of the load in assertsGabor Greif2012-04-201-3/+3
| | | | | | | | | (load only has one operand) and smuggle in some whitespace changes too NB: I am obviously testing the water here, and believe that the unguarded cast is still wrong, but why is the getZExtValue of the load's operand tested against zero here? Any review is appreciated. llvm-svn: 155190
* Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change ↵Craig Topper2012-04-2031-296/+292
| | | | | | since they are equivalent. llvm-svn: 155188
* Convert some uses of XXXRegisterClass to &XXXRegClass. No functional change ↵Craig Topper2012-04-2012-245/+244
| | | | | | since they are equivalent. llvm-svn: 155186
* Revert r155136 "Defer some shl transforms to DAGCombine."Jakob Stoklund Olesen2012-04-201-35/+39
| | | | | | | | | While the patch was perfect and defect free, it exposed a really nasty bug in X86 SelectionDAG that caused an llc crash when compiling lencod. I'll put the patch back in after fixing the SelectionDAG problem. llvm-svn: 155181
* ARM some VFP tblgen'erated two-operand aliases.Jim Grosbach2012-04-201-16/+8
| | | | llvm-svn: 155178
* ARM let TableGen handle a few two-operand aliases.Jim Grosbach2012-04-191-121/+9
| | | | | | No need for these explicit aliases anymore. Nuke 'em. llvm-svn: 155173
* Put this expensive check below the less expensive ones.Bill Wendling2012-04-191-9/+9
| | | | llvm-svn: 155166
* Avoid a bug in the path count computation, preventing an infiniteDan Gohman2012-04-191-1/+1
| | | | | | loop repeatedlt making the same change. This is for rdar://11256239. llvm-svn: 155160
* Defer some shl transforms to DAGCombine.Jakob Stoklund Olesen2012-04-191-39/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The shl instruction is used to represent multiplication by a constant power of two as well as bitwise left shifts. Some InstCombine transformations would turn an shl instruction into a bit mask operation, making it difficult for later analysis passes to recognize the constsnt multiplication. Disable those shl transformations, deferring them to DAGCombine time. An 'shl X, C' instruction is now treated mostly the same was as 'mul X, C'. These transformations are deferred: (X >>? C) << C --> X & (-1 << C) (When X >> C has multiple uses) (X >>? C1) << C2 --> X << (C2-C1) & (-1 << C2) (When C2 > C1) (X >>? C1) << C2 --> X >>? (C1-C2) & (-1 << C2) (When C1 > C2) The corresponding exact transformations are preserved, just like div-exact + mul: (X >>?,exact C) << C --> X (X >>?,exact C1) << C2 --> X << (C2-C1) (X >>?,exact C1) << C2 --> X >>?,exact (C1-C2) The disabled transformations could also prevent the instruction selector from recognizing rotate patterns in hash functions and cryptographic primitives. I have a test case for that, but it is too fragile. llvm-svn: 155136
* zap tabsGabor Greif2012-04-191-7/+7
| | | | llvm-svn: 155128
* Allow targets to select the default scheduler by name.Andrew Trick2012-04-191-0/+13
| | | | llvm-svn: 155090
* Fixed the llvm-mv X86 disassembler so the 'C' API gets jumps properlyKevin Enderby2012-04-181-2/+5
| | | | | | | symbolicated. These have and operand type of TYPE_RELv which was not handled as isBranch in translateImmediate() in X86Disassembler.cpp. rdar://11268426 llvm-svn: 155074
* Don't crash on code where the user put __attribute__((constructor)) onDan Gohman2012-04-181-1/+5
| | | | | | a function with arguments. This fixes rdar://11265785. llvm-svn: 155073
* This reverts a long string of commits to the Hexagon backend. TheseChandler Carruth2012-04-1837-12093/+2017
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commits have had several major issues pointed out in review, and those issues are not being addressed in a timely fashion. Furthermore, this was all committed leading up to the v3.1 branch, and we don't need piles of code with outstanding issues in the branch. It is possible that not all of these commits were necessary to revert to get us back to a green state, but I'm going to let the Hexagon maintainer sort that out. They can recommit, in order, after addressing the feedback. Reverted commits, with some notes: Primary commit r154616: HexagonPacketizer - There are lots of review comments here. This is the primary reason for reverting. In particular, it introduced large amount of warnings due to a bad construct in tablegen. - Follow-up commits that should be folded back into this when reposting: - r154622: CMake fixes - r154660: Fix numerous build warnings in release builds. - Please don't resubmit this until the three commits above are included, and the issues in review addressed. Primary commit r154695: Pass to replace transfer/copy ... - Reverted to minimize merge conflicts. I'm not aware of specific issues with this patch. Primary commit r154703: New Value Jump. - Primarily reverted due to merge conflicts. - Follow-up commits that should be folded back into this when reposting: - r154703: Remove iostream usage - r154758: Fix CMake builds - r154759: Fix build warnings in release builds - Please incorporate these fixes and and review feedback before resubmitting. Primary commit r154829: Hexagon V5 (floating point) support. - Primarily reverted due to merge conflicts. - Follow-up commits that should be folded back into this when reposting: - r154841: Remove unused variable (fixing build warnings) There are also accompanying Clang commits that will be reverted for consistency. llvm-svn: 155047
* LiveIntervalUpdate validators weren't recorded after the calls to ↵Pete Cooper2012-04-181-6/+6
| | | | | | std::for_each. Turns out std::for_each doesn't update the variable passed in for the functor but instead copy constructs a new one. llvm-svn: 155041
* SourceMgr: Colorize diagnostics.Benjamin Kramer2012-04-181-7/+41
| | | | | | Same color scheme as clang uses. The colors are only enabled if the output is a tty. llvm-svn: 155035
* Mark instruction classes ArithLogicR, ArithLogicI and LoadUpper as ↵Akira Hatanaka2012-04-181-1/+5
| | | | | | isRematerializable. llvm-svn: 155031
* Delete blank line.Akira Hatanaka2012-04-181-1/+0
| | | | llvm-svn: 155030
* Fix copy/paste-o.Jim Grosbach2012-04-181-1/+1
| | | | llvm-svn: 155016
* TableGen add warning diagnostic helper functions.Jim Grosbach2012-04-181-0/+16
| | | | llvm-svn: 155012
* Added support for disassembling unpredictable swp/swpb ARM instructions.Silviu Baranga2012-04-183-2/+7
| | | | llvm-svn: 155004
* Fix the bahavior of the disassembler when decoding unpredictable mrs ↵Silviu Baranga2012-04-181-5/+15
| | | | | | instructions on ARM. Now the diasassembler emmits warnings instead of errors. llvm-svn: 155002
* Added support for unpredictable mcrr/mcrr2/mrrc/mrrc2 ARM instruction in the ↵Silviu Baranga2012-04-182-4/+36
| | | | | | disassembler. Since the upredicability conditions are complex, C++ code was added to handle them. llvm-svn: 155001
* Fixed decoding for the ARM cdp2 instruction. The restriction on the ↵Silviu Baranga2012-04-181-1/+6
| | | | | | coprocessor number was removed for this instruction. llvm-svn: 155000
* Add suport for unpredicatble cases of the cmp, tst, teq and cmnz ARM ↵Silviu Baranga2012-04-181-2/+10
| | | | | | instructions in the disassembler. llvm-svn: 154999
* SmallPtrSet: Reuse DenseMapInfo's pointer hash function instead of inventing ↵Benjamin Kramer2012-04-181-1/+2
| | | | | | | | | | a bad one ourselves. DenseMap's hash function uses slightly more entropy and reduces hash collisions significantly. I also experimented with Hashing.h, but it didn't gave a lot of improvement while being much more expensive to compute. llvm-svn: 154996
* Use a heavy hammer to fix PR12573.Bill Wendling2012-04-181-0/+9
| | | | | | | | | | | If the loop contains invoke instructions, whose unwind edge escapes the loop, then don't try to unswitch the loop. Doing so may cause the unwind edge to be split, which not only is non-trivial but doesn't preserve loop simplify information. Fixes PR12573 llvm-svn: 154987
* Remove AVX vpermil intrinsics. I removed their uses from clang headers and ↵Craig Topper2012-04-182-11/+38
| | | | | | builtins a while back. llvm-svn: 154985
* loop-reduce: Add an early bailout to catch extremely large loops.Andrew Trick2012-04-181-0/+17
| | | | | | | | | | | | | | This introduces a threshold of 200 IV Users, which is very conservative but should be sufficient to avoid serious compile time sink or stack overflow. The llvm test-suite with LTO never exceeds 190 users per loop. The bug doesn't relate to a specific type of loop. Checking in an arbitrary giant loop as a unit test would be silly. Fixes rdar://11262507. llvm-svn: 154983
* fix error check in assertSeth Cantrell2012-04-181-1/+1
| | | | llvm-svn: 154971
* C++ has newlines at the end of files (including include files).David Blaikie2012-04-171-1/+1
| | | | llvm-svn: 154962
* fix pr12559: mark unavailable win32 math libcallsJoe Groff2012-04-172-16/+89
| | | | | | also fix SimplifyLibCalls to use TLI rather than compile-time conditionals to enable optimizations on floor, ceil, round, rint, and nearbyint llvm-svn: 154960
* Fixes a problem in instruction selection with testing whether or not the Joel Jones2012-04-171-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | transformation: (X op C1) ^ C2 --> (X op C1) & ~C2 iff (C1&C2) == C2 should be done. This change has been tested: Using a debug+asserts build: on the specific test case that brought this bug to light make check-all lnt nt using this clang to build a release version of clang Using the release+asserts clang-with-clang build: on the specific test case that brought this bug to light make check-all lnt nt Checking in because Evan wants it checked in. Test case forthcoming after scrubbing. llvm-svn: 154955
* Typo.Chad Rosier2012-04-171-1/+1
| | | | llvm-svn: 154953
* Fix incorrect call of resolveRelocation() for ARM ELF stub relocations.Danil Malyshev2012-04-171-2/+2
| | | | llvm-svn: 154948
* platform support for counting column widths and checking isprintSeth Cantrell2012-04-175-0/+104
| | | | llvm-svn: 154944
* Delete latter half of CMakeLists.txt.Akira Hatanaka2012-04-171-15/+0
| | | | llvm-svn: 154936
* Add disassembler to MIPS. Akira Hatanaka2012-04-1713-93/+872
| | | | | | Patch by Vladimir Medic. llvm-svn: 154935
* Goodbye, JSONParser...Manuel Klimek2012-04-172-303/+0
| | | | llvm-svn: 154930
* Remove unused CCIfSubtarget.Jay Foad2012-04-174-16/+0
| | | | llvm-svn: 154921
* Fix bad EXTRACT_SUBREG in instruction selection for extending-loads on NEON.James Molloy2012-04-171-8/+44
| | | | llvm-svn: 154915
* Revert "SCEV: When expanding a GEP the final addition to the base pointer ↵Benjamin Kramer2012-04-171-1/+1
| | | | | | | | has NUW but not NSW." This isn't right either, reverting for now. llvm-svn: 154910
* Don't decode vperm2i128 or vperm2f128 into a shuffle if bit 3 or 7 of the ↵Craig Topper2012-04-172-0/+4
| | | | | | immediate is set. llvm-svn: 154907
* SlotIndexes used to store the index list in a crufty custom linked-list. I can'tLang Hames2012-04-171-27/+25
| | | | | | | | | | for the life of me remember why I wrote it this way, but I can't see any good reason for it now. This patch replaces the custom linked list with an ilist. This change should preserve the existing numberings exactly, so no generated code should change (if it does, file a bug!). llvm-svn: 154904
* Fix ARM disassembly of VLD2 (single 2-element structure to all lanes)Kevin Enderby2012-04-171-7/+1
| | | | | | | instructions with writebacks. And add test a case for all opcodes handed by DecodeVLD2DupInstruction() in ARMDisassembler.cpp . llvm-svn: 154884
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