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* Added documented rsprofiler interface. Also remove new profiler passes, theAndrew Lenharth2005-11-283-135/+63
| | | | | | old ones have been updated to implement the interface. llvm-svn: 24499
* Fix VC++ warning.Jeff Cohen2005-11-281-0/+1
| | | | llvm-svn: 24496
* Add a missed optimizationChris Lattner2005-11-281-0/+9
| | | | llvm-svn: 24495
* Random sampling (aka Arnold and Ryder) profiling. This is still ↵Andrew Lenharth2005-11-282-0/+730
| | | | | | | | | | | | | | | | | preliminary, but it works on spec on x86 and alpha. The idea is to allow profiling passes to remember what profiling they inserted, then a random sampling framework is inserted which consists of duplicated basic blocks (without profiling), such that at each backedge in the program and entry into every function, the framework chooses whether to use the instrumented code or the instrumentation free code. The goal of such a framework is to make it reasonably cheap to do random sampling of very expensive profiling products (such as load-value profiling). The code is organized into 3 parts (2 passes) 1) a linked set of profiling passes, which implement an analysis group (linked, like alias analysis are). These insert profiling into the program, and remember what they inserted, so that at a later time they can be queried about any instruction. 2) a pass that handles inserting the random sampling framework. This also has options to control how random samples are choosen. Currently implemented are Global counters, register allocated global counters, and read cycle counter (see? there was a reason for it). The profiling passes are almost identical to the existing ones (block, function, and null profiling is supported right now), and they are valid passes without the sampling framework (hence the existing passes can be unified with the new ones, not done yet). Some things are a bit ugly still, but that should be fixed up soon enough. Other todo? making the counter values not "magic 2^16 -1" values, but dynamically choosable. llvm-svn: 24493
* Small tweaks noticed while on the plane.Nate Begeman2005-11-263-5/+10
| | | | llvm-svn: 24492
* since reg2mem requires it, might as well mention that it preserves itAndrew Lenharth2005-11-251-0/+1
| | | | llvm-svn: 24491
* add support for dynamic_stackalloc to the dag isel (thanks andrew ;)Duraid Madina2005-11-251-3/+31
| | | | | | next up: support argument passing in memory, not just registers llvm-svn: 24490
* Some first bits of AltiVec stuff: Instruction Formats, Encodings, andNate Begeman2005-11-233-1/+123
| | | | | | | | | | Registers. Apologies to Jim if the scheduling info so far isn't accurate. There's a few more things like VRsave support that need to be finished up in my local tree before I can commit code that Does The Right Thing for turning 4 x float into the various altivec packed float instructions. llvm-svn: 24489
* Reg2Mem is something a pass may depend on, so allow thatAndrew Lenharth2005-11-221-0/+1
| | | | llvm-svn: 24488
* turns out, demotion and invokes and critical edges don't mixAndrew Lenharth2005-11-221-0/+4
| | | | llvm-svn: 24487
* Fix warning, the better way. Really, this is what this instruction is for, ↵Andrew Lenharth2005-11-221-7/+7
| | | | | | so use it llvm-svn: 24486
* Fix warningAndrew Lenharth2005-11-221-3/+3
| | | | llvm-svn: 24485
* Check in code to scalarize arbitrarily wide packed types for some simpleNate Begeman2005-11-223-5/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | vector operations (load, add, sub, mul). This allows us to codegen: void %foo(<4 x float> * %a) { entry: %tmp1 = load <4 x float> * %a; %tmp2 = add <4 x float> %tmp1, %tmp1 store <4 x float> %tmp2, <4 x float> *%a ret void } on ppc as: _foo: lfs f0, 12(r3) lfs f1, 8(r3) lfs f2, 4(r3) lfs f3, 0(r3) fadds f0, f0, f0 fadds f1, f1, f1 fadds f2, f2, f2 fadds f3, f3, f3 stfs f0, 12(r3) stfs f1, 8(r3) stfs f2, 4(r3) stfs f3, 0(r3) blr llvm-svn: 24484
* massive DAGISel patch. lots and lots more stuff compiles nowAndrew Lenharth2005-11-225-52/+207
| | | | llvm-svn: 24483
* Rather than attempting to legalize 1 x float, make sure the SD ISel neverNate Begeman2005-11-223-49/+29
| | | | | | | | | | | generates it. Make MVT::Vector expand-only, and remove the code in Legalize that attempts to legalize it. The plan for supporting N x Type is to continually epxand it in ExpandOp until it gets down to 2 x Type, where it will be scalarized into a pair of scalars. llvm-svn: 24482
* Use HasDotTypeDotSizeDirective instead of forELFChris Lattner2005-11-214-18/+10
| | | | llvm-svn: 24481
* Remove a level of indentation by using a continue.Chris Lattner2005-11-211-55/+55
| | | | llvm-svn: 24479
* Simplify the subtarget info, allow the asmwriter to do some target sensingChris Lattner2005-11-212-22/+2
| | | | | | based on TargetType. llvm-svn: 24478
* Use subtarget information computed by X86Subtarget instead of rolling our own.Chris Lattner2005-11-213-29/+22
| | | | llvm-svn: 24477
* Make the X86 subtarget compute the basic target type: ELF, Cygwin, Darwin,Chris Lattner2005-11-212-15/+24
| | | | | | or native Win32 llvm-svn: 24476
* Add a forELF flag, allowing the removal of forCygwin and simplification ofChris Lattner2005-11-214-7/+12
| | | | | | conditionals. llvm-svn: 24475
* simplify and genericize this codeChris Lattner2005-11-211-55/+69
| | | | llvm-svn: 24473
* add support for div/rem to the dag->dag isel. yay.Duraid Madina2005-11-211-0/+180
| | | | llvm-svn: 24472
* I think I know what you meant here, but just to be safe I'll let youDuraid Madina2005-11-211-1/+1
| | | | | | | | do it. :) <_sabre_> excuses excuses llvm-svn: 24471
* Eliminate unneeded intermediate class. Move doFinalizeMethod to bottom ofChris Lattner2005-11-211-99/+88
| | | | | | file. llvm-svn: 24470
* Start using shared asmprinter Constant Pool emitter, use shorter cpi names.Chris Lattner2005-11-211-26/+5
| | | | llvm-svn: 24469
* prune #includeChris Lattner2005-11-211-1/+0
| | | | llvm-svn: 24468
* Switch to using the shared constant pool printer, along with using shorterChris Lattner2005-11-214-31/+5
| | | | | | CPI ids llvm-svn: 24467
* Switch to using the generic constant pool emitter impl, use shorterChris Lattner2005-11-211-25/+2
| | | | | | CPI names llvm-svn: 24466
* Use generic constant pool emission code in the AsmPrinter class.Chris Lattner2005-11-211-30/+4
| | | | llvm-svn: 24465
* Allow target to customize directive used to switch to arbitrary section in ↵Chris Lattner2005-11-211-1/+28
| | | | | | | | SwitchSection, add generic constant pool emitter llvm-svn: 24464
* Use the FunctionNumber provided by the AsmPrinter classChris Lattner2005-11-211-19/+15
| | | | llvm-svn: 24462
* increment the function number in SetupMachineFunctionChris Lattner2005-11-211-0/+1
| | | | llvm-svn: 24461
* Use CommentString where possible, fix a bug where aix mode wouldn't assembleChris Lattner2005-11-211-4/+4
| | | | | | due to basic blocks being misnamed. llvm-svn: 24459
* unify the darwin and aix constant pool printersChris Lattner2005-11-211-48/+28
| | | | llvm-svn: 24458
* Adjust to capitalized asmprinter method namesChris Lattner2005-11-211-18/+18
| | | | llvm-svn: 24457
* Adjust to capitalized AsmPrinter method namesChris Lattner2005-11-216-32/+32
| | | | llvm-svn: 24456
* Use PrivateGlobalPrefix for basic block labels. This allows the x86 darwinChris Lattner2005-11-212-5/+9
| | | | | | port to properly use L for the bb prefix instead of . llvm-svn: 24454
* use PrivateGlobalPrefix for basic blocksChris Lattner2005-11-211-5/+6
| | | | llvm-svn: 24453
* Use PrivateGlobalPrefix for basic block labelsChris Lattner2005-11-211-2/+4
| | | | llvm-svn: 24452
* Use PrivateGlobalPrefix for basic blocksChris Lattner2005-11-211-6/+6
| | | | llvm-svn: 24451
* Switch to the new shared SwitchSectionChris Lattner2005-11-211-26/+6
| | | | llvm-svn: 24450
* Start using SwitchSection, allowing globals and functions to be emittedChris Lattner2005-11-211-39/+7
| | | | | | to specific sections. Delete some dead functions copied from the X86 backend. llvm-svn: 24449
* convert the rest of this over to use SwitchSectionChris Lattner2005-11-213-7/+4
| | | | llvm-svn: 24448
* Start using the AsmPrinter shared SwitchSection code. This allows the X86Chris Lattner2005-11-212-18/+3
| | | | | | backend to implement global variables in sections. llvm-svn: 24447
* This is now implemented in common codegen codeChris Lattner2005-11-211-20/+0
| | | | llvm-svn: 24446
* Add section switching to common code generator code. Add a couple ofChris Lattner2005-11-213-2/+23
| | | | | | asserts. llvm-svn: 24445
* Rename SwitchSection -> switchSection to avoid conflicting with a futureChris Lattner2005-11-214-22/+22
| | | | | | change. llvm-svn: 24443
* Start using PrivateGlobalPrefix correctlyChris Lattner2005-11-212-6/+8
| | | | llvm-svn: 24442
* set PrivateGlobalPrefix on darwin, use it when printing out CP referencesChris Lattner2005-11-211-7/+9
| | | | llvm-svn: 24441
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