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* Use new ForceDisassemble flag on the 2-byte forms of INC/DEC for 32-bit mode ↵Craig Topper2014-01-051-2/+3
| | | | | | and remove disassmbler table emitter hack. llvm-svn: 198544
* Add a new x86 specific instruction flag to force some isCodeGenOnly ↵Craig Topper2014-01-056-10/+20
| | | | | | instructions to go through to the disassembler tables without resorting to string matches. Apply flag to all _REV instructions. llvm-svn: 198543
* [Sparc] Add initial implementation of MC Code emitter for sparc.Venkatraman Govindaraju2014-01-0510-4/+325
| | | | llvm-svn: 198533
* Emit an error message if the value passed to __builtin_returnaddress isn't a ↵Bill Wendling2014-01-058-0/+55
| | | | | | | | | | constant __builtin_returnaddress requires that the value passed into is be a constant. However, at -O0 even a constant expression may not be converted to a constant. Emit an error message intead of crashing. llvm-svn: 198531
* Mark the 64-bit x86 push/pop instructions as In64BitMode. Mark the ↵Craig Topper2014-01-051-18/+18
| | | | | | corresponding 32-bit versions with the same encodings Not64BitMode. Remove hack from tablegen disassembler table emitter. Fix bad test. llvm-svn: 198530
* Add missed cleanup from r198456Alp Toker2014-01-041-4/+6
| | | | | | | All other uses of this macro in LLVM/clang have been moved to the function definition so follow suite (and the usage advice) here too for consistency. llvm-svn: 198516
* Tag x86 move to/from debug/control registers with Not64BitMode/In64BitMode. ↵Craig Topper2014-01-041-10/+18
| | | | | | Remove disassembler hack. llvm-svn: 198515
* Revert "Fix PR18361: Invalidate LoopDispositions after LoopSimplify hoists ↵Alp Toker2014-01-041-17/+10
| | | | | | | | | | | | | | | | | things." This commit was the source of crasher PR18384: While deleting: label %for.cond127 An asserting value handle still pointed to this value! UNREACHABLE executed at llvm/lib/IR/Value.cpp:671! Reverting to get the builders green, feel free to re-land after fixing up. (Renato has a handy isolated repro if you need it.) This reverts commit r198478. llvm-svn: 198503
* [Sparc] Add the initial implementation of an asm parser for sparc/sparcv9.Venkatraman Govindaraju2014-01-0411-6/+689
| | | | llvm-svn: 198484
* [SparcV9]: Implement RETURNADDR and FRAMEADDR lowering in SPARC64. Venkatraman Govindaraju2014-01-041-39/+54
| | | | | | Fixes PR18356. llvm-svn: 198480
* Fix PR18361: Invalidate LoopDispositions after LoopSimplify hoists things.Andrew Trick2014-01-041-10/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | getSCEV for an ashr instruction creates an intermediate zext expression when it truncates its operand. The operand is initially inside the loop, so the narrow zext expression has a non-loop-invariant loop disposition. LoopSimplify then runs on an outer loop, hoists the ashr operand, and properly invalidate the SCEVs that are mapped to value. The SCEV expression for the ashr is now an AddRec with the hoisted value as the now loop-invariant start value. The LoopDisposition of this wide value was properly invalidated during LoopSimplify. However, if we later get the ashr SCEV again, we again try to create the intermediate zext expression. We get the same SCEV that we did earlier, and it is still cached because it was never mapped to a Value. When we try to create a new AddRec we abort because we're using the old non-loop-invariant LoopDisposition. I don't have a solution for this other than to clear LoopDisposition when LoopSimplify hoists things. I think the long-term strategy should be to perform LoopSimplify on all loops before computing SCEV and before running any loop opts on individual loops. It's possible we may want to rerun LoopSimplify on individual loops, but it should rarely do anything, so rarely require invalidating SCEV. llvm-svn: 198478
* Remove JMP64pcrel32 (jmpq ). There are no tests for it. I'm pretty sure it ↵Craig Topper2014-01-041-5/+0
| | | | | | won't be emitted correctly since it was set to NoImm. And I can't prove that gas accepts 'jmpq' with an immediate either. Remove the special case for it from the disassembler table generator. llvm-svn: 198475
* Add a LLVM_DUMP_METHOD macro.Nico Weber2014-01-032-3/+3
| | | | | | | | | | | | | | The motivation is to mark dump methods as used in debug builds so that they can be called from lldb, but to not do so in release builds so that they can be dead-stripped. There's lots of potential follow-up work suggested in the thread "Should dump methods be LLVM_ATTRIBUTE_USED only in debug builds?" on cfe-dev, but everyone seems to agreen on this subset. Macro name chosen by fair coin toss. llvm-svn: 198456
* Revert "For disassembly when adding a symbolic operand that is a C++ symbol ↵Reid Kleckner2014-01-032-10/+0
| | | | | | | | | | | | | | name, also put the human readable name in a comment." This reverts commit r198441. This change doesn't build on Windows, and doesn't do the right thing on Linux and other platforms that don't use a _Z prefix instead of __Z for C++ names. It also had no tests, so it wasn't clear how to fix it forward. llvm-svn: 198445
* For disassembly when adding a symbolic operand that is a C++Kevin Enderby2014-01-032-0/+10
| | | | | | | | | | | | | symbol name, also put the human readable name in a comment. Also fix a bug in LLVMDisasmInstruction() that was not flushing the raw_svector_ostream for the disassembled instruction string before copying it to the output buffer that was causing truncation of the output. rdar://10173828 llvm-svn: 198441
* Make the llvm mangler depend only on DataLayout.Rafael Espindola2014-01-0333-74/+140
| | | | | | | | | | | | | | Before this patch any program that wanted to know the final symbol name of a GlobalValue had to link with Target. This patch implements a compromise solution where the mangler uses DataLayout. This way, any tool that already links with Target (llc, clang) gets the exact behavior as before and new IR files can be mangled without linking with Target. With this patch the mangler is constructed with just a DataLayout and DataLayout is extended to include the information the Mangler needs. llvm-svn: 198438
* [AArch64][NEON] Added SXTL and SXTL2 instruction aliasesAna Pazos2014-01-031-0/+17
| | | | llvm-svn: 198437
* Revert "Revert "Debug Info: Type Units: Simplify type hashing using ↵David Blaikie2014-01-033-93/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | IR-provided unique names."" This reverts commit r198398, thus reapplying r198397. I had accidentally introduced an endianness issue when applying the hash to the type unit. Using support::ulittle64_t in the reinterpret_cast in addDwarfTypeUnitType fixes this issue. Original commit message: Debug Info: Type Units: Simplify type hashing using IR-provided unique names. What's good for LTO metadata size problems ought to be good for non-LTO debug info size too, so let's rely on the same uniqueness in both cases. If it's insufficient for non-LTO for whatever reason (since we now won't be uniquing CU-local types or any C types - but these are likely to not be the most significant contributors to type bloat) we should consider a frontend solution that'll help both LTO and non-LTO alike, rather than using DWARF-level DIE-hashing that only helps non-LTO debug info size. It's also much simpler this way and benefits C++ even more since we can deduplicate lexically separate definitions of the same C++ type since they have the same mangled name. llvm-svn: 198436
* Fix loop rerolling pass failure with non-consant loop lower boundDavid Peixotto2014-01-031-10/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The loop rerolling pass was failing with an assertion failure from a failed cast on loops like this: void foo(int *A, int *B, int m, int n) { for (int i = m; i < n; i+=4) { A[i+0] = B[i+0] * 4; A[i+1] = B[i+1] * 4; A[i+2] = B[i+2] * 4; A[i+3] = B[i+3] * 4; } } The code was casting the SCEV-expanded code for the new induction variable to a phi-node. When the loop had a non-constant lower bound, the SCEV expander would end the code expansion with an add insted of a phi node and the cast would fail. It looks like the cast to a phi node was only needed to get the induction variable value coming from the backedge to compute the end of loop condition. This patch changes the loop reroller to compare the induction variable to the number of times the backedge is taken instead of the iteration count of the loop. In other words, we stop the loop when the current value of the induction variable == IterationCount-1. Previously, the comparison was comparing the induction variable value from the next iteration == IterationCount. This problem only seems to occur on 32-bit targets. For some reason, the loop is not rerolled on 64-bit targets. PR18290 llvm-svn: 198425
* BasicAA: Use reachabilty instead of dominance for checking value equality in phiArnold Schwaighofer2014-01-031-28/+35
| | | | | | | | | | | | | | | | | | | | | cycles This allows the value equality check to work even if we don't have a dominator tree. Also add some more comments. I was worried about compile time impacts and did not implement reachability but used the dominance check in the initial patch. The trade-off was that the dominator tree was required. The llvm utility function isPotentiallyReachable cuts off the recursive search after 32 visits. Testing did not show any compile time regressions showing my worries unjustfied. No compile time or performance regressions at O3 -flto -mavx on test-suite + externals. Addresses review comments from r198290. llvm-svn: 198400
* Revert "Debug Info: Type Units: Simplify type hashing using IR-provided ↵David Blaikie2014-01-033-19/+93
| | | | | | | | | | | unique names." Reverting due to bot failure I won't have time to investigate until tomorrow. This reverts commit r198397. llvm-svn: 198398
* Debug Info: Type Units: Simplify type hashing using IR-provided unique names.David Blaikie2014-01-033-93/+19
| | | | | | | | | | | | | | | | What's good for LTO metadata size problems ought to be good for non-LTO debug info size too, so let's rely on the same uniqueness in both cases. If it's insufficient for non-LTO for whatever reason (since we now won't be uniquing CU-local types or any C types - but these are likely to not be the most significant contributors to type bloat) we should consider a frontend solution that'll help both LTO and non-LTO alike, rather than using DWARF-level DIE-hashing that only helps non-LTO debug info size. It's also much simpler this way and benefits C++ even more since we can deduplicate lexically separate definitions of the same C++ type since they have the same mangled name. llvm-svn: 198397
* 80-column.Eric Christopher2014-01-031-2/+4
| | | | llvm-svn: 198394
* Remove TextSectionSym as it is unused.Eric Christopher2014-01-031-4/+1
| | | | llvm-svn: 198393
* Revert "Reverting r193835 due to weirdness with Go..."David Blaikie2014-01-031-4/+8
| | | | | | | | | | The cgo problem was that it wants dwarf2 which doesn't support direct constant encoding of the location. So let's add support for dwarf2 encoding (using a location expression) of data member locations. This reverts commit r198385. llvm-svn: 198389
* Reverting r193835 due to weirdness with Go...David Blaikie2014-01-031-4/+5
| | | | | | | Apologies for the noise - we're seeing some Go failures with cgo interacting with Clang's debug info due to this change. llvm-svn: 198385
* [RegAlloc] Make tryInstructionSplit less aggressive.Quentin Colombet2014-01-023-14/+88
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The greedy register allocator tries to split a live-range around each instruction where it is used or defined to relax the constraints on the entire live-range (this is a last chance split before falling back to spill). The goal is to have a big live-range that is unconstrained (i.e., that can use the largest legal register class) and several small local live-range that carry the constraints implied by each instruction. E.g., Let csti be the constraints on operation i. V1= op1 V1(cst1) op2 V1(cst2) V1 live-range is constrained on the intersection of cst1 and cst2. tryInstructionSplit relaxes those constraints by aggressively splitting each def/use point: V1= V2 = V1 V3 = V2 op1 V3(cst1) V4 = V2 op2 V4(cst2) Because of how the coalescer infrastructure works, each new variable (V3, V4) that is alive at the same time as V1 (or its copy, here V2) interfere with V1. Thus, we end up with an uncoalescable copy for each split point. To make tryInstructionSplit less aggressive, we check if the split point actually relaxes the constraints on the whole live-range. If it does not, we do not insert it. Indeed, it will not help the global allocation problem: - V1 will have the same constraints. - V1 will have the same interference + possibly the newly added split variable VS. - VS will produce an uncoalesceable copy if alive at the same time as V1. <rdar://problem/15570057> llvm-svn: 198369
* [PPC] Fix comment to match function nameHal Finkel2014-01-021-1/+1
| | | | llvm-svn: 198362
* Remove comments on CU skeleton construction, they're probablyEric Christopher2014-01-021-4/+0
| | | | | | obvious. llvm-svn: 198361
* [PPC] Fix the scheduling of CR logicals on the P7Hal Finkel2014-01-022-2/+3
| | | | | | | | | | | CR logicals (crand, crxor, etc.) on the P7 need to be in the first slot of each dispatch group. The old itinerary entry was just wrong (but has not mattered because we don't generate these instructions). This will matter when, in an upcoming commit, we start generating these instructions. llvm-svn: 198359
* Elaborate on comment for skeleton CU construction.Eric Christopher2014-01-021-1/+4
| | | | llvm-svn: 198358
* Revert seemingly unnecessary section sym for the data section.Eric Christopher2014-01-021-1/+0
| | | | llvm-svn: 198357
* [PPC] Use the correct immediate operands on 64-bit instructionsHal Finkel2014-01-022-12/+12
| | | | | | | | | | | Several of the 64-bit fixed-point instructions with immediate operands were using the 32-bit (i32) operand nodes instead of the corresponding 64-bit (i64) operand definitions (u16imm instead of u16imm64, for example). This error has had no effect so far, but would have caused type-checking violations with an upcoming change. llvm-svn: 198356
* Disable compare sinking in CodeGenPrepare when multiple condition registers ↵Hal Finkel2014-01-022-1/+3
| | | | | | | | | | | | | | | | | | | are available As noted in the comment above CodeGenPrepare::OptimizeInst, which aggressively sinks compares to reduce pressure on the condition register(s), for targets such as PowerPC with multiple condition registers, this may not be the right thing to do. This adds an HasMultipleConditionRegisters boolean to TLI, and CodeGenPrepare::OptimizeInst is skipped when HasMultipleConditionRegisters is true. This functionality will be used by the PowerPC backend in an upcoming commit. Especially when the PowerPC backend starts tracking individual condition register bits as separate allocatable entities (which will happen in this upcoming commit), this sinking from CodeGenPrepare::OptimizeInst is significantly suboptimial. llvm-svn: 198354
* indvars: cleanup the IV visitor. It does more than gather sext/zext info.Andrew Trick2014-01-021-25/+33
| | | | llvm-svn: 198353
* Fix up a couple of review comments:Eric Christopher2014-01-022-9/+9
| | | | | | | | Use an if statement instead of a pair of ternary operators checking the same condition. Use a cheap method call rather than returning the local symbol. llvm-svn: 198351
* Simplify conditional.Eric Christopher2014-01-021-1/+1
| | | | llvm-svn: 198350
* Allow addrspacecast in global aliasesMatt Arsenault2014-01-022-2/+5
| | | | llvm-svn: 198349
* [TableGen] Correctly generate implicit anonymous prototype defs in multiclassesHal Finkel2014-01-021-5/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | Even within a multiclass, we had been generating concrete implicit anonymous defs when parsing values (generally in value lists). This behavior was incorrect, and led to errors when multiclass parameters were used in the parameter list of the implicit anonymous def. If we had some multiclass: multiclass mc<string n> { ... : SomeClass<SomeOtherClass<n> > The capture of the multiclass parameter 'n' would not work correctly, and depending on how the implicit SomeOtherClass was used, either TableGen would ignore something it shouldn't, or would crash. To fix this problem, when inside a multiclass, we generate prototype anonymous defs for implicit anonymous defs (just as we do for explicit anonymous defs). Within the multiclass, the current record prototype is populated with a node that is essentially: !cast<SomeOtherClass>(!strconcat(NAME, anon_value_name)). This is then resolved to the correct concrete anonymous def, in the usual way, when NAME is resolved during multiclass instantiation. llvm-svn: 198348
* Delete unread globals through addrspacecastMatt Arsenault2014-01-021-2/+3
| | | | llvm-svn: 198346
* Fix addrspacecast with metadata globalsMatt Arsenault2014-01-021-3/+5
| | | | llvm-svn: 198345
* Remove redundant fold call introduced in r195944. Thanks very much to JuergenLang Hames2014-01-021-2/+1
| | | | | | | for pointing this out. llvm-svn: 198341
* [TableGen] Use the same anonymous name as the prefix on all multiclass defsHal Finkel2014-01-022-2/+2
| | | | | | | | | | | | | | | | TableGen had been generating a different name for an anonymous multiclass's NAME for every def in the multiclass. This had an unfortunate side effect: it was impossible to reference one def within the multiclass from another (in the parameter list, for example). By making sure we only generate an anonymous name once per multiclass (which, as it turns out, requires only changing the name parameter to reference type), we can now concatenate NAME within the multiclass with a def name in order to generate a reference to that def. This does not matter so much, in and of itself, but is necessary for a follow-up commit that will fix variable capturing in implicit anonymous multiclass defs (and that is important). llvm-svn: 198340
* indvars: insert truncate at loop boundary to avoid redundant IVs.Andrew Trick2014-01-021-5/+12
| | | | | | | | | When widening an IV to remove s/zext, we generally try to eliminate the original narrow IV. However, LCSSA phi nodes outside the loop were still using the original IV. Clean this up more aggressively to avoid redundancy in generated code. llvm-svn: 198338
* Mark REX64_PREFIX as In64BitMode, remove hack from X86RecognizableInstr.Craig Topper2014-01-021-1/+2
| | | | llvm-svn: 198336
* Make llvm::Regex non-copyable but movable.David Blaikie2014-01-021-2/+4
| | | | | | Based on a patch by Maciej Piechotka. llvm-svn: 198334
* Revert "Debug info: Add enumerators to the __apple_names accelerator table."Adrian Prantl2014-01-021-3/+0
| | | | | | | This reverts r197927 until the discussion on llvm-commits comes to a conclusion. llvm-svn: 198333
* Mark PUSHFS64/PUSHGS64/POPFS64/POPGS64 as In64BitMode and remove the hack ↵Craig Topper2014-01-021-4/+4
| | | | | | from the disassembler table builder. llvm-svn: 198327
* Mark all x86 Int_ and _Int patterns as isCodeGenOnly so the disassembler ↵Craig Topper2014-01-023-145/+196
| | | | | | table builder doesn't need to string match them to exclude them. llvm-svn: 198323
* [arm] Add softvfp to supported FPU names.Logan Chien2014-01-022-0/+4
| | | | llvm-svn: 198313
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