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* Remove old fenv.h workaround for a historic clang driver bugAlp Toker2014-06-091-9/+2
| | | | | | | | | | | Tested and works fine with clang using libstdc++. All indications are that this was fixed some time ago and isn't a problem with any clang version we support. I've added a note in PR6907 which is still open for some reason. llvm-svn: 210485
* Fold FEnv.h into the implementationAlp Toker2014-06-091-7/+41
| | | | | | | | | | | | | | | | | | Support headers shouldn't use config.h definitions, and they should never be undefined like this. ConstantFolding.cpp was the only user of this facility and already includes config.h for other math features, so it makes sense to move the checks there at point of use. (The implicit config.h was also quite dangerous -- removing the FEnv.h include would have silently disabled math constant folding without causing any tests to fail. Need to investigate -Wundef once the cleanup is done.) This eliminates the last config.h include from LLVM headers, paving the way for more consistent configuration checks. llvm-svn: 210483
* Move all of the x86 subtarget initialized variables down into the x86 subtargetEric Christopher2014-06-097-67/+95
| | | | | | from the x86 target machine. Should be no functional change. llvm-svn: 210479
* R600/SI: Rename VOP3 helper class to be more generalMatt Arsenault2014-06-092-4/+4
| | | | | | It has other uses besides shift instructions. llvm-svn: 210478
* [X86] Add target combine rules for horizontal add/sub.Andrea Di Biagio2014-06-092-0/+106
| | | | | | | | | | | | | | | | | | | | This patch adds new target specific combine rules to identify horizontal add/sub idioms from BUILD_VECTOR dag nodes. This patch also teaches the DAGCombiner how to canonicalize sequences of insert_vector_elt dag nodes according to the following rule: (insert_vector_elt (insert_vector_elt A, I0), I1) -> (insert_vecto_elt (insert_vector_elt A, I1), I0) This new canonicalization rule only triggers if the inner insert_vector dag node has exactly one use; also, both indices must be known constants, and I1 < I0. This last rule made it possible to write a simpler algorithm to identify horizontal add/sub patterns because now we don't have to worry about the ordering of insert_vector_elt dag nodes. llvm-svn: 210477
* R600/SI: Keep 64-bit not on SALUMatt Arsenault2014-06-093-10/+69
| | | | llvm-svn: 210476
* R600: Fix selection failure for vector bswapMatt Arsenault2014-06-091-0/+1
| | | | llvm-svn: 210475
* [PPC64LE] Generate correct little-endian code for v16i8 multiplyBill Schmidt2014-06-091-4/+16
| | | | | | | | | | | | | | | | The existing code in PPCTargetLowering::LowerMUL() for multiplying two v16i8 values assumes that vector elements are numbered in big-endian order. For little-endian targets, the vector element numbering is reversed, but the vmuleub, vmuloub, and vperm instructions still assume big-endian numbering. To account for this, we must adjust the permute control vector and reverse the order of the input registers on the vperm instruction. The existing test/CodeGen/PowerPC/vec_mul.ll is updated to be executed on powerpc64 and powerpc64le targets as well as the original powerpc (32-bit) target. llvm-svn: 210474
* [msan] Workaround for invalid origins in shufflevector.Evgeniy Stepanov2014-06-091-4/+8
| | | | | | | | | Makes origin propagation ignore literal undef operands, and, in general, any operand we don't have origin for. https://code.google.com/p/memory-sanitizer/issues/detail?id=56 llvm-svn: 210472
* [mips] Fix a bug for NaCl target - Don't report the error when non-dangerousSasa Stankovic2014-06-091-7/+6
| | | | | | | | load/store is in branch delay slot. Differential Revision: http://llvm-reviews.chandlerc.com/D4048 llvm-svn: 210470
* [X86] Avoid emitting unnecessary test instructions.Andrea Di Biagio2014-06-091-2/+19
| | | | | | | | | | | | | This patch teaches the backend how to check for the 'NoSignedWrap' flag on binary operations to improve the emission of 'test' instructions. If the result of a binary operation is known not to overflow we know that resetting the Overflow flag is unnecessary and so we can avoid emitting the test instruction. Patch by Marcello Maggioni. llvm-svn: 210468
* [DAG] Expose NoSignedWrap, NoUnsignedWrap and Exact flags to SelectionDAG.Andrea Di Biagio2014-06-094-17/+109
| | | | | | | | | | | | | This patch modifies SelectionDAGBuilder to construct SDNodes with associated NoSignedWrap, NoUnsignedWrap and Exact flags coming from IR BinaryOperator instructions. Added a new SDNode type called 'BinaryWithFlagsSDNode' to allow accessing nsw/nuw/exact flags during codegen. Patch by Marcello Maggioni. llvm-svn: 210467
* [X86] Use ADD/SUB instead of INC/DEC for SilvermontAlexey Volkov2014-06-096-15/+37
| | | | | | | | | | | | According to Intel Software Optimization Manual on Silvermont INC or DEC instructions require an additional uop to merge the flags. As a result, a branch instruction depending on an INC or a DEC instruction incurs a 1 cycle penalty. Differential Revision: http://reviews.llvm.org/D3990 llvm-svn: 210466
* [AArch64] Missing aliases for CMP/CMN [W]SP with no shiftArtyom Skrobov2014-06-091-0/+4
| | | | llvm-svn: 210464
* [mips][mips64r6] Add LDPC instructionZoran Jovanovic2014-06-098-6/+62
| | | | | | Differential Revision: http://reviews.llvm.org/D3822 llvm-svn: 210460
* Fix line numbers for code inlined from __nodebug__ functions.Evgeniy Stepanov2014-06-091-1/+7
| | | | | | | | | | | | | | Instructions from __nodebug__ functions don't have file:line information even when inlined into no-nodebug functions. As a result, intrinsics (SSE and other) from <*intrin.h> clang headers _never_ have file:line information. With this change, an instruction without !dbg metadata gets one from the call instruction when inlined. Fixes PR19001. llvm-svn: 210459
* [msan] Fix vector pack intrinsic handling.Evgeniy Stepanov2014-06-091-8/+72
| | | | | | | | | This fixes a crash on MMX intrinsics, as well as a corner case in handling of all unsigned pack intrinsics. PR19953. llvm-svn: 210454
* Fix gcc warning (enumeral and non-enumeral type in conditional expression)Patrik Hagglund2014-06-091-1/+2
| | | | llvm-svn: 210450
* [AArch64] Fix the ordering of the accumulate operand in SchedRW list.Chad Rosier2014-06-091-3/+3
| | | | | | | Patch by Dave Estes <cestes@codeaurora.org> http://reviews.llvm.org/D4037 llvm-svn: 210446
* [AArch64] When combining constant mul of power of 2 plus/minus 1, prefer shiftChad Rosier2014-06-091-9/+9
| | | | | | | plus add. The shift can be folded into the add. This only effects codegen when the constant is 3. llvm-svn: 210445
* [SeparateConstOffsetFromGEP] inbounds zext => sext for better splittingJingyue Wu2014-06-081-1/+57
| | | | | | | | | | For each array index that is in the form of zext(a), convert it to sext(a) if we can prove zext(a) <= max signed value of typeof(a). The conversion helps to split zext(x + y) into sext(x) + sext(y). Reviewed in http://reviews.llvm.org/D4060 llvm-svn: 210444
* [C++11] Use 'nullptr'.Craig Topper2014-06-086-6/+6
| | | | llvm-svn: 210442
* [SeparateConstOffsetFromGEP] Fix an illegitimate optimization on zextJingyue Wu2014-06-081-2/+2
| | | | | | | | | | zext(a + b) != zext(a) + zext(b) even if a + b >= 0 && b >= 0. e.g., a = i4 0b1111, b = i4 0b0001 zext a + b to i8 = zext 0b0000 to i8 = 0b00000000 (zext a to i8) + (zext b to i8) = 0b00001111 + 0b00000001 = 0b00010000 llvm-svn: 210439
* Refactor canonicalizing array indices to a helper functionJingyue Wu2014-06-081-32/+51
| | | | | | No functionality changes. llvm-svn: 210438
* ScalarEvolution: Derive element size from the type of the loaded elementTobias Grosser2014-06-081-1/+1
| | | | | | | | | | Before, we where looking at the size of the pointer type that specifies the location from which to load the element. This did not make any sense at all. This change fixes a bug in the delinearization where we failed to delinerize certain load instructions. llvm-svn: 210435
* X86: simplify data layout calculationSaleem Abdulrasool2014-06-081-3/+2
| | | | | | | | X86Subtarget::isTargetCygMing || X86Subtarget::isTargetKnownWindowsMSVC is equivalent to all Windows environments. Simplify the check to isOSWindows. NFC. llvm-svn: 210431
* APFloat: x - NaN needs to flip the signbit of NaN when x is a number.Stephen Canon2014-06-081-1/+3
| | | | | | Because we don't have a separate negate( ) function, 0 - NaN does double-duty as the IEEE-754 negate( ) operation, which (unlike most FP ops) *does* attach semantic meaning to the signbit of NaN. llvm-svn: 210428
* AsmMatchers: Use unique_ptr to manage ownership of MCParsedAsmOperandDavid Blaikie2014-06-0811-1086/+948
| | | | | | | | | | | | I saw at least a memory leak or two from inspection (on probably untested error paths) and r206991, which was the original inspiration for this change. I ran this idea by Jim Grosbach a few weeks ago & he was OK with it. Since it's a basically mechanical patch that seemed sufficient - usual post-commit review, revert, etc, as needed. llvm-svn: 210427
* Revert "Do materialize for floating point"Alp Toker2014-06-081-23/+2
| | | | | | | | | | | | | | | | | | | | | | | 1) The commit was made despite profound lack of understanding: "I did not understand the comment about using dyn_cast instead of isa. I will commit as is and make the update after. You can explain what you meant to me." Commit first, understand later isn't OK. 2) Review comments were simply ignored: "Can you edit the summary to describe what the patch is for? It appears to be a list of commits at the moment." 3) The patch got LGTM'd off-list without any indication of readiness. 4) The public mailing list was excluded from patch review so all of this was hidden from the community. This reverts commit r210414. llvm-svn: 210424
* Remove outdated CMake MSVC workaroundAlp Toker2014-06-081-7/+1
| | | | llvm-svn: 210421
* MC: fix text section characteristics for WoASaleem Abdulrasool2014-06-081-0/+3
| | | | | | | | | | link.exe requires that the text section has the IMAGE_SCN_MEM_16BIT flag set. Otherwise, it will treat the function as ARM. If this occurs, then jumps to the function will fail, switching from thumb to ARM mode execution. With this change, it is possible to link using the MSVC linker as well. llvm-svn: 210415
* Do materialize for floating pointReed Kotler2014-06-081-2/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: start to do simple constants finish simplestore add test case format Merge branch 'master' into 1756_8 Add basic functionality for assignment of ints. This creates a lot of core infrastructure in which to add, with little effort, quite a bit more to mips fast-isel Merge branch 'master' into 1756_8 Add basic functionality for assignment of ints. This creates a lot of core infrastructure in which to add, with little effort, quite a bit more to mips fast-isel in progress finish integer materialize test cases test cases in progress Finish up fast-isel materialize for ints. Finish materialize for ints test cases simplestorei.ll Merge branch 'master' into 1756_8 fix fp constants for fast-isel Merge branch '1758_1' of dmz-portal.mips.com:llvm into 1758_1 in progress lastest for fp materialization clean up Merge branch 'master' into 1758_1 formatting add test case finish test case Merge branch 'master' into 1758_2 Test Plan: simplestore.ll simplestore.ll Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D3659 llvm-svn: 210414
* start to clean up buildMI calls in mips fast-iselReed Kotler2014-06-081-26/+24
| | | | | | | | | | | | | | | | | Summary: Merge branch 'master' into 1758_6 Test Plan: No functionality change. Run "make check" and run test-suite. Because our servers are not yet running again I have not yet run test-suite. I will further review myself before submission. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D3819 llvm-svn: 210413
* include MipsGenFastISel.incReed Kotler2014-06-081-5/+17
| | | | | | | | | | | | | | | | | | Summary: Included this file which is needed to enable tablegen generated functionality for fast mips-isel Test Plan: This has no visible functionality by itself but just adding the include file creates some issues so I have it as a separate patch. Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D3812 llvm-svn: 210410
* MC: make ELF .type handling more GNU AS compatibleSaleem Abdulrasool2014-06-081-38/+34
| | | | | | | | | | | | | | GAS documents the .type directive as having an optional comma following the key symbol name when using the STT_<TYPE_IN_UPPER_CASE> form. However, it treats the comma as optional in all cases. This makes the IAS support both forms of inputs. Furthermore, the prefixed forms take either the upper case name or the lower case alias. The tests are split into two separate sets as the hash character serves as a comment character on x86, which is tested in the second set by using arm-elf which uses the at symbol as a comment character. llvm-svn: 210407
* MC: fix ctor/dtor section for windows-itaniumSaleem Abdulrasool2014-06-081-1/+1
| | | | | | | | This adjusts the section setup for the windows-itanium environment. This environment does not report to be a known windows msvc environment, even though it is (nearly) identical to the MSVC environment for C code. llvm-svn: 210406
* MC: whitespace, grouping for COFF section setupSaleem Abdulrasool2014-06-081-26/+33
| | | | | | | | Add some whitespace, combine two sequential conditionals into a single one. Reformat some section definitions to maintain uniformity in the function. NFC. llvm-svn: 210405
* Fix typosAlp Toker2014-06-073-3/+3
| | | | llvm-svn: 210401
* Build fix: remove initializeJumpInstrTablesPass() call from LTOAlp Toker2014-06-071-1/+0
| | | | | | | | | | | | | | | This was incurring an unsatisfied dependency on CodeGen from LTO breaking shared builds: Undefined symbols for architecture x86_64: "llvm::initializeJumpInstrTablesPass(llvm::PassRegistry&)", referenced from: llvm::LTOCodeGenerator::initializeLTOPasses() in LTOCodeGenerator.cpp.o ld: symbol(s) not found for architecture x86_64 clang: error: linker command failed with exit code 1 (use -v to see invocation) Removed as a temporary measure pending feedback from the author. llvm-svn: 210400
* ARM: correct assertion for long-calls on WoASaleem Abdulrasool2014-06-071-2/+3
| | | | | | | | | | | COFF/PE, so the relocation model is never static. Loosen the assertion accordingly. The relocation can still be emitted properly, as it will be converted to an IMAGE_REL_ARM_ADDR32 which will be resolved by the loader taking the base relocation into account. This is necessary to permit the emission of long calls which can be controlled via the -mlong-calls option in the driver. llvm-svn: 210399
* Revert 209903 and 210040.Rafael Espindola2014-06-071-40/+0
| | | | | | | | | | | | The messages were "PR19753: Optimize comparisons with "ashr exact" of a constanst." "Added support to optimize comparisons with "lshr exact" of a constant." They were not correctly handling signed/unsigned operation differences, causing pr19958. llvm-svn: 210393
* Fix the MachineScheduler's logic for updating ready times for in-order.Andrew Trick2014-06-071-32/+25
| | | | | | | | | | | | | | | | | Now the scheduler updates a node's ready time as soon as it is scheduled, before releasing dependent nodes. There was a reason I didn't do this initially but it no longer applies. A53 is in-order and was running into an issue where nodes where added to the readyQ too early. That's now fixed. This also makes it easier for custom scheduling strategies to build heuristics based on the actual cycles that the node was scheduled at. The only impact on OOO (sandybridge/cyclone) is that ready times will be slightly more accurate. I didn't measure any significant regressions. llvm-svn: 210390
* Replace the use of TargetMachine with a tiny bool variable.Eric Christopher2014-06-063-8/+6
| | | | llvm-svn: 210386
* Remove all local variables from X86SelectionDAGInfo, the DAG hasEric Christopher2014-06-063-35/+29
| | | | | | all of the ones we were stashing away on startup. llvm-svn: 210385
* DebugInfo: Use the scope of the function declaration, if any, to name a ↵David Blaikie2014-06-063-4/+10
| | | | | | | | | | function in DWARF pubnames This ensures that member functions, for example, are entered into pubnames with their fully qualified name, rather than inside the global namespace. llvm-svn: 210379
* DebugInfo: pubnames: include file-local (static or anonymous namespace) ↵David Blaikie2014-06-061-9/+10
| | | | | | | | | variables and anonymous namespaces themselves. Still some issues with name qualification, FIXMEs added to test cases and fixes will come next. llvm-svn: 210378
* InstCombine: Canonicalize addrspacecast between different element typesJingyue Wu2014-06-062-13/+29
| | | | | | | | | | | | | | | | addrspacecast X addrspace(M)* to Y addrspace(N)* --> bitcast X addrspace(M)* to Y addrspace(M)* addrspacecast Y addrspace(M)* to Y addrspace(N)* Updat all affected tests and add several new tests in addrspacecast.ll. This patch is based on http://reviews.llvm.org/D2186 (authored by Matt Arsenault) with fixes and more tests. llvm-svn: 210375
* MC: prevent early DCE of empty sectionsSaleem Abdulrasool2014-06-061-7/+3
| | | | | | | | | | | | | | | | Prevent the early elimination of sections in the object writer. There may be references to the section itself by other symbols, which may potentially not be possible to resolve. ML (Visual Studio's Macro Assembler) also seems to retain empty sections. The elimination of symbols and sections which are unused should really occur at the link phase. This will not cause any change in the resulting binary, simply in the generated object files. The adjustments to the other unit tests account for the fluctuating section index caused by the appearance of sections which were previously discarded. llvm-svn: 210373
* X86: Don't turn shifts into ands if there's another use that may not check ↵Benjamin Kramer2014-06-061-1/+1
| | | | | | | | for equality. Fixes PR19964. llvm-svn: 210371
* Fix a few issues with comdat handling on COFF.Rafael Espindola2014-06-066-71/+57
| | | | | | | | | | | | | | | | | | | | | * Section association cannot use just the section name as many sections can have the same name. With this patch, the comdat symbol in an assoc section is interpreted to mean a symbol in the associated section and the mapping is discovered from it. * Comdat symbols were not being set correctly. Instead we were getting whatever was output first for that section. A consequence is that associative sections now must use .section to set the association. Using .linkonce would not work since it is not possible to change a sections comdat symbol (it is used to decide if we should create a new section or reuse an existing one). This includes r210298, which was reverted because it was asserting on an associated section having the same comdat as the associated section. llvm-svn: 210367
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