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* [mips][mips64r6] addi is not available on MIPS32r6/MIPS64r6Daniel Sanders2014-05-222-2/+14
| | | | | | | | | | | | Summary: Depends on D3787. Tablegen will raise an assertion without it. Reviewers: zoran.jovanovic, jkolek, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3842 llvm-svn: 209419
* [mips][mips64r6] Test that paired single instructions are invalidDaniel Sanders2014-05-221-1/+0
| | | | | | | | | | | | | | Summary: These emit the 'unknown instruction' instead of the correct error because they have not been implemented in LLVM for any MIPS ISA. Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3841 llvm-svn: 209418
* [mips][mips64r6] Add b[on]vcDaniel Sanders2014-05-224-50/+353
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This required me to implement the disassembler for MIPS64r6 since the encodings are ambiguous with other instructions. This in turn revealed a few assembly/disassembly bugs which I have fixed. * da[ht]i only take two operands according to the spec, not three. * DecodeBranchTarget2[16] correctly handles wider immediates than simm16 * Also made non-functional change to DecodeBranchTarget and DecodeBranchTargetMM to keep implementation style consistent between them. * Difficult encodings are handled by a custom decode method on the most general encoding in the group. This method will convert the MCInst to a different opcode if necessary. DecodeBranchTarget is not currently the inverse of getBranchTargetOpValue so disassembling some branch instructions emit incorrect output. This seems to affect branches with delay slots on all MIPS ISA's. I've left this bug for now and temporarily removed the check for the immediate on bc[12]eqz/bc[12]nez in the MIPS32r6/MIPS64r6 tests. jialc and jic crash the disassembler for some reason. I've left these instructions commented out for the moment. Depends on D3760 Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3761 llvm-svn: 209415
* ARM64: assert if we see i64 -> i64 extend in the DAG.Tim Northover2014-05-221-4/+2
| | | | | | | | Should be no change in behaviour, but it makes the intended functionality a bit clearer and means we only have to reason about real extend operations. llvm-svn: 209409
* MC: initialise MCAsmParser variableSaleem Abdulrasool2014-05-221-2/+2
| | | | | | | Properly initialise HadError to false during construction. Detected as use-of-uninitialised variable by MSan! llvm-svn: 209393
* Remove unused variable.Eric Christopher2014-05-221-1/+0
| | | | llvm-svn: 209391
* ARM: introduce llvm.arm.undefined intrinsicSaleem Abdulrasool2014-05-223-5/+5
| | | | | | | | | | | | This intrinsic permits the emission of platform specific undefined sequences. ARM has reserved the 0xde opcode which takes a single integer parameter (ignored by the CPU). This permits the operating system to implement custom behaviour on this trap. The llvm.arm.undefined intrinsic is meant to provide a means for generating the target specific behaviour from the frontend. This is particularly useful for Windows on ARM which has made use of a series of these special opcodes. llvm-svn: 209390
* R600/SI: Match fp_to_uint / uint_to_fp for f64Matt Arsenault2014-05-221-2/+7
| | | | llvm-svn: 209388
* MC: formalise some assertions into proper errorsSaleem Abdulrasool2014-05-221-8/+23
| | | | | | | | | Now that clang can be used as an assembler via the IAS, invalid assembler inputs would cause the assertions to trigger. Although we cannot recover from the errors here, nor provide caret diagnostics, attempt to handle them slightly more gracefully by reporting a fatal error. llvm-svn: 209387
* Override runOnMachineFunction for ARMISelDAGToDAG so that we canEric Christopher2014-05-221-0/+7
| | | | | | reset the subtarget on each function. llvm-svn: 209386
* Override runOnMachineFunction for X86ISelDAGToDAG so that we canEric Christopher2014-05-221-0/+7
| | | | | | reset the subtarget on each function. llvm-svn: 209384
* Avoid using subtarget features when adding X86 specific passes toEric Christopher2014-05-225-14/+17
| | | | | | the pass pipeline. llvm-svn: 209382
* Remove extra local variable.Eric Christopher2014-05-221-2/+1
| | | | llvm-svn: 209381
* Rename createGlobalBaseRegPass -> createX86GlobalBaseRegPass to makeEric Christopher2014-05-223-4/+4
| | | | | | it obvious that it's a target specific pass. llvm-svn: 209380
* Fix typo.Eric Christopher2014-05-225-5/+5
| | | | llvm-svn: 209377
* Avoid using subtarget features when initializing the pass pipelineEric Christopher2014-05-222-12/+17
| | | | | | on PPC. llvm-svn: 209376
* Reset the subtarget for DAGToDAG on every iteration of runOnMachineFunction.Eric Christopher2014-05-225-47/+47
| | | | | | | This required updating the generated functions and TD file accordingly to be pointers rather than const references. llvm-svn: 209375
* Reset the subtarget for DAGToDAG on every iteration of runOnMachineFunction.Eric Christopher2014-05-221-1/+2
| | | | llvm-svn: 209374
* Sort includes.Eric Christopher2014-05-221-1/+1
| | | | llvm-svn: 209373
* DebugInfo: Simplify dead variable collection slightly.David Blaikie2014-05-221-3/+1
| | | | | | | | constructSubprogramDIE was already called for every subprogram in every CU when the module was started - there's no need to call it again at module finalization. llvm-svn: 209372
* Fix a bug in SCEV's backedge taken count computation from my prior fix in Jan.Andrew Trick2014-05-221-8/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This has to do with the trip count computation for loops with multiple exits, which is quite subtle. Most passes just ask for a single trip count number, so we must be conservative assuming any exit could be taken. Normally, we rely on the "exact" trip count, which was correctly given as "unknown". However, SCEV also gives a "max" back-edge taken count. The loops max BE taken count is conservatively a maximum over the max of each exit's non-exiting iterations count. Note that some exit tests can be skipped so the max loop back-edge taken count can actually exceed the max non-exiting iterations for some exits. However, when we know the loop *latch* cannot be skipped, we can directly use its max taken count disregarding other exits. I previously took the minimum here without checking whether the other exit could be skipped. The correct, and simpler thing to do here is just to directly use the loop latch's max non-exiting iterations as the loops max back-edge count. In the problematic test case, the first loop exit had a max of zero non-exiting iterations, but could be skipped. The loop latch was known not to be skipped but had max of one non-exiting iteration. We incorrectly claimed the loop back-edge could be taken zero times, when it is actually taken one time. Fixes Loop %for.body.i: <multiple exits> Unpredictable backedge-taken count. Loop %for.body.i: max backedge-taken count is 1. llvm-svn: 209358
* Similar to bitcast, treat addrspacecast as a foldable operand.Eli Bendersky2014-05-221-0/+2
| | | | | | | | Added a test sink-addrspacecast.ll to verify this change. Patch by Jingyue Wu. llvm-svn: 209343
* Fix compilation issues.Eric Christopher2014-05-213-4/+7
| | | | llvm-svn: 209342
* Make early if conversion dependent upon the subtarget and addEric Christopher2014-05-219-23/+35
| | | | | | | a subtarget hook to enable. Unconditionally add to the pass pipeline for targets that might want to use it. No functional change. llvm-svn: 209340
* Revert "DebugInfo: Don't put fission type units in comdat sections."David Blaikie2014-05-214-26/+17
| | | | | | | | | This reverts commit r208930, r208933, and r208975. It seems not all fission consumers are ready to handle this behavior. Reverting until tools are brought up to spec. llvm-svn: 209338
* MC: correct IMAGE_REL_ARM_MOV32T relocation emissionSaleem Abdulrasool2014-05-212-6/+7
| | | | | | | | | | | | This corrects the emission of IMAGE_REL_ARM_MOV32T relocations. Previously, we were avoiding the high portion of the relocation too early. If there was a section-relative relocation with an offset greater than 16-bits (65535), you would end up truncating the high order bits of the offset. Allow the current relocation representation to flow through out the MC layer to the object writer. Use the new ability to restrict recorded relocations to avoid emitting the relocation into the final object. llvm-svn: 209337
* MC: introduce ability to restrict recorded relocationsSaleem Abdulrasool2014-05-211-1/+2
| | | | | | | | | Add support to allow a target specific COFF object writer to restrict the recorded resolutions in the emitted object files. This is motivated by the need in Windows on ARM, where an intermediate relocation needs to be prevented from being emitted in the object file. llvm-svn: 209336
* DebugInfo: Use the SPMap to find the parent CU of inlined functions as they ↵David Blaikie2014-05-211-13/+11
| | | | | | | | | | | | | | | | may not be in the current CU Committed in r209178 then reverted in r209251 due to LTO breakage, here's a proper fix for the case of the missing subprogram DIE. The DIEs were there, just in other compile units. Using the SPMap we can find the right compile unit to search for and produce cross-unit references to describe this kind of inlining. One existing test case needed to be updated because it had a function that wasn't in the CU's subprogram list, so it didn't appear in the SPMap. llvm-svn: 209335
* R600: Add comment describing problems with LowerConstantInitializerMatt Arsenault2014-05-211-0/+10
| | | | llvm-svn: 209333
* R600: Partially fix constant initializers for structs and vectors.Matt Arsenault2014-05-211-6/+33
| | | | | | | This should extend the current workaround to work with structs that only contain legal, scalar types. llvm-svn: 209331
* Remove getTargetLowering from TargetPassConfig as the target loweringEric Christopher2014-05-212-7/+10
| | | | | | can change depending upon subtarget/subtarget features for a function. llvm-svn: 209329
* Remove unused member variable from hexagon pass.Eric Christopher2014-05-211-4/+3
| | | | llvm-svn: 209328
* DebugInfo: Ensure concrete out of line variables from inlined functions ↵David Blaikie2014-05-212-21/+27
| | | | | | reference their abstract origins. llvm-svn: 209327
* [X86] Fix a bug in the lowering of BLENDI introduced in r209043.Quentin Colombet2014-05-211-3/+7
| | | | | | | | | | | | | | | | | | | ISD::VSELECT mask uses 1 to identify the first argument and 0 to identify the second argument. On the other hand, BLENDI uses 0 to identify the first argument and 1 to identify the second argument. Fix the generation of the blend mask to account for this difference. The bug did not show up with r209043, because we were not checking for the actual arguments of the blend instruction! This commit also fixes the test cases. Note: The same mask works for the BLENDr variant because the arguments are swapped during instruction selection (see the BLENDXXrr patterns). <rdar://problem/16975435> llvm-svn: 209324
* DebugInfo: Simplify subprogram declaration creation/references and ↵David Blaikie2014-05-211-21/+18
| | | | | | | | accidentally refix PR11300. Also simplifies the linkage name handling a little too. llvm-svn: 209311
* Use cast<> instead of unchecked dyn_castMatt Arsenault2014-05-211-1/+1
| | | | llvm-svn: 209310
* MC: loosen an overzealous assertionSaleem Abdulrasool2014-05-211-1/+2
| | | | | | | | Permit active macro expansions when terminating the assembler if there were errors during the expansion. This would only trigger on invalid input when built with assertions. llvm-svn: 209309
* [mips][mips64r6] Add bc[12](eq|ne)zDaniel Sanders2014-05-213-4/+75
| | | | | | | | | | | | Summary: Depends on D3691 Reviewers: jkolek, zoran.jovanovic, vmedic Reviewed By: vmedic Differential Revision: http://reviews.llvm.org/D3760 llvm-svn: 209292
* [asan] Fix x86-32 asm instrumentation to preserve flags.Evgeniy Stepanov2014-05-211-2/+1
| | | | | | Patch by Yuri Gorshenin. llvm-svn: 209280
* MC: mark COFF .drectve section as REMOVESaleem Abdulrasool2014-05-211-1/+1
| | | | | | | | | The .drectve section should be marked as IMAGE_SCN_LNK_REMOVE. This matches what the MSVC toolchain does and accurately reflects that this section should not be emitted into the final binary. This section is merely information for the linker, comprising of additional linker directives. llvm-svn: 209273
* [modules] Add module maps for LLVM. These are not quite ready for prime-timeRichard Smith2014-05-216-0/+6
| | | | | | | yet, but only a few more Clang patches need to land. (I have 'ninja check' passing locally.) llvm-svn: 209269
* ARM: correct bundle generation for MOV32T relocationsSaleem Abdulrasool2014-05-211-7/+3
| | | | | | | | | | | | | | | | | | | | | | | Although the previous code would construct a bundle and add the correct elements to it, it would not finalise the bundle. This resulted in the InternalRead markers not being added to the MachineOperands nor, more importantly, the externally visible defs to the bundle itself. So, although the bundle was not exposing the def, the generated code would be correct because there was no optimisations being performed. When optimisations were enabled, the post register allocator would kick in, and the hazard recognizer would reorder operations around the load which would define the value being operated upon. Rather than manually constructing the bundle, simply construct and finalise the bundle via the finaliseBundle call after both MIs have been emitted. This improves the code generation with optimisations where IMAGE_REL_ARM_MOV32T relocations are emitted. The changes to the other tests are the result of the bundle generation preventing the scheduler from hoisting the moves across the loads. The net effect of the generated code is equivalent, but, is much more identical to what is actually being lowered. llvm-svn: 209267
* Move the verbose asm option to be part of the options struct andEric Christopher2014-05-203-27/+7
| | | | | | set appropriately. llvm-svn: 209258
* Update MachOObjectFile::getSymbolAddress so it returns UnknownAddressOrSizeKevin Enderby2014-05-201-3/+17
| | | | | | | | | | | | for undefined symbols, so it matches what COFFObjectFile::getSymbolAddress does. This allows llvm-nm to print spaces instead of 0’s for the value of undefined symbols in Mach-O files. To make this change other uses of MachOObjectFile::getSymbolAddress are updated to handle when the Value is returned as UnknownAddressOrSize. Which is needed to keep two of the ExecutionEngine tests working for example. llvm-svn: 209253
* Revert "DebugInfo: Assume all subprogram DIEs have been created before any ↵David Blaikie2014-05-201-5/+5
| | | | | | | | | | | | | | abstract subprograms are constructed." This reverts commit r209178. This seems to be asserting in an LTO build on some internal Apple buildbots. No upstream reproduction (and I don't have an LLVM-aware gold built right now to reproduce it personally) but it's a small patch & the failure's semi-plausible so I'm going to revert first while I try to reproduce this. llvm-svn: 209251
* [ARM64] PR19792: Fix cycle in DAG after performPostLD1CombineAdam Nemet2014-05-201-1/+6
| | | | | | | | | | | | | | | | | | | Povray and dealII currently assert with "Overran sorted position" in AssignTopologicalOrder. The problem is that performPostLD1Combine can introduce cycles. Consider: (insert_vector_elt (INSERT_SUBREG undef, (load (add %vreg0, Constant<8>), undef), <= A TargetConstant<2>), (load %vreg0, undef), <= B Constant<1>) This is turned into a LD1LANEpost node. However the address in A is not a valid user of the post-incremented address of B in LD1LANEpost. llvm-svn: 209242
* Unbreak the sanitizer buildbots after r209226 due to SROA issue described in ↵David Blaikie2014-05-201-4/+7
| | | | | | | | | | | | | | | http://reviews.llvm.org/D3714 Undecided whether this should include a test case - SROA produces bad dbg.value metadata describing a value for a reference that is actually the value of the thing the reference refers to. For now, loosening the assert lets this not assert, but it's still bogus/wrong output... If someone wants to tell me to add a test, I'm willing/able, just undecided. Hopefully we'll get SROA fixed soon & we can tighten up this assertion again. llvm-svn: 209240
* Move the function and data section flags into the options struct andEric Christopher2014-05-201-15/+6
| | | | | | | | | | make the functions to set them non-static. Move and rename the llvm specific backend options to avoid conflicting with the clang option. Paired with a backend commit to update. llvm-svn: 209238
* Revert r209235 as it broke two tests:Kevin Enderby2014-05-201-10/+2
| | | | | | | | Failing Tests (2): LLVM :: ExecutionEngine/MCJIT/stubs-sm-pic.ll LLVM :: ExecutionEngine/MCJIT/stubs.ll llvm-svn: 209236
* Update MachOObjectFile::getSymbolAddress so it returns UnknownAddressOrSizeKevin Enderby2014-05-201-2/+10
| | | | | | | for undefined symbols. Allowing llvm-nm to print spaces instead of 0’s for the value of undefined symbols in Mach-O files. llvm-svn: 209235
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