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* Parse undef and unreachableChris Lattner2004-10-163-4/+24
| | | | llvm-svn: 17053
* Add supportChris Lattner2004-10-161-0/+1
| | | | llvm-svn: 17052
* Add support for undef and unreachableChris Lattner2004-10-163-8/+29
| | | | llvm-svn: 17051
* ADd support for undef and unreachableChris Lattner2004-10-161-4/+8
| | | | llvm-svn: 17050
* Teach the X86 backend about unreachable and undef. Among other things, weChris Lattner2004-10-161-1/+15
| | | | | | | | now compile: 'foo() {}' into "ret" instead of "mov EAX, 0; ret" llvm-svn: 17049
* Add support for unreachable and undefChris Lattner2004-10-161-2/+10
| | | | llvm-svn: 17048
* Optimize instructions involving undef values. For example X+undef == undef.Chris Lattner2004-10-161-27/+125
| | | | llvm-svn: 17047
* Add support for UndefValueChris Lattner2004-10-161-1/+2
| | | | llvm-svn: 17046
* When promoting mem2reg, make uninitialized values become undef isntead of 0.Chris Lattner2004-10-161-9/+9
| | | | llvm-svn: 17045
* Handle undef values as undefined on the constant latticeChris Lattner2004-10-161-3/+6
| | | | | | ignore unreachable instructions llvm-svn: 17044
* Add noteChris Lattner2004-10-161-0/+1
| | | | llvm-svn: 17043
* Add support for the undef value. Implement a new optimization based on globalsChris Lattner2004-10-161-22/+56
| | | | | | | that are initialized with undef. When promoting malloc to a global, start out initialized to undef llvm-svn: 17042
* Add support for undef and unreachableChris Lattner2004-10-164-1/+14
| | | | llvm-svn: 17041
* Implement UndefValue classChris Lattner2004-10-161-0/+45
| | | | llvm-svn: 17040
* Add a missing dependencyChris Lattner2004-10-161-1/+1
| | | | llvm-svn: 17031
* Fix file headerChris Lattner2004-10-161-1/+1
| | | | llvm-svn: 17030
* Be more careful about looking for constants when we really want constantint's.Chris Lattner2004-10-161-10/+8
| | | | llvm-svn: 17029
* Move the implementation of the instructions clone methods to this file soChris Lattner2004-10-151-0/+30
| | | | | | | that the vtables for these classes are only instantiated in this translation unit, not in every xlation unit they are used. llvm-svn: 17026
* There is no reason not to build these in parallelChris Lattner2004-10-151-1/+2
| | | | llvm-svn: 17023
* Add a space between the type and name of value when printing error messageMisha Brukman2004-10-151-1/+1
| | | | llvm-svn: 17022
* Don't print a bunch of metrics that are meaningless for external functionsChris Lattner2004-10-151-17/+20
| | | | llvm-svn: 17017
* Instruction select globals with offsets better. For example, on this testChris Lattner2004-10-151-7/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | case: int C[100]; int foo() { return C[4]; } We now codegen: foo: mov %EAX, DWORD PTR [C + 16] ret instead of: foo: mov %EAX, OFFSET C mov %EAX, DWORD PTR [%EAX + 16] ret Other impressive features may be coming later. This patch is contributed by Jeff Cohen! llvm-svn: 17011
* Give the X86 JIT the ability to encode global+disp constants. PatchChris Lattner2004-10-151-27/+54
| | | | | | contributed by Jeff Cohen! llvm-svn: 17010
* Give the X86 asm printer the ability to print out addressing modes that haveChris Lattner2004-10-151-25/+53
| | | | | | constant displacements from global variables. Patch by Jeff Cohen! llvm-svn: 17009
* Allow X86 addressing modes to represent globals with offsets. Patch contributedChris Lattner2004-10-151-5/+10
| | | | | | by Jeff Cohen! llvm-svn: 17008
* Allow machine operands to represent global variables with offsets. This isChris Lattner2004-10-151-5/+9
| | | | | | | | | | | | | | | | | useful when you have a reference like: int A[100]; void foo() { A[10] = 1; } In this case, &A[10] is a single constant and should be treated as such. Only MO_GlobalAddress and MO_ExternalSymbol are allowed to use this field, no other operand type is. This is another fine patch contributed by Jeff Cohen!! llvm-svn: 17007
* This patch fixes the nasty bug that caused 175.vpr to fail for X86 last night.Chris Lattner2004-10-151-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | The problem occurred when trying to reload this instruction: MOV32mr %reg2326, 8, %reg2297, 4, %reg2295 The value of reg2326 was available in EBX, so it was reused from there, instead of reloading it into EDX. The value of reg2297 was available in EDX, so it was reused from there, instead of reloading it into EDI. The value of reg2295 was not available, so we tried reloading it into EBX, its assigned register. However, we checked and saw that we already reloaded something into EBX, so we chose what reg2326 was assigned to (EDX) and reloaded into that register instead. Unfortunately EDX had already been used by reg2297, so reloading into EDX clobbered the value used by the reg2326 operand, breaking the program. The fix for this is to check that the newly picked register is ok. In this case we now find that EDX is already used and try using EDI, which succeeds. llvm-svn: 17006
* This patch adds and improves debugging output. No functionality changes.Chris Lattner2004-10-151-3/+7
| | | | llvm-svn: 17005
* Better codegen of binary integer ops with 32 bit immediate operands.Nate Begeman2004-10-151-2/+22
| | | | | | | | | | | | | | | | | | | | This transformation fires a few dozen times across the testsuite. For example, int test2(int X) { return X ^ 0x0FF00FF0; } Old: _test2: lis r2, 4080 ori r2, r2, 4080 xor r3, r3, r2 blr New: _test2: xoris r3, r3, 4080 xori r3, r3, 4080 blr llvm-svn: 17004
* The field is called `imm22', not simply `imm'Misha Brukman2004-10-141-1/+1
| | | | llvm-svn: 17003
* Synthetic instructions RET and RETL need to have all 3 parameters specifiedMisha Brukman2004-10-141-4/+6
| | | | llvm-svn: 17002
* Class F2_1 already inherits the imm22 field from class F2Misha Brukman2004-10-141-1/+0
| | | | llvm-svn: 17001
* Generate the SparcV8 code emitter from .td filesMisha Brukman2004-10-141-1/+5
| | | | llvm-svn: 17000
* * In the F3_1 class, default asi to 0 because it's not currently usedMisha Brukman2004-10-141-2/+1
| | | | | | * In the F3_3 class, remove mention of asi because it's not part of the format llvm-svn: 16999
* Fix a bug John tracked down in libstdc++ where we were incorrectly deletingChris Lattner2004-10-141-1/+2
| | | | | | weak functions. Thanks for finding this John! llvm-svn: 16997
* Add FSTOI, FDTOI (fp to integer cast) instructions.Brian Gaeke2004-10-141-0/+4
| | | | llvm-svn: 16996
* Rewrite emitCastOperation, refactoring parts of it into emitIntegerCast, andBrian Gaeke2004-10-141-54/+92
| | | | | | adding emitFPToIntegerCast. llvm-svn: 16995
* Add list of libc procedures we'll use, at some point.Brian Gaeke2004-10-141-6/+14
| | | | | | | Update list of currently failing tests. ADJCALLSTACK* support is done. llvm-svn: 16994
* Make sure any client of Dominators.h links in Dominators.cppChris Lattner2004-10-141-0/+2
| | | | | | Patch by Morten Ofstad llvm-svn: 16987
* Do not use the same variable name for two different variables in theChris Lattner2004-10-141-3/+2
| | | | | | | same scope. This confused VC++ (and probably people too!). Patch by Morten Ofstad! llvm-svn: 16985
* * Claim to support machine code emission - return false fromMisha Brukman2004-10-141-4/+26
| | | | | | | | | addPassesToEmitMachineCode() * Add support for registers and constants in getMachineOpValue() This enables running "int main() { ret 0 }" via the PowerPC JIT. llvm-svn: 16983
* * Include the real (generated) version of getBinaryCodeForInstr()Misha Brukman2004-10-141-10/+20
| | | | | | | | | * Add implementation of getMachineOpValue() for generated code emitter * Convert assert()s in unimplemented functions to abort()s so that non-debug builds fail predictably * Add file header comments llvm-svn: 16981
* * Make a PPC32-specific code emitter because we have separate classes for 32-Misha Brukman2004-10-141-6/+6
| | | | | | | | | | and 64-bit code emitters that cannot share code unless we use virtual functions * Identify components being built by tablegen with more detail by assigning them to PowerPC, PPC32, or PPC64 more specifically; also avoids seeing 'building PowerPC XYZ' messages twice, where one is for PPC32 and one for PPC64 llvm-svn: 16980
* Checking in code that works on my simple test case. However, there is still ↵Tanya Lattner2004-10-141-104/+205
| | | | | | a bug with branches that I need to fix. llvm-svn: 16979
* There is only one field in an instruction, and that is `Inst', the final view ofMisha Brukman2004-10-141-51/+51
| | | | | | | the instruction binary format, all others are simply operands and should not have the `field' label llvm-svn: 16978
* PowerPC instruction definitions use LittleEndian-style encoding [0..31]Misha Brukman2004-10-143-0/+6
| | | | llvm-svn: 16977
* Add isLittleEndianEncoding to InstrInfo class, defaults to `off'Misha Brukman2004-10-141-0/+6
| | | | llvm-svn: 16976
* When converting phi nodes into select instructions, we shouldn't promote PHIChris Lattner2004-10-141-41/+93
| | | | | | | | nodes unless we KNOW that we are able to promote all of them. This fixes: test/Regression/Transforms/SimplifyCFG/PhiNoEliminate.ll llvm-svn: 16973
* Allow this file to compile on Darwin.Reid Spencer2004-10-141-0/+1
| | | | llvm-svn: 16971
* Use __MINGW instead of __MING. Patch contributed by Henrik Bach.Reid Spencer2004-10-141-1/+1
| | | | llvm-svn: 16970
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