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* Linker: Copy metadata when linking declarations.Peter Collingbourne2016-06-242-4/+14
| | | | | | Differential Revision: http://reviews.llvm.org/D21624 llvm-svn: 273692
* [codeview] Use one byte for S_FRAMECOOKIE CookieKind and add flags byteReid Kleckner2016-06-242-2/+3
| | | | | | | | | | We bailed out while printing codeview for an MSVC compiled SemaExprCXX.cpp that used this record. The MS reference headers look incorrect here, which is probably why we had this bug. They use a 32-bit enum as the field type, but the actual record appears to use one byte for the cookie kind followed by a flags byte. llvm-svn: 273691
* [MDT] Always verify machine dominfo if expensive checking is enabled.Chad Rosier2016-06-241-2/+2
| | | | llvm-svn: 273690
* [codeview] Emit base class information from DW_TAG_inheritance nodesReid Kleckner2016-06-242-3/+49
| | | | | | | | | | | | | | | | There are two remaining issues here: 1. No vbptr information 2. Need to mention indirect virtual bases Getting indirect virtual bases is just a matter of adding an "indirect" flag, emitting them in the frontend, and ignoring them when appropriate for DWARF. All virtual bases use the same artificial vbptr field, so I think the vbptr offset will be best represented by an implicit __vbptr$ClassName member similar to our existing __vptr$ member. llvm-svn: 273688
* [LV] Preserve order of dependences in interleaved accesses analysisMatthew Simpson2016-06-241-54/+205
| | | | | | | | | | | | | | | | | | | | | | | | | | The interleaved access analysis currently assumes that the inserted run-time pointer aliasing checks ensure the absence of dependences that would prevent its instruction reordering. However, this is not the case. Issues can arise from how code generation is performed for interleaved groups. For a load group, all loads in the group are essentially moved to the location of the first load in program order, and for a store group, all stores in the group are moved to the location of the last store. For groups having members involved in a dependence relation with any other instruction in the loop, this reordering can violate the dependence. This patch teaches the interleaved access analysis how to avoid breaking such dependences, and should fix PR27626. An assumption of the original analysis was that the accesses had been collected in "program order". The analysis was then simplified by visiting the accesses bottom-up. However, this ordering was never guaranteed for anything other than single basic block loops. Thus, this patch also enforces the desired ordering. Reference: https://llvm.org/bugs/show_bug.cgi?id=27626 Differential Revision: http://reviews.llvm.org/D19984 llvm-svn: 273687
* Remangle intrinsics names when types are renamedArtur Pilipenko2016-06-244-2/+79
| | | | | | | | | | | | | This is a resubmittion of previously reverted rL273568. This is a fix for the problem mentioned in "LTO and intrinsics mangling" llvm-dev mail thread: http://lists.llvm.org/pipermail/llvm-dev/2016-April/098387.html Reviewers: mehdi_amini, reames Differential Revision: http://reviews.llvm.org/D19373 llvm-svn: 273686
* NFC. Move verifyIntrinsicIsVarArg from verifier to ↵Artur Pilipenko2016-06-242-30/+22
| | | | | | Intrinsic::matchIntrinsicVarArg since it will be reused for intrinsic remangling code llvm-svn: 273685
* ExecutionEngine: silence unused value warningSaleem Abdulrasool2016-06-241-0/+3
| | | | | | | The Value is only used in debug or asserts builds. Just cast to void to silence an unused variable warning. llvm-svn: 273684
* ExecutionEngine: add preliminary support for COFF ARMSaleem Abdulrasool2016-06-242-5/+294
| | | | | | | | | This adds rudimentary support for COFF ARM to the dynamic loader for the exeuction engine. This can be used by lldb to JIT code into a COFF ARM environment. This lays the foundation for the loader, though a few of the relocation types are yet unhandled. llvm-svn: 273682
* Make sure Format is always initialized.Rafael Espindola2016-06-241-0/+5
| | | | | | Should fix the msan bots. llvm-svn: 273679
* [MachineDominatorTree] Add a MDT verifier.Chad Rosier2016-06-241-0/+30
| | | | | | Differential Revision: http://reviews.llvm.org/D21657 llvm-svn: 273678
* Use existing predicate. NFC.Rafael Espindola2016-06-241-5/+1
| | | | | | This doesn't handle ELF, but neither did the previous code. llvm-svn: 273677
* Merge two identical if branches. NFC.Rafael Espindola2016-06-241-14/+11
| | | | llvm-svn: 273674
* Merge two identical if branches. NFC.Rafael Espindola2016-06-241-11/+3
| | | | llvm-svn: 273673
* clang-format a region. NFC.Rafael Espindola2016-06-241-4/+4
| | | | llvm-svn: 273672
* [LICM] Avoid repeating expensive call while promoting loads. NFCAnna Thomas2016-06-241-3/+4
| | | | | | | | | | | | | | | Summary: We can avoid repeating the check `isGuaranteedToExecute` when it's already called once while checking if the alignment can be widened for the load/store being hoisted. The function is invariant for the same instruction `UI` in `isGuaranteedToExecute(*UI, DT, CurLoop, SafetyInfo);` Reviewers: hfinkel, eli.friedman Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D21672 llvm-svn: 273671
* AMDGPU: Add stub custom CodeGenPrepare passMatt Arsenault2016-06-244-0/+88
| | | | | | | | This will do various things including ones CodeGenPrepare does, but with knowledge of uniform values. llvm-svn: 273657
* AMDGPU: Remove disable-irstructurizer subtarget featureMatt Arsenault2016-06-244-14/+7
| | | | | | | | The only real reason to use it is for testing, so replace it with a command line option instead of a potentially function dependent feature. llvm-svn: 273653
* AMDGPU: Cleanup subtarget handling.Matt Arsenault2016-06-2458-706/+879
| | | | | | | | | Split AMDGPUSubtarget into amdgcn/r600 specific subclasses. This removes most of the static_casting of the basic codegen classes everywhere, and tries to restrict the features visible on the wrong target. llvm-svn: 273652
* Switch more loops to be range-basedDavid Majnemer2016-06-2414-68/+52
| | | | | | | This makes the code a little more concise, no functional change is intended. llvm-svn: 273644
* [X86] Combine two nearby calls to isSingleInputShuffleVector. NFCCraig Topper2016-06-241-6/+4
| | | | llvm-svn: 273643
* Teaching SimplifyCFG to recognize the Or-Mask trick that InstCombine uses toChuang-Yu Cheng2016-06-241-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | reduce the number of comparisons. Specifically, InstCombine can turn: (i == 5334 || i == 5335) into: ((i | 1) == 5335) SimplifyCFG was already able to detect the pattern: (i == 5334 || i == 5335) to: ((i & -2) == 5334) This patch supersedes D21315 and resolves PR27555 (https://llvm.org/bugs/show_bug.cgi?id=27555). Thanks to David and Chandler for the suggestions! Author: Thomas Jablin (tjablin) Reviewers: majnemer chandlerc halfdan cycheng http://reviews.llvm.org/D21397 llvm-svn: 273639
* BitcodeWriter: Remove redundant (and incorrect) check for whether to emit ↵Peter Collingbourne2016-06-241-3/+0
| | | | | | | | | | | | | | | module summary. The function name Module::empty() is slightly misleading in that it only tests for the presence of functions in the module. However we still want to emit the module summary if the module contains only global variables or aliases. The presence of such entities can be determined simply by checking the summary directly, as we are doing below. Differential Revision: http://reviews.llvm.org/D21669 llvm-svn: 273638
* Attempt to fix MSVC breakage caused by r273636.George Burgess IV2016-06-241-9/+13
| | | | | | Apparently earlier versions of MSVC don't have constexpr bitset ctors. llvm-svn: 273637
* [CFLAA] Propagate StratifiedAttrs in interproc. analysis.George Burgess IV2016-06-242-54/+122
| | | | | | | | | | | | | | | | | This patch also has a refactor that kills StratifiedAttr, and leaves us with StratifiedAttrs, because having both was mildly redundant. This patch makes us correctly handle stratified attributes when doing interprocedural analysis. It also adds another attribute, AttrCaller, which acts like AttrUnknown. We can filter out AttrCaller values when during interprocedural analysis, since the caller should have information about what arguments it's passing to its callee. Patch by Jia Chen. Differential Revision: http://reviews.llvm.org/D21645 llvm-svn: 273636
* [ARM] Use aapcs_vfp for ___truncdfhf2 on v7k.Ahmed Bougacha2016-06-241-11/+13
| | | | | | | r215348 overrode the f16 libcalls to be soft-float, but v7k uses the default (hard-float) calling convention. llvm-svn: 273631
* [AArch64] Model the cost of vector by element FP multiplies on Exynos M1. (NFC)Evandro Menezes2016-06-231-0/+6
| | | | llvm-svn: 273630
* Support/ELF: Add R_AMDGPU_GOTPCREL relocationTom Stellard2016-06-231-0/+7
| | | | | | | | | | | | | Summary: We will start generating this in a future patch. Reviewers: arsenm, kzhuravl, rafael, ruiu, tony-tye Subscribers: arsenm, llvm-commits, kzhuravl Differential Revision: http://reviews.llvm.org/D21482 llvm-svn: 273628
* [MachOYAML] Use a temporary to avoid gcc strict-aliasing warningChris Bieneman2016-06-231-2/+4
| | | | | | GCC complains about this with -Wstrict-aliasing. Using a temporary here should prevent the warning. llvm-svn: 273627
* [codeview] Add classes and unions to the Local/Global UDTs listsHans Wennborg2016-06-232-19/+29
| | | | | | Differential Revision: http://reviews.llvm.org/D21655 llvm-svn: 273626
* [yaml2macho] Removing asserts in favor of explicit yaml parse errorChris Bieneman2016-06-231-2/+4
| | | | | | | | | | | | 32-bit Mach headers don't have reserved fields. When generating the mapping for 32-bit headers leaving off the reserved field will result in parse errors if the field is present in the yaml. Added a CHECK-NOT line to ensure that mach_header.yaml isn't adding a reserved field, and a test to ensure that the parser error gets hit with 32-bit headers. llvm-svn: 273623
* MachineScheduler: Followup to debug message changesMatthias Braun2016-06-231-1/+0
| | | | | | | Do not dump intermediate state of the pending queue anymore now that we always dump the final state before picking. llvm-svn: 273618
* Codegen: [X86] preservere memory refs for folded umul_lohiKyle Butt2016-06-231-2/+10
| | | | | | | | | Memory references were not being propagated for this folded load. This prevented optimizations like LICM from hoisting the load. Added test to verify that this allows LICM to proceed. llvm-svn: 273617
* Codegen: LICM Remove check for exactly 1 register def.Kyle Butt2016-06-231-1/+0
| | | | | | | | | | | | | | | | | | When considering whether to split an instruction with a memory operand into an explicit load and a register-based instruction, we currently check that the resulting instruction has exactly 1 def. This prevents 2 important LICM optimizations: compares with memory operands, and double indirect calls. All the tests and the test-suite pass without the check. My guess as to original intent is to limit the additional register pressure created by the new instruction, but given that we only split out a single register, it is already limited. The licm-dominance test now checks actual memory loads for hoisting instead of undef, and it tests compares. hoist-invariant-load.ll now checks for 2 hoists, the intended hoist, and a bonus from calling a got-relative function in a loop. llvm-svn: 273616
* MachineScheduler: Improve debug messagesMatthias Braun2016-06-231-7/+7
| | | | | | | Consistenly display available and pending queues immediately before the scheduling choice is done. llvm-svn: 273615
* Uses shouldAssumeDSOLocal.Rafael Espindola2016-06-231-10/+2
| | | | | | With that SystemZ knows to avoid a GOT for PIE. llvm-svn: 273614
* Attempt #2 to unbreak bots broken by r273596.George Burgess IV2016-06-232-4/+4
| | | | | | | | Some of the bots running GCC 4.7 seem to be having trouble with lambdas that explicitly capture `this`. Relevant-looking bug: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53137 llvm-svn: 273613
* Refactor to use shouldAssumeDSOLocal. NFC.Rafael Espindola2016-06-231-10/+14
| | | | llvm-svn: 273612
* [libfuzzer] moving is_ascii handler inside mutation dispatcher.Mike Aizatsky2016-06-236-60/+65
| | | | | | | | Summary: It also fixes a bug, when first random might not be ascii. Differential Revision: http://reviews.llvm.org/D21573 llvm-svn: 273611
* InstCombine rule to fold trunc when value availableAnna Thomas2016-06-232-21/+82
| | | | | | | | | | | | | | Summary: This instcombine rule folds away trunc operations that have value available from a prior load or store. This kind of code can be generated as a result of GVN widening the load or from source code as well. Reviewers: reames, majnemer, sanjoy Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D21246 llvm-svn: 273608
* AMDGPU: Add option to disable spilling SGPRs to VGPRs.Matt Arsenault2016-06-231-2/+9
| | | | | | This can help debug spilling problems. llvm-svn: 273605
* Attempt to fix breakage caused by r273596.George Burgess IV2016-06-231-3/+3
| | | | llvm-svn: 273601
* [CFLAA] Use better interprocedural function summaries.George Burgess IV2016-06-232-92/+130
| | | | | | | | | | | | | Previously, we just unified any arguments that seemed to be related to each other. With this patch, we now respect dereference levels, etc. which should make us substantially more accurate. Proper handling of StratifiedAttrs will be done in a later patch. Patch by Jia Chen. Differential Revision: http://reviews.llvm.org/D21536 llvm-svn: 273596
* Refactor duplicated code. NFC.Rafael Espindola2016-06-231-20/+17
| | | | llvm-svn: 273595
* [X86] Extract HiPE prologue constants into metadataMichael Kuperstein2016-06-231-3/+31
| | | | | | | | | | | | | | | | | | | | | | X86FrameLowering::adjustForHiPEPrologue() contains a hard-coded offset into an Erlang Runtime System-internal data structure (the PCB). As the layout of this data structure is prone to change, this poses problems for maintaining compatibility. To address this problem, the compiler can produce this information as module-level named metadata. For example (where P_NSP_LIMIT is the offending offset): !hipe.literals = !{ !2, !3, !4 } !2 = !{ !"P_NSP_LIMIT", i32 152 } !3 = !{ !"X86_LEAF_WORDS", i32 24 } !4 = !{ !"AMD64_LEAF_WORDS", i32 24 } Patch by Magnus Lang Differential Revision: http://reviews.llvm.org/D20363 llvm-svn: 273593
* Fix the wasm build by including EndianStream.hReid Kleckner2016-06-231-0/+1
| | | | llvm-svn: 273591
* [IRCE] Use getTerminator instead of rbegin; NFCSanjoy Das2016-06-231-5/+5
| | | | llvm-svn: 273586
* Preserve DebugInfo when replacing values in DAGCombinerNirav Dave2016-06-236-18/+28
| | | | | | | | | | | | | | | | | | | | | Recommiting after correcting over-eager Debug Value transfer fixing PR28270. [DAG] Previously debug values would transfer debuginfo for the selected start node for a replacement which allows for debug to be dropped. Push debug value transfer to occur with node/value replacement in SelectionDAG, remove now extraneous transfers of debug values. This refixes PR9817 which was being incompletely checked in the testsuite. Reviewers: jyknight Subscribers: dblaikie, llvm-commits Differential Revision: http://reviews.llvm.org/D21037 llvm-svn: 273585
* [ValueTracking] simplify logic in ComputeNumSignBits (NFCI)Sanjay Patel2016-06-231-16/+9
| | | | | | | | | | | This was noted in http://reviews.llvm.org/D21610 . The previous code predated the use of APInt ( http://reviews.llvm.org/rL47654 ), so it had to account for the fixed width of uint64_t. Now that we're using the variable width APInt, we can remove some complexity. llvm-svn: 273584
* [ARM] Lower (select_cc k k (select_cc ~k ~k x)) into (SSAT l_k x)Pablo Barrio2016-06-234-1/+141
| | | | | | | | | | | | | | | | | Summary: SSAT saturates an integer, making sure that its value lies within an interval [-k, k]. Since the constant is given to SSAT as the number of bytes set to one, k + 1 must be a power of 2, otherwise the optimization is not possible. Also, the select_cc must use < and > respectively so that they define an interval. Reviewers: mcrosier, jmolloy, rengolin Subscribers: aemerson, rengolin, llvm-commits Differential Revision: http://reviews.llvm.org/D21372 llvm-svn: 273581
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