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llvm-svn: 5226
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* Implement support for MRMS?m instructions
* Add Arg64 support
* Add support for frame indexes and constant pool indexes
*
llvm-svn: 5225
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* Add support for the constant pool & constant pool indices
* Add support for MRMS?m instructions
* Fix FP Prefix emission
* Add support for global addresses and external symbols
llvm-svn: 5224
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* Support arbitrary FP constants
* Fix bugs in frame layout for function calls and incoming arguments
* Insert copies for constant arguments to PHI nodes into the BOTTOM of
predecessor blocks, not the top.
* Implement _floating point_ support: setcc, return, load, store, cast
* Fix several bugs in the cast instruction
* Abstract out call emission and load/store for FP
* Implement malloc/free without previous lowering pass.
* Make use of new forms of MachineOperand
* Implement _long_ support!
* Fix many bugs in FP support
* Change branch from je/jne to je/jmp
* Simplify code generated for GEP instructions
llvm-svn: 5223
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llvm-svn: 5222
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llvm-svn: 5221
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llvm-svn: 5220
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* Convert to use PHIElimination pass
* Don't spill values which have just been reloaded (big win reducing spills)
* Add experimental support for eliminating spills before TwoAddress
instructions. It currently is broken so it is #ifdef'd out.
* Use new "is terminator" flag on instructions instead of looking for
branches and returns explicitly.
llvm-svn: 5219
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llvm-svn: 5218
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llvm-svn: 5217
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Add helper methods for MachineFrameInfo
llvm-svn: 5216
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llvm-svn: 5215
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llvm-svn: 5204
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Rename MachineCacheInfo to TargetCacheInfo
llvm-svn: 5203
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Rename MachineCacheInfo to TargetCacheInfo
llvm-svn: 5202
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llvm-svn: 5201
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llvm-svn: 5200
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llvm-svn: 5199
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of the abstract frame representation
llvm-svn: 5198
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llvm-svn: 5197
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* Use new FunctionFrameInfo object to manage stack slots instead of doing
it directly
* Adjust to new MRegisterInfo API
* Don't take a TM as a ctor argument
* Don't keep track of which callee saved registers are modified
* Don't emit prolog/epilog code or spill/restore code for callee saved regs
* Use new allocation_order_begin/end iterators to simplify dramatically the
logic for picking registers to allocate
* Machine PHI nodes can no longer contain constant arguments
* Use a bitvector to keep track of registers used instead of a set
* Fix problem where explicitly referenced registers would be added to
regsused set and never removed
llvm-svn: 5196
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* Use new FunctionFrameInfo object to manage stack slots instead of doing
it directly
* Adjust to new MRegisterInfo API
* Don't take a TM as a ctor argument
* Don't keep track of which callee saved registers are modified
* Don't emit prolog/epilog code or spill/restore code for callee saved regs
* Use new allocation_order_begin/end iterators to simplify dramatically the
logic for picking registers to allocate
* Machine PHI nodes can no longer contain constant arguments
llvm-svn: 5195
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llvm-svn: 5194
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into a new MachineFunctionInfo class
* Implement new FunctionFrameInfo class
llvm-svn: 5193
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llvm-svn: 5192
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llvm-svn: 5191
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llvm-svn: 5190
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llvm-svn: 5189
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* most pass ctors no longer take TM arguments
* New prolog/epilog insertion pass
llvm-svn: 5188
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llvm-svn: 5187
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* Include contents of X86RegisterClasses.cpp into here
* Adjustments to register api to work with new frame manager
* Eliminate moveImm2Reg, getFramePointer, and getStackPointer
* Cleanup and simplify prolog/epilog code generation
* Prolog/epilog are MUCH more efficient now.
llvm-svn: 5186
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llvm-svn: 5185
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any longer.
llvm-svn: 5184
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* Remove some size suffixes [bwl]
* Add new ADJCALLSTACKDOWN & ADJCALLSTACKUP pseudo instrs
* Call instructions are M_CALL not M_BRANCH!
* Disable push and pop instructions
* Add new ANDri32 instr
llvm-svn: 5183
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llvm-svn: 5182
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* New createPrologEpilogCodeInserter() function
llvm-svn: 5181
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* Don't take a TM as a ctor parameter
* Print [X - Y] instead of [X + -Y] when possible
llvm-svn: 5180
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* ctor doesn't take TM argument
* handle direct ESP references correctly!
llvm-svn: 5179
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fixed size allocas
* Revamp call emission to work with new frame manager
llvm-svn: 5178
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* Constant pool and frame info is no longer directly in MachineFunction
llvm-svn: 5177
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* Move some sparc specific code here from Target files
llvm-svn: 5176
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* s/unsigned int/unsigned/
llvm-svn: 5175
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* Constpool & frame info is no longer directly in MachineFunction
llvm-svn: 5174
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llvm-svn: 5173
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* Frame information is now stuck in MachineFunctionInfo instead of directly
in MachineFunction.
* Don't require a TM as an argument to the ctor
llvm-svn: 5172
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* Changes because frame info is not in MachineFunction directly anymore
llvm-svn: 5171
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llvm-svn: 5157
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* Add initial support for FP constants
* Add initial FP support for several instructions
llvm-svn: 5154
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* Mark CALLpcrel as a RawFrm instruction as required
* Eliminate invalid BSWAP16 instruction
* Add xchg instructions
* Add initial support for FP instructions
llvm-svn: 5153
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Add Pseudo instr class
llvm-svn: 5152
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