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* - Add AVX form of all SSE2 logical instructionsBruno Cardoso Lopes2010-06-302-22/+99
| | | | | | - Add VEX encoding bits to x86 MRM0r-MRM7r llvm-svn: 107238
* Do not construct DIE for already processed MDNode.Devang Patel2010-06-301-1/+2
| | | | llvm-svn: 107237
* Use skipInstruction() as a simpler way of iterating over instructions using ↵Jakob Stoklund Olesen2010-06-301-10/+2
| | | | | | SrcReg llvm-svn: 107234
* Use clEnumValN macro to work around keyword clashJakob Stoklund Olesen2010-06-301-1/+1
| | | | llvm-svn: 107233
* Add variables into a scope before constructing scope DIE otherwise variables ↵Devang Patel2010-06-301-2/+2
| | | | | | won't be included DIE tree. llvm-svn: 107228
* Begin implementation of an inline spiller.Jakob Stoklund Olesen2010-06-293-1/+147
| | | | | | | | | | | InlineSpiller inserts loads and spills immediately instead of deferring to VirtRegMap. This is possible now because SlotIndexes allows instructions to be inserted and renumbered. This is work in progress, and is mostly a copy of TrivialSpiller so far. It works very well for functions that don't require spilling. llvm-svn: 107227
* Add *several* AVX integer packed binop instructionsBruno Cardoso Lopes2010-06-291-35/+109
| | | | llvm-svn: 107225
* Fix ScalarEvolution's tripcount computation for chains of loopsDan Gohman2010-06-291-41/+61
| | | | | | | where each loop's induction variable's start value is the exit value of a preceding loop. llvm-svn: 107224
* Revert r107205 and r107207.Bill Wendling2010-06-2917-46/+14
| | | | llvm-svn: 107215
* Print InlinedAt location.Devang Patel2010-06-291-7/+21
| | | | llvm-svn: 107214
* Add another bswap idiom that isn't matched.Eric Christopher2010-06-291-0/+8
| | | | llvm-svn: 107213
* Move SSE2 Packed Integer instructions around, and create specific sections ↵Bruno Cardoso Lopes2010-06-291-83/+113
| | | | | | for each of them llvm-svn: 107211
* Print InlinedAt location.Devang Patel2010-06-291-12/+23
| | | | llvm-svn: 107208
* Add AVX Move Aligned/Unaligned packed integersBruno Cardoso Lopes2010-06-291-12/+53
| | | | llvm-svn: 107206
* Introducing the "linker_weak" linkage type. This will be used for Objective-CBill Wendling2010-06-2917-14/+46
| | | | | | | | | | | | | | | | | | | metadata types which should be marked as "weak", but which the linker will remove upon final linkage. For example, the "objc_msgSend_fixup_alloc" symbol is defined like this: .globl l_objc_msgSend_fixup_alloc .weak_definition l_objc_msgSend_fixup_alloc .section __DATA, __objc_msgrefs, coalesced .align 3 l_objc_msgSend_fixup_alloc: .quad _objc_msgSend_fixup .quad L_OBJC_METH_VAR_NAME_1 This is different from the "linker_private" linkage type, because it can't have the metadata defined with ".weak_definition". llvm-svn: 107205
* Add AVX ld/st XCSR register.Bruno Cardoso Lopes2010-06-292-15/+26
| | | | | | Add VEX encoding bits for MRMXm x86 form llvm-svn: 107204
* Do not hardcode DW_AT_stmt_list value.Devang Patel2010-06-292-7/+17
| | | | | | Inspired by Artur Pietrek. llvm-svn: 107202
* Add support for encoding VDUP (ARM core register) instructions.Bob Wilson2010-06-291-0/+17
| | | | llvm-svn: 107201
* Fix the handling of partial redefines in the fast register allocator.Jakob Stoklund Olesen2010-06-291-17/+39
| | | | | | | | | | | A partial redefine needs to be treated like a tied operand, and the register must be reloaded while processing use operands. This fixes a bug where partially redefined registers were processed as normal defs with a reload added. The reload could clobber another use operand if it was a kill that allowed register reuse. llvm-svn: 107193
* Fix a register scavenger crash when dealing with undefined subregs.Bob Wilson2010-06-291-0/+18
| | | | | | | The LowerSubregs pass needs to preserve implicit def operands attached to EXTRACT_SUBREG instructions when it replaces those instructions with copies. llvm-svn: 107189
* Add AVX non-temporal storesBruno Cardoso Lopes2010-06-291-10/+52
| | | | llvm-svn: 107178
* Fix whitespace style.Dan Gohman2010-06-291-2/+2
| | | | llvm-svn: 107175
* Move non-temporal movs to their own sectionBruno Cardoso Lopes2010-06-291-34/+38
| | | | llvm-svn: 107168
* Add support for encoding NEON VMOV (from core register to scalar) instructions.Bob Wilson2010-06-291-6/+19
| | | | | | | The encoding is the same as VMOV (from scalar to core register) except that the operands are in different places. llvm-svn: 107167
* Add sqrt, rsqrt and rcp AVX instructionsBruno Cardoso Lopes2010-06-291-1/+67
| | | | llvm-svn: 107166
* skip dbg_value instructionsJim Grosbach2010-06-291-0/+2
| | | | llvm-svn: 107154
* The t2MOVi16 and t2MOVTi16 instructions do not set CPSR. Trying to addBob Wilson2010-06-291-2/+2
| | | | | | | a CPSR operand to them causes an assertion failure, so apparently these instructions haven't been getting a lot of use. llvm-svn: 107147
* use ArgOperand APIGabor Greif2010-06-291-6/+6
| | | | llvm-svn: 107145
* Return Changed. This required setting Changed if dbg metadataDuncan Sands2010-06-291-5/+7
| | | | | | | | is stripped off. Currently set unconditionally, since the API does not provide a way of working out if anything was actually stripped off. llvm-svn: 107142
* It seems clear that this should return Changed.Duncan Sands2010-06-291-1/+1
| | | | llvm-svn: 107141
* Add a VT argument to getMinimalPhysRegClass and replace the copy related usesRafael Espindola2010-06-296-9/+15
| | | | | | | | | of getPhysicalRegisterRegClass with it. If we want to make a copy (or estimate its cost), it is better to use the smallest class as more efficient operations might be possible. llvm-svn: 107140
* getMachineBasicBlockAddress returns a uintptr_t - don't truncateDuncan Sands2010-06-291-1/+1
| | | | | | | to unsigned only to extend back to a pointer sized value on the next line. llvm-svn: 107139
* The variable ValueSize is set to 1 on both code paths, and thenDuncan Sands2010-06-291-5/+1
| | | | | | ignored! Remove it. llvm-svn: 107138
* The variable "Value" is carefully set to Layout.getSymbolAddress,Duncan Sands2010-06-291-4/+0
| | | | | | but then not actually used - maybe a bug? Remove the variable. llvm-svn: 107137
* Remove unused calls to Lexer.getLoc and the pointless variable HasFillExpr.Duncan Sands2010-06-291-7/+0
| | | | llvm-svn: 107136
* Remove pointless variable LastDef.Duncan Sands2010-06-291-2/+0
| | | | llvm-svn: 107135
* Remove unused variable Loc and pointless variables unified_syntaxDuncan Sands2010-06-291-15/+4
| | | | | | and thumb_mode. llvm-svn: 107133
* use ArgOperand APIsGabor Greif2010-06-291-3/+3
| | | | llvm-svn: 107132
* Remove an unused and a pointless variable.Duncan Sands2010-06-291-3/+0
| | | | llvm-svn: 107131
* Remove pointless and unused variables.Duncan Sands2010-06-291-9/+0
| | | | llvm-svn: 107130
* encode operand initializations (at fixed index)Gabor Greif2010-06-291-12/+8
| | | | | | | | | in terms of Op<> and ArgOffset. This works for values of {0, 1} for ArgOffset. Please note that ArgOffset will become 0 soon and will go away eventually. llvm-svn: 107129
* Remove a pointless variable.Duncan Sands2010-06-291-5/+1
| | | | llvm-svn: 107128
* Remove initialized but otherwise unused variables.Duncan Sands2010-06-297-9/+0
| | | | llvm-svn: 107127
* Use a more obvious way to avoid compiling functions which are only used when ↵Benjamin Kramer2010-06-291-3/+2
| | | | | | XDEBUG is enabled. llvm-svn: 107125
* Jump through some silly hoops to make GCC accept that a function may not alwaysChandler Carruth2010-06-291-0/+3
| | | | | | be called. llvm-svn: 107124
* PR7503: uxtb16 is not available for ARMv7-M. Patch by Brian G. Lucas.Evan Cheng2010-06-291-2/+2
| | | | llvm-svn: 107122
* Change if-cvt options to something that actually as useable.Evan Cheng2010-06-291-4/+6
| | | | llvm-svn: 107121
* When processing loops for scheduling latencies (used for live outs on loopJim Grosbach2010-06-291-1/+4
| | | | | | | back-edges), make sure not to include dbg_value instructions in the count. Closing in on the end of rdar://7797940 llvm-svn: 107119
* Just as its not safe to blindly transfer the nsw bit from an addDan Gohman2010-06-291-5/+9
| | | | | | | | instruction to an add scev, it's not safe to blindly transfer the inbounds flag from a gep instruction to an nsw on the scev for the gep. llvm-svn: 107117
* Refactoring of arithmetic instruction classes with unary operatorBruno Cardoso Lopes2010-06-291-118/+60
| | | | llvm-svn: 107116
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