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* Fix llvm::CloneModule to correctly clone globals. Patch per bug report by ↵Eli Friedman2011-08-151-14/+13
| | | | | | Simon Moll on llvmdev. llvm-svn: 137654
* Fix predicates methods on Instruction to handle atomic load/store correctly.Eli Friedman2011-08-151-7/+15
| | | | llvm-svn: 137652
* Misc analysis passes that need to be aware of atomic load/store.Eli Friedman2011-08-154-19/+50
| | | | llvm-svn: 137650
* Atomic load/store support in LICM.Eli Friedman2011-08-152-10/+18
| | | | llvm-svn: 137648
* Enforce the constraint that Rt must be even on LDRD/STRD instructions in ARM ↵Owen Anderson2011-08-151-0/+15
| | | | | | | | mode. Update tests to reflect this fact. Patch by James Molloy. llvm-svn: 137647
* Remove dead classes.Owen Anderson2011-08-151-33/+0
| | | | llvm-svn: 137643
* The "landingpad" instruction will never be "trivially" dead.Bill Wendling2011-08-151-0/+4
| | | | llvm-svn: 137642
* Fix incorrect encoding of UMAAL and friends. Patch by James Molloy.Owen Anderson2011-08-151-2/+2
| | | | llvm-svn: 137641
* Simplify mapping to variable from its abstract variable info.Devang Patel2011-08-152-29/+18
| | | | | | When a variable is inlined multiple places, abstract variable keeps name, location, type etc.. info and all other concreate instances of the variable directly refers to abstract variable. llvm-svn: 137637
* Fix decoding LDRSB and LDRSH in Thumb1 mode. Patch by James Molloy.Owen Anderson2011-08-151-6/+7
| | | | llvm-svn: 137636
* Fix problems decoding the to/from-lane NEON memory instructions, and add a ↵Owen Anderson2011-08-152-4/+486
| | | | | | comprehensive NEON decoding testcase. llvm-svn: 137635
* Refactor.Devang Patel2011-08-152-5/+11
| | | | llvm-svn: 137632
* Refactor.Devang Patel2011-08-152-15/+9
| | | | llvm-svn: 137631
* Don't try to sink the landingpad instruction. It's immobile.Bill Wendling2011-08-151-2/+3
| | | | llvm-svn: 137629
* The landingpad instruction isn't loop-invariant.Bill Wendling2011-08-151-0/+3
| | | | llvm-svn: 137628
* Mark the SCC as "might unwind" if we run into a 'resume' instruction.Bill Wendling2011-08-151-2/+3
| | | | llvm-svn: 137627
* Skip the insertion iterator past the landingpad instruction if there.Bill Wendling2011-08-151-0/+1
| | | | llvm-svn: 137626
* Refactor. Global variables are part of compile unit so let CompileUnit ↵Devang Patel2011-08-154-129/+144
| | | | | | create new global variable. llvm-svn: 137621
* Refactor. A subprogram is part of compile unit so let CompileUnit construct ↵Devang Patel2011-08-154-114/+141
| | | | | | new subprogram. llvm-svn: 137618
* Update comment to reflect MC target machine refactor.Jim Grosbach2011-08-151-1/+1
| | | | llvm-svn: 137615
* Add inlining for the new EH scheme.Bill Wendling2011-08-141-17/+146
| | | | | | | | | | | | | This builds off of the current scheme, but instead of llvm.eh.exception and llvm.eh.selector, it uses the landingpad instruction. And instead of llvm.eh.resume, it uses the resume instruction. Because of the invariants in the landing pad instruction, a lot of code that's currently needed to find the appropriate intrinsic calls for an invoke instruction won't be needed once we go to the new EH scheme. The "FIXME"s tell us what to remove after we switch. llvm-svn: 137576
* This transform is not safe. Thanks to Eli for pointing that out!Nick Lewycky2011-08-141-8/+1
| | | | llvm-svn: 137575
* Don't attempt to add 'nsw' when intermediate instructions had no such guarantee.Nick Lewycky2011-08-141-4/+7
| | | | llvm-svn: 137572
* Teach instcombine to preserve the nsw bit by doing an after-the-fact analysisNick Lewycky2011-08-141-3/+54
| | | | | | when combining add and sub instructions. Patch by Pranav Bhandarkar! llvm-svn: 137570
* EE: Provide the symbol "lseek64" explicitly with <unistd.h> on Linux glibc.NAKAMURA Takumi2011-08-142-0/+2
| | | | | | With libcxx, it seems <unistd.h> would not be provided. Thanks to Ryuta Suzuki. llvm-svn: 137567
* Fix PR 10635. When generating integer constants, the constant element type mayNadav Rotem2011-08-131-0/+7
| | | | | | | be illegal, even if the requested vector type is legal. Testcase is one of the disabled ARM tests in the vector-select patch. llvm-svn: 137562
* Expand VMOVQQQQ pseudo instructions.Bob Wilson2011-08-131-0/+46
| | | | | | | Apparently we never added code to expand these pseudo instructions, and in over a year, no one has noticed. Our register allocator must be awesome! llvm-svn: 137551
* Remove the last improper use of getGlobalContext() from LLVM.Nick Lewycky2011-08-131-18/+1
| | | | | | | | | | | | This caused a race condition where a thread calls ~LLVMContextImpl which calls Module::dropAllReferences which calls begin() on an empty ilist that would create the sentinel, which racily accesses the global context. This can not be fixed by locking inside createSentinel because the lock would need to be shared with all users of the global context, including those that reside outside LLVM's own code. llvm-svn: 137546
* Move "atomic" and "volatile" designations on instructions after the opcodeEli Friedman2011-08-123-48/+83
| | | | | | | | | | of the instruction. Note that this change affects the existing non-atomic load and store instructions; the parser now accepts both forms, and the change is noted in the release notes. llvm-svn: 137527
* ARM STR_POST_IMM offset encoding fix in load/store optimizer.Jim Grosbach2011-08-121-13/+10
| | | | | | | | | Tidy up the code a bit and push the definition of the value next to the uses to try to minimize this sort of issue from arising again while I'm at it. rdar://9945172 llvm-svn: 137525
* Fix comment!Bruno Cardoso Lopes2011-08-121-3/+3
| | | | llvm-svn: 137521
* The VPERM2F128 is a AVX instruction which permutes between two 256-bitBruno Cardoso Lopes2011-08-127-0/+132
| | | | | | | | vectors. It operates on 128-bit elements instead of regular scalar types. Recognize shuffles that are suitable for VPERM2F128 and teach the x86 legalizer how to handle them. llvm-svn: 137519
* Move code around and add commentsBruno Cardoso Lopes2011-08-121-11/+13
| | | | llvm-svn: 137518
* Define unaligned load and store. Akira Hatanaka2011-08-124-2/+35
| | | | llvm-svn: 137515
* ARM expansion of pre-indexed store pseudos should maintain memoperands.Jim Grosbach2011-08-121-1/+3
| | | | | | Partial fix for rdar://9945172. llvm-svn: 137513
* Add checks for the landingpad instruction's clause values to make sure thatBill Wendling2011-08-121-0/+10
| | | | | | they're the correct type. llvm-svn: 137511
* Fix some remaining issues with decoding ARM-mode memory instructions, and ↵Owen Anderson2011-08-122-20/+12
| | | | | | add another batch of tests. llvm-svn: 137502
* Initial commit of the 'landingpad' instruction.Bill Wendling2011-08-1215-10/+303
| | | | | | | | | | | | This implements the 'landingpad' instruction. It's used to indicate that a basic block is a landing pad. There are several restrictions on its use (see LangRef.html for more detail). These restrictions allow the exception handling code to gather the information it needs in a much more sane way. This patch has the definition, implementation, C interface, parsing, and bitcode support in it. llvm-svn: 137501
* Fix decoding of ARM-mode STRH.Owen Anderson2011-08-123-0/+6
| | | | llvm-svn: 137499
* Specify fixed bit in the LDRBT encoding, which allows us to distinguish it ↵Owen Anderson2011-08-121-1/+3
| | | | | | from certain USAT16 encodings. llvm-svn: 137494
* Fix decoding of pre-indexed stores.Owen Anderson2011-08-122-0/+43
| | | | llvm-svn: 137487
* Use ArrayRef.Devang Patel2011-08-121-6/+6
| | | | llvm-svn: 137485
* When constant double 0.0 is lowered, make sure 0 is copied directly from an Akira Hatanaka2011-08-121-9/+2
| | | | | | | | | | | | | | | | | | | | | | | | | integer register to a floating point register. It is not valid to interpret the value of a floating pointer register as part of a double precision floating point value after a single precision floating point computational or move instruction stores its result to the register. - In the test case, the following code is generated before this patch is applied: mtc1 $zero, $f2 ; unformatted copy to $f2 mov.s $f0, $f2 ; $f0 is in single format sdc1 $f12, 0($sp) mov.s $f1, $f2 ; $f1 is in single format c.eq.d $f12, $f0 ; $f0 cannot be interpreted as double - The following code is generated after this patch is applied: mtc1 $zero, $f0 ; unformatted copy to $f0 mtc1 $zero, $f1 ; unformatted copy to $f1 c.eq.d $f12, $f0 ; $f0 can be interpreted as double Bhanu Chetlapalli and Chris Dearman at MIPS technologies reported this bug and provided the test case. llvm-svn: 137484
* add ifdef's to let people easily remove these dead api for testing.Chris Lattner2011-08-121-8/+10
| | | | llvm-svn: 137483
* switch to the new struct api.Chris Lattner2011-08-121-3/+3
| | | | llvm-svn: 137482
* switch to the new struct apis.Chris Lattner2011-08-124-9/+9
| | | | llvm-svn: 137481
* switch to use the new api for structtypes.Chris Lattner2011-08-127-18/+18
| | | | llvm-svn: 137480
* forward to the correct constructor.Chris Lattner2011-08-121-3/+2
| | | | llvm-svn: 137479
* Provide fast path as Jakob suggested.Devang Patel2011-08-121-0/+12
| | | | llvm-svn: 137478
* Separate decoding for STREXD and LDREXD to make each work better.Owen Anderson2011-08-122-7/+24
| | | | llvm-svn: 137476
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