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* ARM: Tidy up. Remove unused template parameters.Jim Grosbach2012-08-021-20/+16
| | | | llvm-svn: 161222
* ARM: More InstAlias refactors to use #NAME#.Jim Grosbach2012-08-021-42/+27
| | | | llvm-svn: 161220
* ARM: Refactor instaliases using TableGen support for #NAME#.Jim Grosbach2012-08-021-31/+23
| | | | | | | | Now that TableGen supports references to NAME w/o it being explicitly referenced in the definition's own name, use that to simplify assembly InstAlias definitions in multiclasses. llvm-svn: 161218
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-08-022-15/+20
| | | | | | | | | | Add more comments and use early returns to reduce nesting in isLoadFoldable. Also disable folding for V_SET0 to avoid introducing a const pool entry and a const pool load. rdar://10554090 and rdar://11873276 llvm-svn: 161207
* TableGen: Allow use of #NAME# outside of 'def' names.Jim Grosbach2012-08-021-11/+21
| | | | | | | | | | | | | | | | | | | | | Previously, def NAME values were only populated, and references to NAME resolved, when NAME was referenced in the 'def' entry of the multiclass sub-entry. e.g., multiclass foo<...> { def prefix_#NAME : ... } It's useful, however, to be able to reference NAME even when the default def name is used. For example, when a multiclass has 'def : Pat<...>' or 'def : InstAlias<...>' entries which refer to earlier instruction definitions in the same multiclass. e.g., multiclass myMulti<RegisterClass rc> { def _r : myI<(outs rc:$d), (ins rc:$r), "r $d, $r", []>; def : InstAlias<\"wilma $r\", (!cast<Instruction>(NAME#\"_r\") rc:$r, rc:$r)>; } llvm-svn: 161198
* Compute the critical path length through a trace.Jakob Stoklund Olesen2012-08-022-5/+75
| | | | | | | | | | | Whenever both instruction depths and instruction heights are known in a block, it is possible to compute the length of the critical path as max(depth+height) over the instructions in the block. The stored live-in lists make it possible to accurately compute the length of a critical path that bypasses the current (small) block. llvm-svn: 161197
* Move the code that creates instances of MipsInstrInfo and MipsFrameLowering outAkira Hatanaka2012-08-029-29/+51
| | | | | | of MipsTargetMachine.cpp. llvm-svn: 161191
* Set transient stack alignment in constructor of MipsFrameLowering and re-enableAkira Hatanaka2012-08-021-3/+2
| | | | | | test o32_cc_vararg.ll. llvm-svn: 161189
* Verify regunit intervals along with virtreg intervals.Jakob Stoklund Olesen2012-08-021-2/+12
| | | | | | | Don't cause regunit intervals to be computed just to verify them. Only check the already cached intervals. llvm-svn: 161183
* Avoid creating dangling physreg live ranges during DCE.Jakob Stoklund Olesen2012-08-021-6/+30
| | | | | | | | | | | | | | | | | | | | | | | | | LiveRangeEdit::eliminateDeadDefs() can delete a dead instruction that reads unreserved physregs. This would leave the corresponding regunit live interval dangling because we don't have shrinkToUses() for physical registers. Fix this problem by turning the instruction into a KILL instead of deleting it. This happens in a landing pad in test/CodeGen/X86/2012-05-19-CoalescerCrash.ll: %vreg27<def,dead> = COPY %EDX<kill>; GR32:%vreg27 becomes: KILL %EDX<kill> An upcoming fix to the machine verifier will catch problems like this by verifying regunit live intervals. This fixes PR13498. I am not including the test case from the PR since we already have one exposing the problem once the verifier is fixed. llvm-svn: 161182
* Add report() functions that take a LiveInterval argument.Jakob Stoklund Olesen2012-08-021-60/+67
| | | | llvm-svn: 161178
* Implement the block_iterator of Region based on df_iterator.Hongbin Zheng2012-08-021-16/+0
| | | | llvm-svn: 161177
* JIT::runFunction(): add a fast path for functions with a single argument ↵Nuno Lopes2012-08-021-2/+7
| | | | | | that is a pointer. llvm-svn: 161171
* Support fpv4 for ARM Cortex-M4.Jiangning Liu2012-08-021-1/+1
| | | | llvm-svn: 161163
* Fix #13035, a bug around Thumb instruction LDRD/STRD with negative #0 offset ↵Jiangning Liu2012-08-023-16/+29
| | | | | | index issue. llvm-svn: 161162
* Fix #13138, a bug around ARM instruction DSB encoding and decoding issue.Jiangning Liu2012-08-023-40/+75
| | | | llvm-svn: 161161
* Fix #13241, a bug around shift immediate operand for ARM instruction ADR.Jiangning Liu2012-08-026-7/+64
| | | | llvm-svn: 161159
* X86 Peephole: fold loads to the source register operand if possible.Manman Ren2012-08-023-0/+140
| | | | | | | | | | | | Machine CSE and other optimizations can remove instructions so folding is possible at peephole while not possible at ISel. This patch is a rework of r160919 and was tested on clang self-host on my local machine. rdar://10554090 and rdar://11873276 llvm-svn: 161152
* Extract some methods from verifyLiveIntervals.Jakob Stoklund Olesen2012-08-021-245/+259
| | | | | | No functional change. llvm-svn: 161149
* Also verify RegUnit intervals at uses.Jakob Stoklund Olesen2012-08-011-15/+36
| | | | llvm-svn: 161147
* X86: mark GATHER instructios as mayLoadManman Ren2012-08-011-1/+1
| | | | llvm-svn: 161143
* Compute instruction heights through a trace.Jakob Stoklund Olesen2012-08-012-11/+268
| | | | | | | | | | | | | | | | | | | The height on an instruction is the minimum number of cycles from the instruction is issued to the end of the trace. Heights are computed for all instructions in and below the trace center block. The method for computing heights is different from the depth computation. As we visit instructions in the trace bottom-up, heights of used instructions are pushed upwards. This way, we avoid scanning long use lists, looking for uses in the current trace. At each basic block boundary, a list of live-in registers and their minimum heights is saved in the trace block info. These live-in lists are used when restarting depth computations on a trace that converges with an already computed trace. They will also be used to accurately compute the critical path length. llvm-svn: 161138
* ARM: Remove redundant instalias.Jim Grosbach2012-08-011-3/+0
| | | | llvm-svn: 161134
* Clean up formatting.Jim Grosbach2012-08-012-13/+2
| | | | llvm-svn: 161133
* Tidy up.Jim Grosbach2012-08-011-11/+4
| | | | llvm-svn: 161132
* Whitespace.Chad Rosier2012-08-0117-135/+134
| | | | llvm-svn: 161122
* Temporarily revert c23b933d5f8be9b51a1d22e717c0311f65f87dcd. It's causingEric Christopher2012-08-012-24/+6
| | | | | | failures in the debug testsuite and possibly PR13486. llvm-svn: 161121
* remove tabs from my previous commit.Nuno Lopes2012-08-011-2/+2
| | | | | | Sorry, not used to this editor anymore.. XCode please come back; you're forgiven :) llvm-svn: 161120
* (hopefuly) fix the remaining cases where null wasnt expected (PR13497).Nuno Lopes2012-08-011-0/+4
| | | | | | I'll commit a test to the clang tree. llvm-svn: 161118
* Add DataDep constructors. Explicitly check SSA form.Jakob Stoklund Olesen2012-08-011-20/+18
| | | | llvm-svn: 161115
* Added FMA functionality to X86 target.Elena Demikhovsky2012-08-016-125/+297
| | | | llvm-svn: 161110
* Stay rational; don't assert trying to take the square root of a negative value.Nick Lewycky2012-08-011-0/+6
| | | | | | If it's negative, the loop is already proven to be infinite. Fixes PR13489! llvm-svn: 161107
* Add more indirection to the disassembler tables to reduce amount of space ↵Craig Topper2012-08-015-14/+18
| | | | | | used to store the operand types and encodings. Store only the unique combinations in a separate table and store indices in the instruction table. Saves about 32K of static data. llvm-svn: 161101
* Initial commit of new FileOutputBuffer support class. Nick Kledzik2012-08-012-0/+149
| | | | | | | | Since the llvm::sys::fs::map_file_pages() support function it relies on is not yet implemented on Windows, the unit tests for FileOutputBuffer are currently conditionalized to run only on unix. llvm-svn: 161099
* Implement MipsJITInfo::replaceMachineCodeForFunction.Akira Hatanaka2012-08-011-1/+46
| | | | | | | | | | No new test case is added. This patch makes test JITTest.FunctionIsRecompiledAndRelinked pass on mips platform. Patch by Petar Jovanovic. llvm-svn: 161098
* Remove unused variable.Akira Hatanaka2012-08-011-1/+0
| | | | llvm-svn: 161095
* Implement MipsSERegisterInfo::eliminateCallFramePseudoInstr. The function emitsAkira Hatanaka2012-07-319-41/+71
| | | | | | | instructions that decrement and increment the stack pointer before and after a call when the function does not have a reserved call frame. llvm-svn: 161093
* Add definitions of two subclasses of MipsRegisterInfo, Mips16RegisterInfo andAkira Hatanaka2012-07-3113-72/+268
| | | | | | MipsSERegisterInfo. llvm-svn: 161092
* Add definitions of two subclasses of MipsFrameLowering, Mips16FrameLowering andAkira Hatanaka2012-07-319-219/+415
| | | | | | | | | | MipsSEFrameLowering. Implement MipsSEFrameLowering::hasReservedCallFrame. Call frames will not be reserved if there is a call with a large call frame or there are variable sized objects on the stack. llvm-svn: 161090
* Add Mips16InstrInfo.cpp and MipsSEInstrInfo.cpp to CMakeLists.txt.Akira Hatanaka2012-07-311-0/+2
| | | | llvm-svn: 161083
* Add definitions of two subclasses of MipsInstrInfo, MipsInstrInfo (for mips16),Akira Hatanaka2012-07-319-361/+624
| | | | | | and MipsSEInstrInfo (for mips32/64). llvm-svn: 161081
* Delete mips64 target machine classes. mips target machines can be used in placeAkira Hatanaka2012-07-312-88/+46
| | | | | | of them. llvm-svn: 161080
* Let PEI::calculateFrameObjectOffsets compute the final stack size rather thanAkira Hatanaka2012-07-312-12/+1
| | | | | | computing it in MipsFrameLowering::emitPrologue. llvm-svn: 161078
* Expand DYNAMIC_STACKALLOC nodes rather than doing custom-lowering.Akira Hatanaka2012-07-314-66/+6
| | | | | | | The frame object which points to the dynamically allocated area will not be needed after changes are made to cease reserving call frames. llvm-svn: 161076
* MachineSink: Sort the successors before trying to find SuccToSinkTo.Manman Ren2012-07-311-1/+1
| | | | | | | | Use stable_sort instead of sort. Follow-up to r161062. rdar://11980766 llvm-svn: 161075
* Compute instruction depths through the current trace.Jakob Stoklund Olesen2012-07-312-7/+272
| | | | | | | | | | | Assuming infinite issue width, compute the earliest each instruction in the trace can issue, when considering the latency of data dependencies. The issue cycle is record as a 'depth' from the beginning of the trace. This is half the computation required to find the length of the critical path through the trace. Heights are next. llvm-svn: 161074
* Rename CT -> MTM. MachineTraceMetrics is abbreviated MTM.Jakob Stoklund Olesen2012-07-312-13/+13
| | | | llvm-svn: 161072
* Define ADJCALLSTACKDOWN/UP nodes. These nodes are emitted regardless of whetherAkira Hatanaka2012-07-314-38/+33
| | | | | | | or not it is in mips16 mode. Define MipsPseudo (mode-independant pseudo) and PseudoSE (mips32/64 pseudo) classes. llvm-svn: 161071
* Change name of class MipsInst to InstSE to distinguish it from mips16'sAkira Hatanaka2012-07-312-16/+16
| | | | | | instruction class. SE stands for standard encoding. llvm-svn: 161069
* When store nodes or memcpy nodes are created to copy the function callAkira Hatanaka2012-07-312-48/+32
| | | | | | | arguments to the stack in MipsISelLowering::LowerCall, use stack pointer and integer offset operands rather than frame object operands. llvm-svn: 161068
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