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* [LIR] Strengthen the check for recurrence variable in popcnt/CTLZ.Davide Italiano2017-05-231-9/+16
| | | | | | | Fixes PR33114. Differential Revision: https://reviews.llvm.org/D33420 llvm-svn: 303700
* Disable coverage opt-out for strong postdominator blocks.George Karpenkov2017-05-231-22/+2
| | | | | | | | | | | | | | | | Coverage instrumentation has an optimization not to instrument extra blocks, if the pass is already "accounted for" by a successor/predecessor basic block. However (https://github.com/google/sanitizers/issues/783) this reasoning may become circular, which stops valid paths from having coverage. In the worst case this can cause fuzzing to stop working entirely. This change simplifies logic to something which trivially can not have such circular reasoning, as losing valid paths does not seem like a good trade-off for a ~15% decrease in the # of instrumented basic blocks. llvm-svn: 303698
* Revert LLVM changes for "Sema: allow imaginary constants via GNU extension ↵Tim Northover2017-05-231-4/+1
| | | | | | | | if UDL overloads not present." The changes accidentally crept into a Clang commit I was making. llvm-svn: 303697
* [MSP430] Add subtarget features for hardware multiplier.Vadzim Dambrouski2017-05-234-25/+54
| | | | | | | | Also add more processors to make -mcpu option behave similar to gcc. Differential Revision: https://reviews.llvm.org/D33335 llvm-svn: 303695
* Sema: allow imaginary constants via GNU extension if UDL overloads not present.Tim Northover2017-05-231-1/+4
| | | | | | | | | | | | | C++14 added user-defined literal support for complex numbers so that you can write something like "complex<double> val = 2i". However, there is an existing GNU extension supporting this syntax and interpreting the result as a _Complex type. This changes parsing so that such literals are interpreted in terms of C++14's operators if an overload is present but otherwise falls back to the original GNU extension. llvm-svn: 303694
* Silence MSVC warning about unsigned integer overflow, which has defined behaviorReid Kleckner2017-05-231-1/+3
| | | | llvm-svn: 303693
* [AMDGPU] Add INDIRECT_BASE_ADDR to R600_Reg32 class (PR33045)Simon Pilgrim2017-05-231-1/+1
| | | | | | | | This fixes 17 of the 41 -verify-machineinstrs test failures identified in PR33045 Differential Revision: https://reviews.llvm.org/D33451 llvm-svn: 303691
* AsmPrinter: mark the beginning and the end of a function in verbose modeFrancis Visoiu Mistrih2017-05-231-2/+8
| | | | llvm-svn: 303690
* AMDGPU/SI: Move the local memory usage related checking after calling ↵Changpeng Fang2017-05-231-99/+114
| | | | | | | | | | | | | | | | | convention checking in PromoteAlloca Summary: Promoting Alloca to Vector and Promoting Alloca to LDS are two independent handling of Alloca and should not affect each other. As a result, we should not give up promoting to vector if there is not enough LDS. This patch factors out the local memory usage related checking out and replace it after the calling convention checking. Reviewer: arsenm Differential Revision: http://reviews.llvm.org/D33139 llvm-svn: 303684
* [AArch64][Falkor] Refine sched details for LSLfast/ASRfast.Geoff Berry2017-05-234-40/+189
| | | | llvm-svn: 303682
* [AMDGPU] Combine and (srl) into shl (bfe)Stanislav Mekhanoshin2017-05-233-11/+40
| | | | | | | | | | | | | | | | | | | Perform DAG combine: and (srl x, c), mask => shl (bfe x, nb + c, mask >> nb), nb Where nb is a number of trailing zeroes in mask. It replaces two instructions with two and BFE is generally a more expensive one. However this is only done if we are selecting a byte or word at an aligned boundary which results in a proper SDWA operand pattern. It is only done if SDWA is supported. TODO: improve SDWA pass to actually convert this pattern. It is not done now because we have an immediate in the instruction, which has be moved into a VGPR. Differential Revision: https://reviews.llvm.org/D33455 llvm-svn: 303681
* [AArch64][Falkor] Fix sched details for FMOV of WZR/XZR.Geoff Berry2017-05-232-6/+8
| | | | llvm-svn: 303680
* [ARM] Temporarily disable globals promotion to constant pools to prevent ↵Oleg Ranevskyy2017-05-231-1/+1
| | | | | | | | | | | | | | | | | | | | | miscompilation Summary: A temporary workaround for PR32780 - rematerialized instructions accessing the same promoted global through different constant pool entries. The patch turns off the globals promotion optimization leaving all its code in place, so that it can be easily turned on once PR32780 is fixed. Since this is a miscompilation issue causing generation of misbehaving code, and the problem is very subtle, the patch might be valuable enough to get into 4.0.1. Reviewers: efriedma, jmolloy Reviewed By: efriedma Subscribers: aemerson, javed.absar, llvm-commits, rengolin, asl, tstellar Differential Revision: https://reviews.llvm.org/D33446 llvm-svn: 303679
* [CodeView] Eliminate redundant hashes and allocations.Zachary Turner2017-05-231-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When writing field list records, we would construct a temporary type serializer that shared a bump ptr allocator with the rest of the application, so anything allocated from here would live forever. Furthermore, this temporary serializer had all the properties of a full blown serializer including record hashing and de-duplication. These features are required when you're merging multiple type streams into each other, because different streams may contain identical records, but records from the same type stream will never collide with each other. So all of this hashing was unnecessary. To solve this, two fixes are made: 1) The temporary serializer keeps its own bump ptr allocator instead of sharing a global one. When it's finished, all of its memory is freed. 2) Instead of using the same temporary serializer for the life of an entire type stream, we use it only for the life of a single field list record and delete it when the field list record is completed. This way the hash table will not grow as other records from the same type stream get inserted. Further improvements could eliminate hashing entirely from this codepath. This reduces the link time by 85% in my test, from 1 minute to 9 seconds. llvm-svn: 303676
* [DAG] Add AddressSpace parameter to canMergeStoresTo. NFC.Nirav Dave2017-05-232-8/+11
| | | | llvm-svn: 303673
* [GSoC] Shell autocompletion for clangYuka Takahashi2017-05-231-0/+14
| | | | | | | | | | | | | | | | | Summary: This is a first patch for GSoC project, bash-completion for clang. To use this on bash, please run `source clang/utils/bash-autocomplete.sh`. bash-autocomplete.sh is code for bash-completion. Simple flag completion and path completion is available in this patch. Reviewers: teemperor, v.g.vassilev, ruiu, Bigcheese, efriedma Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D33237 llvm-svn: 303670
* Fix DIEHash refactoring that dropped the DW_AT_name from the hashDavid Blaikie2017-05-231-0/+1
| | | | llvm-svn: 303669
* [DAG] Add canMergeStoresTo predicate checks. NFCI.Nirav Dave2017-05-231-4/+6
| | | | | | Propagate canMergeStoresTo checks to missing cases in StoreMerge. llvm-svn: 303668
* Speculative build fix for non-WindowsReid Kleckner2017-05-231-0/+2
| | | | llvm-svn: 303667
* Refactor DWARF hashing to use a .def file to avoid repetitionDavid Blaikie2017-05-233-158/+65
| | | | llvm-svn: 303666
* [PDB] Hash types up front when merging types instead of using StringMapReid Kleckner2017-05-232-66/+120
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: First, StringMap uses llvm::HashString, which is only good for short identifiers and really bad for large blobs of binary data like type records. Moving to `DenseMap<StringRef, TypeIndex>` with some tricks for memory allocation fixes that. Unfortunately, that didn't buy very much performance. Profiling showed that we spend a long time during DenseMap growth rehashing existing entries. Also, in general, DenseMap is faster when the keys are small. This change takes that to the logical conclusion by introducing a small wrapper value type around a pointer to key data. The key data contains a precomputed hash, the original record data (pointer and size), and the type index, which is the "value" of our original map. This reduces the time to produce llvm-as.exe and llvm-as.pdb from ~15s on my machine to 3.5s, which is about a 4x improvement. Reviewers: zturner, inglorion, ruiu Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D33428 llvm-svn: 303665
* [InstCombine] allow icmp-xor folds for vectors (PR33138)Sanjay Patel2017-05-231-5/+9
| | | | | | | | | This fixes the first part of: https://bugs.llvm.org/show_bug.cgi?id=33138 More work is needed for the bitcasted variant. llvm-svn: 303660
* AMDGPU: Fold CI-specific complex SMRD patterns into existing complex patternsMarek Olsak2017-05-234-51/+18
| | | | | | | | | | | | This is just a cleanup. Also, it adds checking that ByteCount is aligned to 4. Reviewers: arsenm, nhaehnle, tstellarAMD Subscribers: kzhuravl, wdng, yaxunl, tony-tye Differential Revision: https://reviews.llvm.org/D28994 llvm-svn: 303658
* Commit AttributeList change that was supposed to be part of r303654Reid Kleckner2017-05-231-2/+2
| | | | llvm-svn: 303656
* [RuntimeDyld, PowerPC] Fix regression from r303637Ulrich Weigand2017-05-231-7/+9
| | | | | | | | | | | | | | Actually, to identify external symbols, we need to check for *either* non-null Value.SymbolName *or* a SymType of Symbol::ST_Unknown. The former may happen for symbols not known to the JIT at all (e.g. defined in a native library), while the latter happens for symbols known to the JIT, but defined in a different module. Fixed several regressions on big-endian ppc64. llvm-svn: 303655
* [IR] Switch AttributeList to use an array for O(1) accessReid Kleckner2017-05-237-288/+200
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Before this change, AttributeLists stored a pair of index and AttributeSet. This is memory efficient if most arguments do not have attributes. However, it requires doing a search over the pairs to test an argument or function attribute. Profiling shows that this loop was 0.76% of the time in 'opt -O2' of sqlite3.c, because LLVM constantly tests values for nullability. This was worth about 2.5% of mid-level optimization cycles on the sqlite3 amalgamation. Here are the full perf results: https://reviews.llvm.org/P7995 Here are just the before and after cycle counts: ``` $ perf stat -r 5 ./opt_before -O2 sqlite3.bc -o /dev/null 13,274,181,184 cycles # 3.047 GHz ( +- 0.28% ) $ perf stat -r 5 ./opt_after -O2 sqlite3.bc -o /dev/null 12,906,927,263 cycles # 3.043 GHz ( +- 0.51% ) ``` This patch *does not* change the indices used to query attributes, as requested by reviewers. Tracking whether an index is usable for array indexing is a huge pain that affects many of the internal APIs, so it would be good to come back later and do a cleanup to remove this internal adjustment. Reviewers: pete, chandlerc Subscribers: javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D32819 llvm-svn: 303654
* [AMDGPU] Convert shl (add) into add (shl)Stanislav Mekhanoshin2017-05-232-2/+43
| | | | | | | | | | | shl (or|add x, c2), c1 => or|add (shl x, c1), (c2 << c1) This allows to fold a constant into an address in some cases as well as to eliminate second shift if the expression is used as an address and second shift is a result of a GEP. Differential Revision: https://reviews.llvm.org/D33432 llvm-svn: 303641
* Revert "Make TypeSerializer's StringMap use the same allocator."Zachary Turner2017-05-232-13/+32
| | | | | | | | This reverts commit e34ccb7b57da25cc89ded913d8638a2906d1110a. This is causing failures on the ASAN bots. llvm-svn: 303640
* [mips] Remove unused class field. NFCSimon Atanasyan2017-05-232-5/+0
| | | | llvm-svn: 303639
* [mips] Change type of MipsSubtarget ctor arguments s/std::string/StringRef/. NFCSimon Atanasyan2017-05-232-5/+4
| | | | llvm-svn: 303638
* [RuntimeDyld, PowerPC] Fix check for external symbols when detecting ↵Ulrich Weigand2017-05-231-8/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | reloction overflow The PowerPC part of processRelocationRef currently assumes that external symbols can be identified by checking for SymType == SymbolRef::ST_Unknown. This is actually incorrect in some cases, causing relocation overflows to be mis-detected. The correct check is to test whether Value.SymbolName is null. Includes test case. Note that it is a bit tricky to replicate the exact condition that triggers the bug in a test case. The one included here seems to fail reliably (before the fix) across different operating system versions on Power, but it still makes a few assumptions (called out in the test case comments). Also add ppc64le platform name to the supported list in the lit.local.cfg files for the MCJIT and OrcMCJIT directories, since those tests were currently not run at all. Fixes PR32650. Reviewer: hfinkel Differential Revision: https://reviews.llvm.org/D33402 llvm-svn: 303637
* [JumpThreading] Safely replace uses of conditionAnna Thomas2017-05-232-2/+57
| | | | | | | | | | | | | | | | | | | | | | This patch builds over https://reviews.llvm.org/rL303349 and replaces the use of the condition only if it is safe to do so. We should not blindly RAUW the condition if experimental.guard or assume is a use of that condition. This is because LVI may have used the guard/assume to identify the value of the condition, and RUAWing will fold the guard/assume and uses before the guards/assumes. Reviewers: sanjoy, reames, trentxintong, mkazantsev Reviewed by: sanjoy, reames Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D33257 llvm-svn: 303633
* [RuntimeDyld, PowerPC] Fix relocation detection overflowUlrich Weigand2017-05-231-8/+8
| | | | | | | | | | | | | | | | Code in RuntimeDyldELF currently uses 32-bit temporaries to detect whether a PPC64 relocation target is out of range. This is incorrect, and can mis-detect overflow where the distance between relocation site and target is close to a multiple of 4GB. Fixed by using 64-bit temporaries. Noticed while debugging PR32650. Reviewer: hfinkel Differential Revision: https://reviews.llvm.org/D33403 llvm-svn: 303632
* [AMDGPU] SDWA: Add assembler support for GFX9Sam Kolton2017-05-2313-64/+552
| | | | | | | | | | | | | | | Summary: Added separate pseudo and real instruction for GFX9 SDWA instructions. Currently supports only in assembler. Depends D32493 Reviewers: vpykhtin, artem.tamazov Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye Differential Revision: https://reviews.llvm.org/D33132 llvm-svn: 303620
* [AArch64] Make instruction fusion more aggressive. Florian Hahn2017-05-233-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | Summary: This patch makes instruction fusion more aggressive by * adding artificial edges between the successors of FirstSU and SecondSU, similar to BaseMemOpClusterMutation::clusterNeighboringMemOps. * updating PostGenericScheduler::tryCandidate to keep clusters together, similar to GenericScheduler::tryCandidate. This change increases the number of AES instruction pairs generated on Cortex-A57 and Cortex-A72. This doesn't change code at all in most benchmarks or general code, but we've seen improvement on kernels using AESE/AESMC and AESD/AESIMC. Reviewers: evandro, kristof.beyls, t.p.northover, silviu.baranga, atrick, rengolin, MatzeB Reviewed By: evandro Subscribers: aemerson, rengolin, MatzeB, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D33230 llvm-svn: 303618
* [GlobalISel][X86] G_LOAD/G_STORE vec256/512 supportIgor Breger2017-05-233-0/+38
| | | | | | | | | | | | | | Summary: mark G_LOAD/G_STORE vec256/512 legal for AVX/AVX512. Implement instruction selection. Reviewers: zvi, guyblank Reviewed By: zvi Subscribers: rovka, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D33268 llvm-svn: 303617
* [KnownBits] Use !hasConflict() in asserts in place of Zero & One == 0 or ↵Craig Topper2017-05-232-33/+33
| | | | | | similar. NFC llvm-svn: 303614
* [LV] Report multiple reasons for not vectorizing under allowExtraAnalysisAyal Zaks2017-05-231-20/+42
| | | | | | | | | | | | | | | | | | | | The default behavior of -Rpass-analysis=loop-vectorizer is to report only the first reason encountered for not vectorizing, if one is found, at which time the vectorizer aborts its handling of the loop. This patch allows multiple reasons for not vectorizing to be identified and reported, at the potential expense of additional compile-time, under allowExtraAnalysis which can currently be turned on by Clang's -fsave-optimization-record and opt's -pass-remarks-missed. Removed from LoopVectorizationLegality::canVectorize() the redundant checking and reporting if we CantComputeNumberOfIterations, as LAI::canAnalyzeLoop() also does that. This redundancy is caught by a lit test once multiple reasons are reported. Patch initially developed by Dror Barak. Differential Revision: https://reviews.llvm.org/D33396 llvm-svn: 303613
* libDebugInfo: Support symbolizing using DWP filesDavid Blaikie2017-05-232-13/+44
| | | | llvm-svn: 303609
* [AArch64] Fix PRR33100.Akira Hatanaka2017-05-231-7/+10
| | | | | | | | | | | | | This commit fixes a bug introduced in r301019 where optimizeLogicalImm would replace a logical node's immediate operand that was CSE'd and was also an operand of another node. This commit fixes the bug by replacing the logical node instead of its immediate operand. rdar://problem/32295276 llvm-svn: 303607
* Added LLVM_FALLTHROUGH to address gcc warning: this statement may fall through.Galina Kistanova2017-05-231-0/+4
| | | | llvm-svn: 303597
* Added LLVM_FALLTHROUGH to address gcc warning: this statement may fall through.Galina Kistanova2017-05-231-0/+1
| | | | llvm-svn: 303595
* FIX: Remove debugging assert left in previous commitDavid Blaikie2017-05-231-1/+0
| | | | | | Sorry for the bot noise. llvm-svn: 303592
* libDebugInfo: Avoid independently parsing the same .dwo file for two ↵David Blaikie2017-05-232-27/+38
| | | | | | | | | separate CUs residing there NFC, just an optimization. Will be building on this for DWP support shortly. llvm-svn: 303591
* Support for taking the max of module flags when linking, use for PIE/PICTeresa Johnson2017-05-233-4/+24
| | | | | | | | | | | | | | | | | | | | | | Summary: Add Max ModFlagBehavior, which can be used to take the max of two module flag values when merging modules. Use it for the PIE and PIC levels. This avoids an error when we try to import from a module built -fpic into a module built -fPIC, for example. For both PIE and PIC levels, this will be legal, since the code generation gets more conservative as the level is increased. Therefore we can take the max instead of somehow trying to block importing between modules compiled with different levels. Reviewers: tmsriram, pcc Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D33418 llvm-svn: 303590
* [NewPM] Fix an innocent but silly typo. Reported by Craig Topper.Davide Italiano2017-05-221-1/+1
| | | | llvm-svn: 303587
* [NewPM] Add a temporary cl::opt() to test NewGVN.Davide Italiano2017-05-221-2/+13
| | | | llvm-svn: 303586
* Added LLVM_FALLTHROUGH to address gcc warning: this statement may fall through.Galina Kistanova2017-05-221-0/+1
| | | | llvm-svn: 303585
* [CodeGen] Fix uninitialized variables exposed by r303084Vitaly Buka2017-05-221-2/+2
| | | | | | | All other calls of analyzeBranch reset PredTBB and PredFBB, so I assume it's expected behavior. llvm-svn: 303581
* InstructionSimplify: don't speculate about Constants changing.Tim Northover2017-05-221-0/+4
| | | | | | | | | | When presented with an icmp/select pair, we can end up asking what would happen if we replaced one constant with another in an instruction. This is a mistake, while non-constant Values could become a constant, constants cannot change and trying to do so can lead to completely invalid IR (a GEP referencing a non-existant field in the original case). llvm-svn: 303580
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