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* Trailing whitespae.Jim Grosbach2011-03-151-34/+34
| | | | llvm-svn: 127691
* Clean up something noticed by Fritz.Cameron Zwarich2011-03-151-1/+1
| | | | llvm-svn: 127684
* Do not form thumb2 ldrd / strd if the offset is by multiple of 4. rdar://9133587Evan Cheng2011-03-151-9/+3
| | | | llvm-svn: 127683
* Don't indent cases in a switch, no functionality change.Richard Osborne2011-03-151-50/+50
| | | | llvm-svn: 127681
* On the XCore the scavenging slot should be closest to the SP.Richard Osborne2011-03-152-0/+7
| | | | llvm-svn: 127680
* Add XCore intrinsics for getps, setps, setsr and clrsr.Richard Osborne2011-03-151-3/+25
| | | | llvm-svn: 127678
* PTX: Set PTX 2.0 as the minimum supported versionJustin Holewinski2011-03-155-42/+80
| | | | | | | | - Remove PTX 1.4 code generation - Change type of intrinsics to .v4.i32 instead of .v4.i16 - Add and/or/xor integer instructions llvm-svn: 127677
* Silence compiler warning about case values not being in the enumerated typeDuncan Sands2011-03-151-1/+1
| | | | | | MCFixupKind. This is the same technique that is used elsewhere in MC. llvm-svn: 127676
* Avoid a compiler warning about reg possibly being used uninitializedDuncan Sands2011-03-151-4/+2
| | | | | | when building with assertions disabled. llvm-svn: 127675
* Do not add PHIs with no users when creating LCSSA form. Patch by Andrew Clinton.Cameron Zwarich2011-03-151-0/+10
| | | | llvm-svn: 127674
* Add C++ global operator {new,new[],delete,delete[]}(unsigned {int,long}) to theNick Lewycky2011-03-151-2/+11
| | | | | | | | | | | | | memory builtins as equivalent to malloc/free. This is different from any attribute we have. For example, you can delete the allocators when their result is unused, but you can't collapse two calls to the same function, even if no global/memory state has changed in between. The noalias return states that the result does not alias any other pointer, but instcombine optimizes malloc() as though the result is non-null for the purpose of eliminating unused pointers. llvm-svn: 127673
* Add a peephole optimization to optimize pairs of bitcasts. e.g.Evan Cheng2011-03-151-4/+97
| | | | | | | | | | | | | | | | | | | | | | v2 = bitcast v1 ... v3 = bitcast v2 ... = v3 => v2 = bitcast v1 ... = v1 if v1 and v3 are of in the same register class. bitcast between i32 and fp (and others) are often not nops since they are in different register classes. These bitcast instructions are often left because they are in different basic blocks and cannot be eliminated by dag combine. rdar://9104514 llvm-svn: 127668
* PR9450: Make switch optimization in SimplifyCFG not dependent on the orderingEli Friedman2011-03-151-7/+18
| | | | | | of pointers in an std::map. llvm-svn: 127650
* sext(undef) = 0, because the top bits will all be the same.Evan Cheng2011-03-151-1/+5
| | | | | | zext(undef) = 0, because the top bits will be zero. llvm-svn: 127649
* Enabled disassembler support for AVX instructionsSean Callanan2011-03-152-150/+152
| | | | | | | | in the instruction tables and fixed a few bugs that were causing decode conflicts. Rudimentary tests are coming up in the next patch. llvm-svn: 127646
* X86 table-generator and disassembler support for the AVXSean Callanan2011-03-154-42/+319
| | | | | | | | | instruction set. This code adds support for the VEX prefix and for the YMM registers accessible on AVX-enabled architectures. Instruction table support that enables AVX instructions for the disassembler is in an upcoming patch. llvm-svn: 127644
* Remove getMinusSCEVForExitTest().Andrew Trick2011-03-151-106/+3
| | | | | | | This function performed acrobatics to prove no-self-wrap, which we now have for free. llvm-svn: 127643
* Fixed an ARM disassembler bug where it does not handle STRi12 correctly ↵Johnny Chen2011-03-151-6/+9
| | | | | | | | | | because an extra register operand was erroneously added. Remove an incorrect assert which triggers the bug. rdar://problem/9131529 llvm-svn: 127642
* There are some situations which can cause the URoR hack to infinitely recurseBill Wendling2011-03-151-6/+8
| | | | | | | | | | | | | and then go kablooie. The problem was that it was tracking the PHI nodes anew each time into this function. But it didn't need to. And because the recursion didn't know that a PHINode was visited before, it would go ahead and call itself. There is a testcase, but unfortunately it's too big to add. This problem will go away with the EH rewrite. <rdar://problem/8856298> llvm-svn: 127640
* Propagate SCEV no-wrap flags whenever possible.Andrew Trick2011-03-151-60/+72
| | | | | | This needs review. llvm-svn: 127638
* Clean up ARM tail calls a bit. They're pseudo-instructions for normal branches.Jim Grosbach2011-03-153-31/+71
| | | | | | | Also more cleanly separate the ARM vs. Thumb functionality. Previously, the encoding would be incorrect for some Thumb instructions (the indirect calls). llvm-svn: 127637
* If we don't know how long a string is we can't fold an _chk version to theEric Christopher2011-03-151-3/+7
| | | | | | | | normal version. Fixes rdar://9123638 llvm-svn: 127636
* Generate a VTBL instruction instead of a series of loads and stores when weBill Wendling2011-03-143-1/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | can. As Nate pointed out, VTBL isn't super performant, but it *has* to be better than this: _shuf: @ BB#0: @ %entry push {r4, r7, lr} add r7, sp, #4 sub sp, #12 mov r4, sp bic r4, r4, #7 mov sp, r4 mov r2, sp vmov d16, r0, r1 orr r0, r2, #6 orr r3, r2, #7 vst1.8 {d16[0]}, [r3] vst1.8 {d16[5]}, [r0] subs r4, r7, #4 orr r0, r2, #5 vst1.8 {d16[4]}, [r0] orr r0, r2, #4 vst1.8 {d16[4]}, [r0] orr r0, r2, #3 vst1.8 {d16[0]}, [r0] orr r0, r2, #2 vst1.8 {d16[2]}, [r0] orr r0, r2, #1 vst1.8 {d16[1]}, [r0] vst1.8 {d16[3]}, [r2] vldr.64 d16, [sp] vmov r0, r1, d16 mov sp, r4 pop {r4, r7, pc} The "illegal" testcase in vext.ll is no longer illegal. <rdar://problem/9078775> llvm-svn: 127630
* Place context in member variables instead of passing around pointers.Jakob Stoklund Olesen2011-03-141-21/+18
| | | | | | Use the opportunity to get rid of the trailing underscore variable names. llvm-svn: 127618
* Rename members to match LLVM naming conventions more closely.Jakob Stoklund Olesen2011-03-141-111/+109
| | | | | | | | Remove the unused reserved_ bit vector, no functional change intended. This doesn't break 'svn blame', this file really is all my fault. llvm-svn: 127607
* Remove some dead patterns.Jim Grosbach2011-03-144-56/+0
| | | | llvm-svn: 127601
* BIT_CONVERT has been renamed to BITCAST.Evan Cheng2011-03-141-1/+1
| | | | llvm-svn: 127600
* Minor optimization. sign-ext/anyext of undef is still undef.Evan Cheng2011-03-141-0/+4
| | | | llvm-svn: 127598
* Indentation.Evan Cheng2011-03-141-1/+1
| | | | llvm-svn: 127595
* Negating a recurrence preserves no-self-wrap.Andrew Trick2011-03-141-0/+11
| | | | llvm-svn: 127593
* HowFarToZero can compute a trip count as long as the recurrence has ↵Andrew Trick2011-03-141-16/+20
| | | | | | no-self-wrap. llvm-svn: 127591
* Added SCEV::NoWrapFlags to manage unsigned, signed, and self wrapAndrew Trick2011-03-145-149/+234
| | | | | | | | | properties. Added the self-wrap flag for SCEV::AddRecExpr. A slew of temporary FIXMEs indicate the intention of the no-self-wrap flag without changing behavior in this revision. llvm-svn: 127590
* whitespaceAndrew Trick2011-03-141-66/+66
| | | | llvm-svn: 127589
* PTX: Emit global arrays with proper sizesJustin Holewinski2011-03-141-5/+34
| | | | | | | - Emit all arrays as type .b8 and proper sizes in bytes to conform to the output of nvcc llvm-svn: 127584
* PTX: Add support for sqrt/sin/cos intrinsicsJustin Holewinski2011-03-141-0/+33
| | | | llvm-svn: 127578
* ptx: add set.p instruction and related changes to predicate executionChe-Liang Chiou2011-03-144-17/+59
| | | | llvm-svn: 127577
* This case is solved by Scalar Replacement of Aggregates (DT) andJin-Gu Kang2011-03-141-25/+3
| | | | | | Early CSE pass so this patch reverts it to original source code. llvm-svn: 127574
* ptx: add basic support of predicate executionChe-Liang Chiou2011-03-134-59/+177
| | | | llvm-svn: 127569
* Add comment as following:Jin-Gu Kang2011-03-131-0/+12
| | | | | | | | | | | | | | | | | load and store reference same memory location, the memory location is represented by getelementptr with two uses (load and store) and the getelementptr's base is alloca with single use. At this point, instructions from alloca to store can be removed. (this pattern is generated when bitfield is accessed.) For example, %u = alloca %struct.test, align 4 ; [#uses=1] %0 = getelementptr inbounds %struct.test* %u, i32 0, i32 0;[#uses=2] %1 = load i8* %0, align 4 ; [#uses=1] %2 = and i8 %1, -16 ; [#uses=1] %3 = or i8 %2, 5 ; [#uses=1] store i8 %3, i8* %0, align 4 llvm-svn: 127565
* Now that we are deleting unused live intervals during allocation, pointers ↵Jakob Stoklund Olesen2011-03-131-2/+4
| | | | | | | | may be reused. Use the virtual register number as a cache tag instead. They are not reused. llvm-svn: 127561
* Tell the register allocator about new unused virtual registers.Jakob Stoklund Olesen2011-03-134-1/+26
| | | | | | | This allows the allocator to free any resources used by the virtual register, including physical register assignments. llvm-svn: 127560
* Build CompilerDriver library.Oscar Fuentes2011-03-122-4/+7
| | | | llvm-svn: 127554
* Teach ComputeMaskedBits about sub nsw.Benjamin Kramer2011-03-121-8/+16
| | | | llvm-svn: 127548
* Speculatively revert commit 127478 (jsjodin) in an attempt to fix theDuncan Sands2011-03-121-0/+7
| | | | | | | | | | llvm-gcc-i386-linux-selfhost and llvm-x86_64-linux-checks buildbots. The original log entry: Remove optimization emitting a reference insted of label difference, since it can create more relocations. Removed isBaseAddressKnownZero method, because it is no longer used. llvm-svn: 127540
* This patch removes some of useless instructions generated by bitfield access.Jin-Gu Kang2011-03-121-3/+13
| | | | llvm-svn: 127539
* Include snippets in the live stack interval.Jakob Stoklund Olesen2011-03-121-1/+3
| | | | llvm-svn: 127530
* Spill multiple registers at once.Jakob Stoklund Olesen2011-03-122-48/+210
| | | | | | | | | | | Live range splitting can create a number of small live ranges containing only a single real use. Spill these small live ranges along with the large range they are connected to with copies. This enables memory operand folding and maximizes the spill to fill distance. Work in progress with known bugs. llvm-svn: 127529
* Fixed the comparison operator for the enhancedSean Callanan2011-03-121-7/+2
| | | | | | disassembler's disassembler map. llvm-svn: 127527
* That's it, I am declaring this a failure of the C++03 STL.Jakob Stoklund Olesen2011-03-121-119/+15
| | | | | | | | | | | | | | There are too many compatibility problems with using mixed types in std::upper_bound, and I don't want to spend 110 lines of boilerplate setting up a call to a 10-line function. Binary search is not /that/ hard to implement correctly. I tried terminating the binary search with a linear search, but that actually made the algorithm slower against my expectation. Most live intervals have less than 4 segments. The early test against endIndex() does pay, and this version is 25% faster than plain std::upper_bound(). llvm-svn: 127522
* Sometimes isPredicable lies to us and tells us we don't need the operands.Eric Christopher2011-03-121-6/+25
| | | | | | | | | Go ahead and add them on when we might want to use them and let later passes remove them. Fixes rdar://9118569 llvm-svn: 127518
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