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* [JITLink] Fix section start address calculation in eh-frame recorder.Lang Hames2019-04-221-0/+3
| | | | | | | | | | Section atoms are not sorted, so we need to scan the whole section to find the start address. No test case: Found by inspection, and any reproduction would depend on pointer ordering. llvm-svn: 358865
* llvm-undname: Fix hex escapes in wchar_t, char16_t, char32_t stringsNico Weber2019-04-211-3/+3
| | | | | | | | | | | | | | | | | llvm-undname used to put '\x' in front of every pair of nibbles, but u"\xD7\xFF" produces a string with 6 bytes: \xD7 \0 \xFF \0 (and \0\0). Correct for a single character (plus terminating \0) is u\xD7FF instead. Now, wchar_t, char16_t, and char32_t strings roundtrip from source to clang-cl (and cl.exe) and then llvm-undname. (...at least as long as it's not a string like L"\xD7FF" L"foo" which gets demangled as L"\xD7FFfoo", where the compiler then considers the "f" as part of the hex escape. That seems ok.) Also add a comment saying that the "almost-valid" char32_t string I added in my last commit is actually produced by compilers. llvm-svn: 358857
* llvm-undname: Fix stack overflow on almost-validNico Weber2019-04-211-3/+3
| | | | | | | | | | | | | | | | | If a unsigned with all 4 bytes non-0 was passed to outputHex(), there were two off-by-ones in it: - Both MaxPos and Pos left space for the final \0, which left the buffer one byte to small. Set MaxPos to 16 instead of 15 to fix. - The `assert(Pos >= 0);` was after a `Pos--`, move it up one line. Since valid Unicode codepoints are <= 0x10ffff, this could never really happen in practice. Found by oss-fuzz. llvm-svn: 358856
* [ConstantRange] Add saturating add/sub methodsNikita Popov2019-04-211-0/+36
| | | | | | | | | | | | | | | | Add support for uadd_sat and friends to ConstantRange, so we can handle uadd.sat and friends in LVI. The implementation is forwarding to the corresponding APInt methods with appropriate bounds. One thing worth pointing out here is that the handling of wrapping ranges is not maximally accurate. A simple example is that adding 0 to a wrapped range will return a full range, rather than the original wrapped range. The tests also only check that the non-wrapping envelope is correct and minimal. Differential Revision: https://reviews.llvm.org/D60946 llvm-svn: 358855
* [ConstantRange] Add getNonEmpty() constructorNikita Popov2019-04-213-64/+19
| | | | | | | | | | | | | | ConstantRanges have an annoying special case: If upper and lower are the same, it can be either an empty or a full set. When constructing constant ranges nearly always a full set is intended, but this still requires an explicit check in many places. This revision adds a getNonEmpty() constructor that disambiguates this case: If upper and lower are the same, a full set is created. Differential Revision: https://reviews.llvm.org/D60947 llvm-svn: 358854
* llvm-undname: Fix stack overflow on invalid found by oss-fuzzNico Weber2019-04-211-1/+1
| | | | llvm-svn: 358852
* [ARM] Rewrite isLegalT2AddressImmediateDavid Green2019-04-211-29/+24
| | | | | | | | | | | | | | | | | | | | | This does two main things, firstly adding some at least basic addressing modes for i64 types, and secondly treats floats and doubles sensibly when there is no fpu. The floating point change can help codesize in some cases, especially with D60294. Most backends seems to not consider the exact VT in isLegalAddressingMode, instead switching on type size. That is now what this does when the target does not have an fpu (as the float data will be loaded using LDR's). i64's currently use the address range of an LDRD (even though they may be legalised and loaded with an LDR). This is at least better than marking them all as illegal addressing modes. I have not attempted to do much with vectors yet. That will need changing once MVE is added. Differential Revision: https://reviews.llvm.org/D60677 llvm-svn: 358845
* [X86] Add the rounding control operand to the printing for some scalar FMA ↵Craig Topper2019-04-211-1/+1
| | | | | | instructions. llvm-svn: 358844
* [CachePruning] Simplify comparatorFangrui Song2019-04-211-9/+2
| | | | llvm-svn: 358843
* [X86] Don't form masked vfpclass instruction from and+vfpclass unless the ↵Craig Topper2019-04-211-28/+36
| | | | | | fpclass only has a single use. llvm-svn: 358841
* [JITLink] Remove an overly strict error check in JITLink's eh-frame parser.Lang Hames2019-04-212-13/+4
| | | | | | | | The error check required FDEs to refer to the most recent CIE, but the eh-frame spec allows them to refer to any previously seen CIE. This patch removes the offending check. llvm-svn: 358840
* [JITLink] Factor basic common GOT and stub creation code into its own class.Lang Hames2019-04-212-72/+130
| | | | llvm-svn: 358838
* llvm-undname: Improve string literal demangling with embedded \0 charsNico Weber2019-04-201-2/+5
| | | | | | | | | - Don't assert when a string looks like a u32 string to the heuristic but doesn't have a length that's 0 mod 4. Instead, classify those as u16 with embedded \0 chars. Found by oss-fuzz. - Print embedded nul bytes as \0 instead of \x00. llvm-svn: 358835
* ftime-trace: Trace the name of the currently active pass as well.Nico Weber2019-04-201-6/+3
| | | | | | Differential Revision: https://reviews.llvm.org/D60782 llvm-svn: 358834
* [JITLink] Add yet more detail to MachO/x86-64 unsupported relocation errors.Lang Hames2019-04-201-1/+4
| | | | | | | | Knowing the address/symbolnum field values makes it easier to identify the unsupported relocation, and provides enough information for the full bit pattern of the relocation to be reconstructed. llvm-svn: 358833
* [JITLink][ORC] Add JITLink to the list of dependencies for ORC.Lang Hames2019-04-201-1/+2
| | | | | | | | | The new ObjectLinkingLayer in ORC depends on JITLink. This should fix the build error at http://lab.llvm.org:8011/builders/clang-ppc64le-linux-multistage/builds/9621 llvm-svn: 358832
* [JITLink] Fix a bad formatv format string.Lang Hames2019-04-201-1/+1
| | | | llvm-svn: 358831
* Revert r358800. Breaks Obsequi from the test suite.Amara Emerson2019-04-202-100/+12
| | | | | | | The last attempt fixed gcc and consumer-typeset, but Obsequi seems to fail with a different issue. llvm-svn: 358829
* [JITLink] Add BinaryFormat to JITLink's dependencies.Lang Hames2019-04-201-1/+1
| | | | | | | | | Hopefully this will fix the missing dependence on llvm::identify_magic that is showing up on some PPC bots. E.g. http://lab.llvm.org:8011/builders/clang-ppc64le-linux-multistage/builds/9617 llvm-svn: 358827
* [JITLink] Add more detail to MachO/x86-64 "unsupported relocation" errors.Lang Hames2019-04-201-1/+5
| | | | | | | The extra information here will be helpful in diagnosing errors, like the ones currently occuring on the PPC big-endian bots. :) llvm-svn: 358826
* [JITLink] Silence some MSVC implicit cast warnings.Lang Hames2019-04-201-2/+3
| | | | llvm-svn: 358824
* [JITLink] Use memset instead of bzero.Lang Hames2019-04-201-2/+2
| | | | llvm-svn: 358822
* [JITLink] Fix a missing header and bad prototype.Lang Hames2019-04-201-1/+2
| | | | llvm-svn: 358819
* Initial implementation of JITLink - A replacement for RuntimeDyld.Lang Hames2019-04-2019-65/+3169
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: JITLink is a jit-linker that performs the same high-level task as RuntimeDyld: it parses relocatable object files and makes their contents runnable in a target process. JITLink aims to improve on RuntimeDyld in several ways: (1) A clear design intended to maximize code-sharing while minimizing coupling. RuntimeDyld has been developed in an ad-hoc fashion for a number of years and this had led to intermingling of code for multiple architectures (e.g. in RuntimeDyldELF::processRelocationRef) in a way that makes the code more difficult to read, reason about, extend. JITLink is designed to isolate format and architecture specific code, while still sharing generic code. (2) Support for native code models. RuntimeDyld required the use of large code models (where calls to external functions are made indirectly via registers) for many of platforms due to its restrictive model for stub generation (one "stub" per symbol). JITLink allows arbitrary mutation of the atom graph, allowing both GOT and PLT atoms to be added naturally. (3) Native support for asynchronous linking. JITLink uses asynchronous calls for symbol resolution and finalization: these callbacks are passed a continuation function that they must call to complete the linker's work. This allows for cleaner interoperation with the new concurrent ORC JIT APIs, while still being easily implementable in synchronous style if asynchrony is not needed. To maximise sharing, the design has a hierarchy of common code: (1) Generic atom-graph data structure and algorithms (e.g. dead stripping and | memory allocation) that are intended to be shared by all architectures. | + -- (2) Shared per-format code that utilizes (1), e.g. Generic MachO to | atom-graph parsing. | + -- (3) Architecture specific code that uses (1) and (2). E.g. JITLinkerMachO_x86_64, which adds x86-64 specific relocation support to (2) to build and patch up the atom graph. To support asynchronous symbol resolution and finalization, the callbacks for these operations take continuations as arguments: using JITLinkAsyncLookupContinuation = std::function<void(Expected<AsyncLookupResult> LR)>; using JITLinkAsyncLookupFunction = std::function<void(const DenseSet<StringRef> &Symbols, JITLinkAsyncLookupContinuation LookupContinuation)>; using FinalizeContinuation = std::function<void(Error)>; virtual void finalizeAsync(FinalizeContinuation OnFinalize); In addition to its headline features, JITLink also makes other improvements: - Dead stripping support: symbols that are not used (e.g. redundant ODR definitions) are discarded, and take up no memory in the target process (In contrast, RuntimeDyld supported pointer equality for weak definitions, but the redundant definitions stayed resident in memory). - Improved exception handling support. JITLink provides a much more extensive eh-frame parser than RuntimeDyld, and is able to correctly fix up many eh-frame sections that RuntimeDyld currently (silently) fails on. - More extensive validation and error handling throughout. This initial patch supports linking MachO/x86-64 only. Work on support for other architectures and formats will happen in-tree. Differential Revision: https://reviews.llvm.org/D58704 llvm-svn: 358818
* [X86] Disable argument copy elision for arguments passed via pointersCraig Topper2019-04-201-1/+5
| | | | | | | | | | | | | | | | | | | | | Summary: If you pass two 1024 bit vectors in IR with AVX2 on Windows 64. Both vectors will be split in four 256 bit pieces. The four pieces of the first argument will be passed indirectly using 4 gprs. The second argument will get passed via pointers in memory. The PartOffsets stored for the second argument are all in terms of its original 1024 bit size. So the PartOffsets for each piece are 32 bytes apart. So if we consider it for copy elision we'll only load an 8 byte pointer, but we'll move the address 32 bytes. The stack object size we create for the first part is probably wrong too. This issue was encountered by ISPC. I'm working on getting a reduce test case, but wanted to go ahead and get feedback on the fix. Reviewers: rnk Reviewed By: rnk Subscribers: dbabokin, llvm-commits, hiraditya Tags: #llvm Differential Revision: https://reviews.llvm.org/D60801 llvm-svn: 358817
* [CorrelatedValuePropagation] Mark subs that we know not to wrap with nuw/nsw.Luqman Aden2019-04-201-25/+26
| | | | | | | | | | | | | | | | | | | Summary: Teach CorrelatedValuePropagation to also handle sub instructions in addition to add. Relatively simple since makeGuaranteedNoWrapRegion already understood sub instructions. Only subtle change is which range is passed as "Other" to that function, since sub isn't commutative. Note that CorrelatedValuePropagation::processAddSub is still hidden behind a default-off flag as IndVarSimplify hasn't yet been fixed to strip the added nsw/nuw flags and causes a miscompile. (PR31181) Reviewers: sanjoy, apilipenko, nikic Reviewed By: nikic Subscribers: hiraditya, jfb, jdoerfert, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60036 llvm-svn: 358816
* [ExecutionDomainFix] Optimize a binary search insertionFangrui Song2019-04-201-3/+3
| | | | llvm-svn: 358815
* [llvm-symbolizer] Fix section index at the end of a sectionFangrui Song2019-04-201-2/+1
| | | | | | | | This is very minor issue. The returned section index is only used by DWARFDebugLine as an llvm::upper_bound input and the use case shouldn't cause any behavioral change. llvm-svn: 358814
* [X86] Fix stack probing on x32 (PR41477)Nikita Popov2019-04-202-8/+15
| | | | | | | | | | Fix for https://bugs.llvm.org/show_bug.cgi?id=41477. On the x32 ABI with stack probing a dynamic alloca will result in a WIN_ALLOCA_32 with a 32-bit size. The current implementation tries to copy it into RAX, resulting in a physreg copy error. Fix this by copying to EAX instead. Also fix incorrect opcodes or registers used in subs. llvm-svn: 358807
* [X86] Don't turn (and (shl X, C1), C2) into (shl (and X, (C1 >> C2), C2) if ↵Craig Topper2019-04-201-18/+37
| | | | | | | | | | the original AND can represented by MOVZX. The MOVZX doesn't require an immediate to be encoded at all. Though it does use a 2 byte opcode so its the same size as a 1 byte immediate. But it has a separate source and dest register so can help avoid copies. llvm-svn: 358805
* [X86] Turn (and (anyextend (shl X, C1), C2)) into (shl (and (anyextend X), ↵Craig Topper2019-04-201-9/+29
| | | | | | | | | (C1 >> C2), C2) if the AND could match a movzx. There's one slight regression in here because we don't check that the immediate already allowed movzx before the shift. I'll fix that next. llvm-svn: 358804
* [WebAssembly] Object: Improve error messages on invalid sectionSam Clegg2019-04-201-3/+3
| | | | | | | | Also add a test. Differential Revision: https://reviews.llvm.org/D60836 llvm-svn: 358801
* Revert "Revert "[GlobalISel] Add legalization support for non-power-2 loads ↵Amara Emerson2019-04-192-12/+100
| | | | | | | | | and stores"" We were shifting the wrong component of a split load when trying to combine them back into a single value. llvm-svn: 358800
* [GlobalISel][AArch64] Legalize + select G_FRINTJessica Paquette2019-04-193-1/+4
| | | | | | | | | | Exactly the same as G_FCEIL, G_FABS, etc. Add tests for the fp16/nofp16 behaviour, update arm64-vfloatintrinsics, etc. Differential Revision: https://reviews.llvm.org/D60895 llvm-svn: 358799
* [WebAssembly] FastISel: Don't fallback to SelectionDAG after BuildMI in ↵Sam Clegg2019-04-191-6/+9
| | | | | | | | | | | | | | | | | selectCall My understanding is that once BuildMI has been called we can't fallback to SelectionDAG. This change moves the fallback for when getRegForValue() fails for that target of an indirect call. This was failing in -fPIC mode when the callee is GlobalValue. Add a test case that tickles this. Differential Revision: https://reviews.llvm.org/D60908 llvm-svn: 358793
* [GVN+LICM] Use line 0 locations for better crash attributionVedant Kumar2019-04-192-10/+8
| | | | | | | | | | | | This is a follow-up to r291037+r291258, which used null debug locations to prevent jumpy line tables. Using line 0 locations achieves the same effect, but works better for crash attribution because it preserves the right inline scope. Differential Revision: https://reviews.llvm.org/D60913 llvm-svn: 358791
* Remove the EnableEarlyCSEMemSSA set of options from the legacyEric Christopher2019-04-192-10/+2
| | | | | | | | | and new pass managers. They were default to true and not being used. Differential Revision: https://reviews.llvm.org/D60747 llvm-svn: 358789
* [AArch64] Fix checks for AArch64MCExpr::VK_SABS flag.Eli Friedman2019-04-191-2/+2
| | | | | | | | | | | | | | VK_SABS is part of the SymLoc bitfield in the variant kind which should be compared for equality, not by checking the VK_SABS bit. As far as I know, the existing code happened to produce the correct results in all cases, so this is just a cleanup. Patch by Stephen Crane. Differential Revision: https://reviews.llvm.org/D60596 llvm-svn: 358788
* [GlobalISel] Add IRTranslator support for G_FRINTJessica Paquette2019-04-191-0/+2
| | | | | | | | Add it as a simple intrinsic, update arm64-irtranslator.ll. Differential Revision: https://reviews.llvm.org/D60893 llvm-svn: 358787
* Attempt to fix buildbot failure in commit ↵Amy Huang2019-04-191-1/+1
| | | | | | 1bb57bac959ac163fd7d8a76d734ca3e0ecee6ab. llvm-svn: 358786
* [MS] Emit S_HEAPALLOCSITE debug infoAmy Huang2019-04-194-0/+36
| | | | | | | | | | | | | | | | | Summary: This emits labels around heapallocsite calls and S_HEAPALLOCSITE debug info in codeview. Currently only changes FastISel, so emitting labels still needs to be implemented in SelectionDAG. Reviewers: hans, rnk Subscribers: aprantl, hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D60800 llvm-svn: 358783
* [LICM & MemorySSA] Make limit flags pass tuning options.Alina Sbirlea2019-04-194-43/+64
| | | | | | | | | | | | | | Summary: Make the flags in LICM + MemorySSA tuning options in the old and new pass managers. Subscribers: mehdi_amini, jlebar, Prazek, george.burgess.iv, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60490 llvm-svn: 358772
* Revert "[GlobalISel] Add legalization support for non-power-2 loads and stores"Amara Emerson2019-04-192-100/+12
| | | | | | This introduces some runtime failures which I'll need to investigate further. llvm-svn: 358771
* [GlobalISel][AArch64] Legalize vector G_FPOWJessica Paquette2019-04-192-2/+3
| | | | | | | | | | This instruction is legalized in the same way as G_FSIN, G_FCOS, G_FLOG10, etc. Update legalize-pow.mir and arm64-vfloatintrinsics.ll to reflect the change. Differential Revision: https://reviews.llvm.org/D60218 llvm-svn: 358764
* [NewPassManager] Adding pass tuning options: loop vectorize.Alina Sbirlea2019-04-194-7/+22
| | | | | | | | | | | | | | | | Summary: Trying to add the plumbing necessary to add tuning options to the new pass manager. Testing with the flags for loop vectorize. Reviewers: chandlerc Subscribers: sanjoy, mehdi_amini, jlebar, steven_wu, dexonsmith, dang, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D59723 llvm-svn: 358763
* [SelectionDAG] soften splat mask assert/unreachable (PR41535)Sanjay Patel2019-04-191-1/+4
| | | | | | | | These are general queries, so they should not die when given a degenerate input like an all undef mask. Callers should be able to deal with an op that will eventually be simplified away. llvm-svn: 358761
* llvm-undname: Attempt to fix leak-on-invalid found by oss-fuzzNico Weber2019-04-191-3/+6
| | | | llvm-svn: 358760
* [LTO] Add plumbing to save stats during LTO on Darwin.Florian Hahn2019-04-192-13/+41
| | | | | | | | | | | | | | | | | | | | | Gold and ld on Linux already support saving stats, but the infrastructure is missing on Darwin. Unfortunately it seems like the configuration from lib/LTO/LTO.cpp is not used. This patch adds a new LTOStatsFile option and adds plumbing in Clang to use it on Darwin, similar to the way remarks are handled. Currnetly the handling of LTO flags seems quite spread out, with a bunch of duplication. But I am not sure if there is an easy way to improve that? Reviewers: anemet, tejohnson, thegameg, steven_wu Reviewed By: steven_wu Differential Revision: https://reviews.llvm.org/D60516 llvm-svn: 358753
* [CodeGen] Add "const" to MachineInstr::mayAliasBjorn Pettersson2019-04-1919-69/+90
| | | | | | | | | | | | | | | | | | | | | | | | Summary: The basic idea here is to make it possible to use MachineInstr::mayAlias also when the MachineInstr is const (or the "Other" MachineInstr is const). The addition of const in MachineInstr::mayAlias then rippled down to the need for adding const in several other places, such as TargetTransformInfo::getMemOperandWithOffset. Reviewers: hfinkel Reviewed By: hfinkel Subscribers: hfinkel, MatzeB, arsenm, jvesely, nhaehnle, hiraditya, javed.absar, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D60856 llvm-svn: 358744
* [PATCH] [MachineScheduler] Check pending instructions when an instruction is ↵James Molloy2019-04-191-0/+2
| | | | | | | | | | | | | | scheduled Pending instructions that may have been blocked from being available by the HazardRecognizer may no longer may not be blocked any more when an instruction is scheduled; pending instructions should be re-checked in this case. This is primarily aimed at VLIW targets with large parallelism and esoteric constraints. No testcase as no in-tree targets have this behavior. Differential revision: https://reviews.llvm.org/D60861 llvm-svn: 358743
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