summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Collapse)AuthorAgeFilesLines
...
* Add LiveRangeShrink pass to shrink live range within BB.Dehao Chen2017-05-314-0/+234
| | | | | | | | | | | | | | Summary: LiveRangeShrink pass moves instruction right after the definition with the same BB if the instruction and its operands all have more than one use. This pass is inexpensive and guarantees optimal live-range within BB. Reviewers: davidxl, wmi, hfinkel, MatzeB, andreadb Reviewed By: MatzeB, andreadb Subscribers: hiraditya, jyknight, sanjoy, skatkov, gberry, jholewinski, qcolombet, javed.absar, krytarowski, atrick, spatel, RKSimon, andreadb, MatzeB, mehdi_amini, mgorny, efriedma, davide, dberlin, llvm-commits Differential Revision: https://reviews.llvm.org/D32563 llvm-svn: 304371
* [EH] Recognize __(gxx|gcc)_personality_seh0 as the GNU EH personalitiesReid Kleckner2017-05-311-0/+2
| | | | | | | | | These are no-ops when there are no invokes. We don't need to emit LSDAs for them. Fixes PR33220. llvm-svn: 304367
* ImplicitNullChecks: Clear kill/dead flags when moving instructions aroundMatthias Braun2017-05-311-2/+14
| | | | | | | The values are marked as livein in the successor blocks so marking them as killed or dead was wrong. llvm-svn: 304366
* Check hasPersonalityFn before calling getPersonalityFnReid Kleckner2017-05-311-4/+5
| | | | llvm-svn: 304365
* [EH] Fix the LSDA that we emit for unknown EH personalitiesReid Kleckner2017-05-312-5/+16
| | | | | | | | | | | | | | We should have a single call site entry with no landing pad. This indicates that no EH action should be taken and the unwinder should unwind to the next frame. We currently don't recognize __gxx_personality_seh0 as a known personality, so we forcibly emit a table, and that table was wrong. This was filed as PR33220. Now we emit a correct table for that personality. The next step is to recognize that we can completely skip the table for this personality. llvm-svn: 304363
* [MachOObject] Fix bind opcode parser error on valid opcode sequenceSteven Wu2017-05-311-1/+1
| | | | | | | BIND_OPCODE_SET_DYLIB_SPECIAL_IMM(0) is a valid way to setp library ordinal. MachOObject should set LibraryOrdinalSet even when IMM is zero. llvm-svn: 304362
* Added LLVM_FALLTHROUGH to address warning: this statement may fall through. NFC.Galina Kistanova2017-05-311-0/+1
| | | | llvm-svn: 304361
* Added LLVM_FALLTHROUGH to address warning: this statement may fall through. NFC.Galina Kistanova2017-05-311-0/+4
| | | | llvm-svn: 304358
* Added LLVM_FALLTHROUGH to address warning: this statement may fall through. NFC.Galina Kistanova2017-05-311-0/+1
| | | | llvm-svn: 304356
* Added LLVM_FALLTHROUGH to address warning: this statement may fall through. NFC.Galina Kistanova2017-05-311-0/+1
| | | | llvm-svn: 304355
* Revert rL304050. It may break sanitizer bootstrap. Revert it for now while ↵Wei Mi2017-05-311-143/+21
| | | | | | investigating. llvm-svn: 304350
* Try to fix buildbotsMatthias Braun2017-05-311-1/+3
| | | | | | | | It seems not all of our bots have a std::vector::erase() taking a const_iterator (even though that seems to be part of C++11) attempt to workaround. llvm-svn: 304349
* X86FloatingPoint: Fix livein listsMatthias Braun2017-05-312-15/+26
| | | | | | | | | | | | After transforming FP to ST registers: - Do not add the ST register to the livein lists, they are reserved so we do not need to track their liveness. - Remove the FP registers from the livein lists, they don't have defs or uses anymore and so are not live. - (The setKillFlags() call is moved to an earlier place as it relies on the FP registers still being present in the livein list.) llvm-svn: 304342
* X86FloatingPoint: Add some static assert, cleanup; NFCMatthias Braun2017-05-311-2/+6
| | | | llvm-svn: 304341
* Added missing break; added LLVM_FALLTHROUGH to address warning: this ↵Galina Kistanova2017-05-311-0/+2
| | | | | | statement may fall through. NFC. llvm-svn: 304340
* [libFuzzer] fix a test to match the new sanitizer run-timeKostya Serebryany2017-05-311-4/+4
| | | | llvm-svn: 304333
* Added LLVM_FALLTHROUGH to address warning: this statement may fall through. NFC.Galina Kistanova2017-05-311-0/+4
| | | | llvm-svn: 304332
* [IR] Add additional addParamAttr/removeParamAttr to AttributeList APIReid Kleckner2017-05-315-39/+117
| | | | | | | | | | | | | | | | | | | Summary: Fairly straightforward patch to fill in some of the holes in the attributes API with respect to accessing parameter/argument attributes. The patch aims to step further towards encapsulating the idx+FirstArgIndex pattern to access these attributes to within the AttributeList. Patch by Daniel Neilson! Reviewers: rnk, chandlerc, pete, javed.absar, reames Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D33355 llvm-svn: 304329
* [TableGen] Make Record::getValueAsString and getValueAsListOfStrings return ↵Craig Topper2017-05-311-3/+3
| | | | | | | | | | | | StringRefs instead of std::string Internally both these methods just return the result of getValue on either a StringInit or a CodeInit object. In both cases this returns a StringRef pointing to a string allocated in the BumpPtrAllocator so its not going anywhere. So we can just pass that StringRef along. This is a fairly naive patch that targets just the build failures caused by this change. There's additional work that can be done to avoid creating std::string at call sites that still think getValueAsString returns a std::string. I'll try to clean those up in future patches. Differential Revision: https://reviews.llvm.org/D33710 llvm-svn: 304325
* [BPF] Correct the file name of the -gen-asm-matcher output file to not start ↵Craig Topper2017-05-311-1/+1
| | | | | | with X86. llvm-svn: 304324
* [ThinLTO] Reduce unnecessary map lookups during combined summary writeTeresa Johnson2017-05-311-28/+28
| | | | | | | | | | | | | | | | | | | Summary: Don't assign values to undefined references, simply don't emit those reference edges as they are not useful (we were already not emitting call edges to undefined refs). Also, streamline the later lookup of value ids when writing the summaries, by combining the check for value id existence with the access of that value id. Reviewers: pcc Subscribers: Prazek, llvm-commits, inglorion Differential Revision: https://reviews.llvm.org/D33634 llvm-svn: 304323
* [ScheduleDAG] Deal with already scheduled loads in ScheduleDAG.Nirav Dave2017-05-311-128/+150
| | | | | | | | | | | | | | | | | Summary: If we attempt to unfold an SUnit in ScheduleDAG that results in finding an already scheduled load, we must should abort the unfold as it will not improve scheduling. This fixes PR32610. Reviewers: jmolloy, sunfish, bogner, spatel Subscribers: llvm-commits, MatzeB Differential Revision: https://reviews.llvm.org/D32911 llvm-svn: 304321
* TargetMachine: Indicate whether machine verifier passes.Matthias Braun2017-05-3111-2/+43
| | | | | | | | | | | | | This adds a callback to the LLVMTargetMachine that lets target indicate that they do not pass the machine verifier checks in all cases yet. This is intended to be a temporary measure while the targets are fixed allowing us to enable the machine verifier by default with EXPENSIVE_CHECKS enabled! Differential Revision: https://reviews.llvm.org/D33696 llvm-svn: 304320
* [sanitizer-coverage] remove stale code (old coverage); llvm part Kostya Serebryany2017-05-311-130/+10
| | | | llvm-svn: 304319
* [PowerPC] Correctly specify the cache line size for Power 7, 8 and 9.Sean Fertile2017-05-311-3/+12
| | | | | | | | | | Fixes PPCTTIImpl::getCacheLineSize() returning the wrong cache line size for newer ppc processors. Commiting on behalf of Stefan Pintilie. Differential Revision: https://reviews.llvm.org/D33656 llvm-svn: 304317
* Revert "[Atomics][LoopIdiom] Recognize unordered atomic memcpy"Anna Thomas2017-05-312-97/+15
| | | | | | | | | | This reverts commit r304310. It caused build failures in polly and mingw due to undefined reference to llvm::RTLIB::getMEMCPY_ELEMENT_ATOMIC. llvm-svn: 304315
* [PPC] Inline expansion of memcmpZaara Syeda2017-05-318-18/+641
| | | | | | | | | | | | | | | This patch does an inline expansion of memcmp. It changes the memcmp library call into an inline expansion when the size is known at compile time and is under a target specified threshold. This expansion is implemented in CodeGenPrepare and expands into straight line code. The target specifies a maximum load size and the expansion works by using this size to load the two sources, compare, and exit early if a difference is found. It also has a special case when the memcmp result is used in a compare to zero equality. Differential Revision: https://reviews.llvm.org/D28637 llvm-svn: 304313
* Added LLVM_FALLTHROUGH to address warning: this statement may fall through. NFC.Galina Kistanova2017-05-311-5/+13
| | | | llvm-svn: 304312
* [AMDGPU] Fix bugs in new waitcnt pass. Add test.Mark Searles2017-05-311-4/+22
| | | | | | | | | | | - new waitcnt pass remains off by default; -enable-si-insert-waitcnts=1 to enable it - fix handling of PERMUTE ops - fix insertion of waitcnt instrs at function begin/end ( port of analogous code that was added to old waitcnt pass ) - add new test Differential Revision: https://reviews.llvm.org/D33114 llvm-svn: 304311
* [Atomics][LoopIdiom] Recognize unordered atomic memcpyAnna Thomas2017-05-312-15/+97
| | | | | | | | | | | | | | | | | | | | | Summary: Expanding the loop idiom test for memcpy to also recognize unordered atomic memcpy. The only difference for recognizing an unordered atomic memcpy and instead of a normal memcpy is that the loads and/or stores involved are unordered atomic operations. Background: http://lists.llvm.org/pipermail/llvm-dev/2017-May/112779.html Patch by Daniel Neilson! Reviewers: reames, anna, skatkov Reviewed By: reames Subscribers: llvm-commits, mzolotukhin Differential Revision: https://reviews.llvm.org/D33243 llvm-svn: 304310
* [AMDGPU][MC] New syntax for ds_swizzle_b32 offsetDmitry Preobrazhensky2017-05-318-5/+505
| | | | | | | | | | See Bug 28601: https://bugs.llvm.org//show_bug.cgi?id=28601 Reviewers: artem.tamazov, vpykhtin Differential Revision: https://reviews.llvm.org/D33542 llvm-svn: 304309
* [AArch64] Enable FeatureFuseAES on Cortex-A53.Florian Hahn2017-05-311-0/+1
| | | | | | It improves performance on Cortex-A53. llvm-svn: 304307
* [AArch64] Enable FeatureFuseAES on Cortex-A73.Florian Hahn2017-05-311-0/+1
| | | | | | It improves performance on Cortex-A73. llvm-svn: 304304
* Fix assertion when merging multiple empty AttributeListsReid Kleckner2017-05-311-0/+4
| | | | | | | | Patch by Nicholas Wilson! Differential Revision: https://reviews.llvm.org/D33627 llvm-svn: 304300
* [DAG] Avoid use of stale store.Nirav Dave2017-05-311-2/+2
| | | | | | | | | | | | | | | | | | Correct references to alignment of store which may be deleted in a previous iteration of merge. Instead use first store that would be merged. Corrects pr33172's use-after-poison caught by ASan. Reviewers: spatel, hfinkel, RKSimon Reviewed By: RKSimon Subscribers: thegameg, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D33686 llvm-svn: 304299
* [PowerPC] Fix a performance bug for PPC::XXPERMDI.Tony Jiang2017-05-314-13/+110
| | | | | | | | | | There are some VectorShuffle Nodes in SDAG which can be selected to XXPERMDI Instruction, this patch recognizes them and does the selection to improve the PPC performance. Differential Revision: https://reviews.llvm.org/D33404 llvm-svn: 304298
* [PowerPC] Eliminate integer compare instructions - vol. 3Nemanja Ivanovic2017-05-311-9/+64
| | | | | | | | | This patch builds upon https://reviews.llvm.org/rL302810 to add handling for the 64-bit SETEQ patterns. Differential Revision: https://reviews.llvm.org/D33369 llvm-svn: 304286
* [AVR] Fix a big in shift operator lowering; Authored by Dr. Gergo ErdiDylan McKay2017-05-311-2/+2
| | | | | | | When generating code for a shift loop, check the shift amount against the literal value 0, not R0 llvm-svn: 304284
* [AVR] CPIRdK can only work with r16..r31; Authored by Dr. Gergo ErdiDylan McKay2017-05-311-1/+1
| | | | | | (https://github.com/avr-rust/rust/issues/50) llvm-svn: 304283
* [PowerPC] Eliminate integer compare instructions - vol. 2Nemanja Ivanovic2017-05-314-12/+230
| | | | | | | | | | | | This patch builds upon https://reviews.llvm.org/rL302810 to add handling for bitwise logical operations in general purpose registers. The idea is to keep the values in GPRs as long as possible - only extracting them to a condition register bit when no further operations are to be done. Differential Revision: https://reviews.llvm.org/D31851 llvm-svn: 304282
* [TableGen] Make one of RecordVal's constructors delegate to the other to ↵Craig Topper2017-05-311-6/+0
| | | | | | reduce duplicate code. llvm-svn: 304280
* [ObjectYAML] Split CodeViewYAML into 3 pieces.Zachary Turner2017-05-314-561/+632
| | | | | | | | | The code was a mess and disorganized due to the sheer amount of it being in one file. So I'm splitting this into three files. One for CodeView types, one for CodeView symbols, and one for CodeView debug subsections. NFC. llvm-svn: 304278
* [coroutines] Call initializePass in coroutine pass constructorsGor Nishanov2017-05-314-4/+12
| | | | | | | | | | | | | | | | Summary: Fixes: https://bugs.llvm.org/show_bug.cgi?id=33226 Reviewers: chandlerc, davide, majnemer, dblaikie Reviewed By: chandlerc Subscribers: EricWF, llvm-commits Differential Revision: https://reviews.llvm.org/D33701 llvm-svn: 304277
* [CFLAA] Add missing break; note things are broken.George Burgess IV2017-05-311-0/+6
| | | | | | | | | | Thanks to Galina Kistanova for finding the missing break! When trying to make a test for this, I realized our logic for handling extractvalue/insertvalue/... is somewhat broken. This makes constructing a test-case for this missing break nontrivial. llvm-svn: 304275
* X86FrameLowering: No need to mark FP as live-in everywhereMatthias Braun2017-05-311-7/+2
| | | | | | | | The frame pointer (when used as frame pointer) is a reserved register. We do not track liveness of reserved registers and hence do not need to add them to the basic block livein lists. llvm-svn: 304274
* NewGVN: Fix PR 33185 by checking whether we need to recursivelyDaniel Berlin2017-05-311-23/+15
| | | | | | generate a phi of ops, which we don't currently support. llvm-svn: 304272
* InstructionSimplify: Remove now-redundant reachability tests, as dominates() ↵Daniel Berlin2017-05-311-6/+1
| | | | | | already does them llvm-svn: 304270
* ARM: Fix cmpxchg O0 expansionMatthias Braun2017-05-311-59/+73
| | | | | | | | | | | | | | | | This is the equivalent of r304048 for ARM: - Rewrite livein calculation to use the computeLiveIns() helper function. This is slightly less efficient but easier to reason about and doesn't unnecessarily add pristine and reserved registers[1] - Zero the status register at the beginning of the loop to make sure it has a defined value. - Remove kill flags of values that need to stay alive throughout the loop. [1] An upcoming commit of mine will tighten the MachineVerifier to catch these. llvm-svn: 304267
* ARM: Do not add reserved registers to block livein lists; NFCMatthias Braun2017-05-312-6/+8
| | | | llvm-svn: 304266
* [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use ↵Eugene Zelenko2017-05-313-54/+89
| | | | | | warnings; other minor fixes (NFC). llvm-svn: 304265
OpenPOWER on IntegriCloud