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* Add an option to this pass. If it is set, we are allowed to internalizeChris Lattner2005-10-181-4/+10
| | | | | | | all but main. If it's not set, we can still internalize, but only if an explicit symbol list is provided. llvm-svn: 23783
* Fold (select C, load A, load B) -> load (select C, A, B). This happens quiteChris Lattner2005-10-181-7/+82
| | | | | | | | | | | | | | | | | | | | | | a lot throughout many programs. In particular, specfp triggers it a bunch for constant FP nodes when you have code like cond ? 1.0 : -1.0. If the PPC ISel exposed the loads implicit in pic references to external globals, we would be able to eliminate a load in cases like this as well: %X = external global int %Y = external global int int* %test4(bool %C) { %G = select bool %C, int* %X, int* %Y ret int* %G } Note that this breaks things that use SrcValue's (see the fixme), but since nothing uses them yet, this is ok. Also, simplify some code to use hasOneUse() on an SDOperand instead of hasNUsesOfValue directly. llvm-svn: 23781
* Do the right thing and enable 64 bit regs under the control of a subtargetNate Begeman2005-10-183-8/+10
| | | | | | | option. Currently the only way to enable this is to specify the 64bitregs mattr flag. It is never enabled by default on any config yet. llvm-svn: 23779
* First bits of 64 bit PowerPC stuff, currently disabled. A lot of this isNate Begeman2005-10-189-88/+154
| | | | | | purely mechanical. llvm-svn: 23778
* Implement some feedback from Chris re: constant canonicalizationNate Begeman2005-10-181-39/+27
| | | | llvm-svn: 23777
* Legalize BUILD_PAIR appropriately for upcoming 64 bit PowerPC work.Nate Begeman2005-10-181-0/+25
| | | | llvm-svn: 23776
* fold fmul X, +2.0 -> fadd X, X;Nate Begeman2005-10-171-14/+17
| | | | llvm-svn: 23774
* Make this work for FP constantexprsChris Lattner2005-10-171-2/+3
| | | | llvm-svn: 23773
* Oops, X+0.0 isn't foldable, but X+-0.0 is.Chris Lattner2005-10-171-4/+5
| | | | llvm-svn: 23772
* relax this a bit, as we only support the default rounding modeChris Lattner2005-10-171-2/+4
| | | | llvm-svn: 23771
* add a trivial foldChris Lattner2005-10-171-0/+4
| | | | llvm-svn: 23764
* More PPC32 -> PPC changes, as well as merging some classes that wereNate Begeman2005-10-1620-170/+152
| | | | | | redundant after the change. llvm-svn: 23759
* Fix this logic.Chris Lattner2005-10-151-1/+1
| | | | llvm-svn: 23756
* Add a case we were missing that was causing us to fail ↵Chris Lattner2005-10-151-0/+14
| | | | | | CodeGen/PowerPC/rlwinm.ll:test3 llvm-svn: 23755
* Remove some dead code now that the dag combiner exists.Nate Begeman2005-10-151-15/+0
| | | | llvm-svn: 23754
* Remove some dead code: the ORI/ORIS cases are autogen'd. This makesChris Lattner2005-10-151-42/+1
| | | | | | SelectIntImmediateExpr dead. llvm-svn: 23753
* prune #includesChris Lattner2005-10-152-3/+2
| | | | llvm-svn: 23752
* These instructions are now autogeneratedChris Lattner2005-10-151-34/+0
| | | | llvm-svn: 23751
* Add a pattern for FSQRTSChris Lattner2005-10-151-1/+1
| | | | llvm-svn: 23750
* remove dead codeChris Lattner2005-10-151-8/+3
| | | | llvm-svn: 23749
* Use getExtLoad here instead of getNode, as extloads produce two values. ThisChris Lattner2005-10-151-2/+3
| | | | | | fixes a legalize failure on SPASS for itanium. llvm-svn: 23747
* remove broken SRA/rlwimi caseChris Lattner2005-10-151-11/+2
| | | | llvm-svn: 23746
* Rename PPC32*.h to PPC*.hChris Lattner2005-10-1414-17/+16
| | | | | | This completes the grand PPC file renaming llvm-svn: 23745
* Merge PPCJITInfo.h and PPC32JITInfo.h. Note that the PowerPCJITInfoChris Lattner2005-10-145-45/+22
| | | | | | and PPC32JITInfo classes should be merged. llvm-svn: 23744
* Rename PowerPC*.h to PPC*.hChris Lattner2005-10-1417-19/+19
| | | | llvm-svn: 23743
* Rename PowerPCInstrBuilder.h -> PPC*Chris Lattner2005-10-144-3/+3
| | | | llvm-svn: 23742
* Nuke the PowerPCTargetMachine.h header. Note that the PowerPCTargetMachineChris Lattner2005-10-144-49/+24
| | | | | | still should be merged into the PPC32TargetMachine class llvm-svn: 23741
* Rename PowerPC*.td -> PPC*.tdChris Lattner2005-10-144-4/+4
| | | | llvm-svn: 23740
* These are deadChris Lattner2005-10-142-74/+0
| | | | llvm-svn: 23739
* Eliminate PowerPC.td and PPC32.td, consolidating them into PPC.tdChris Lattner2005-10-149-32/+70
| | | | llvm-svn: 23738
* Like the comment says...Chris Lattner2005-10-141-6/+0
| | | | llvm-svn: 23737
* Nuke PowerPCInstrFormats.h, its contents are dead. Remove the definitionsChris Lattner2005-10-146-87/+11
| | | | | | from the .td file that correspond to it llvm-svn: 23736
* Properly split f32 and f64 into separate register classes for scalar sse fpNate Begeman2005-10-145-79/+78
| | | | | | fixing a bunch of nasty hackery llvm-svn: 23735
* Remove an unnecsesary file. PPC32 and PPC64 share architected registers.Nate Begeman2005-10-144-52/+38
| | | | | | | We will decide with subtarget support whether we ever use an i64 register class. llvm-svn: 23734
* add the integer truncate/extension operationsChris Lattner2005-10-141-3/+14
| | | | llvm-svn: 23733
* These are now autogeneratedChris Lattner2005-10-141-12/+0
| | | | llvm-svn: 23731
* Add patterns for FP round/extendChris Lattner2005-10-141-2/+2
| | | | llvm-svn: 23727
* add a new SDTCisOpSmallerThanOp type constraint, and implement ↵Chris Lattner2005-10-141-0/+13
| | | | | | fround/fextend in terms of it llvm-svn: 23726
* fold sext_in_reg, sext_in_reg where both have the same VT. This wasNate Begeman2005-10-141-1/+1
| | | | | | popping up in Fourinarow. llvm-svn: 23722
* Allow $Chris Lattner2005-10-141-1/+1
| | | | llvm-svn: 23721
* Relax the checking on zextload generation a bit, since as sabre pointed outNate Begeman2005-10-142-27/+49
| | | | | | | | | | you could be AND'ing with the result of a shift that shifts out all the bits you care about, in addition to a constant. Also, move over an add/sub_parts fold from legalize to the dag combiner, where it works for things other than constants. Woot! llvm-svn: 23720
* Fix the trunc(load) case, finally allowing crafty and povray to passChris Lattner2005-10-131-1/+2
| | | | llvm-svn: 23718
* Fix some bugs in (sext (load x))Chris Lattner2005-10-131-1/+2
| | | | llvm-svn: 23717
* When ExpandOp'ing a [SZ]EXTLOAD, make sure to remember that the chainChris Lattner2005-10-131-2/+28
| | | | | | is also legal. Add support for ExpandOp'ing raw EXTLOADs too. llvm-svn: 23716
* Implement PromoteOp for *EXTLOAD, allowing MallocBench/gs to LegalizeChris Lattner2005-10-131-0/+10
| | | | llvm-svn: 23715
* Fix the remaining DAGCombiner issues pointed out by sabre. This should fixNate Begeman2005-10-131-16/+11
| | | | | | the remainder of the failures introduced by my patch last night. llvm-svn: 23714
* Fix a minor bug in the dag combiner that broke pcompress2 and some otherChris Lattner2005-10-131-4/+3
| | | | | | tests. llvm-svn: 23713
* Add support to Legalize for expanding i64 sextload/zextload into hi and loNate Begeman2005-10-131-0/+35
| | | | | | | parts. This should fix the crafty and signed long long unit test failure on x86 last night. llvm-svn: 23711
* Inhibit instructions from being pushed before function calls. This willJim Laskey2005-10-131-3/+55
| | | | | | minimize unnecessary spilling. llvm-svn: 23710
* Move some Legalize functionality over to the DAGCombiner where it belongs.Nate Begeman2005-10-133-149/+79
| | | | | | Kill some dead code. llvm-svn: 23706
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