summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Collapse)AuthorAgeFilesLines
* Fix Android regression in r197332.Evgeniy Stepanov2013-12-161-0/+1
| | | | llvm-svn: 197366
* [AArch64]Fix the pattern match failure for v1i8/v1i16/v1i32 types.Hao Liu2013-12-162-1/+20
| | | | | | | | | | Currently we have such types as legal vector types. The DAG combiner may generate some DAG nodes having such types but we don't have patterns to match them. E.g. a load i32 and a bitcast i32 to v1i32 will be combined into a load v1i32: bitcast (load i32) to v1i32 -> load v1i32. So this patch fixes such problems for load/dup instructions. If v1i8/v1i16/v1i32 are not legal any more, the code in this patch can be deleted. So I also add some FIXME. llvm-svn: 197361
* remove an uneeded statement (condition is covered by the statementReed Kotler2013-12-151-2/+0
| | | | | | that follows). llvm-svn: 197358
* Fix some indentation.Reed Kotler2013-12-151-10/+10
| | | | llvm-svn: 197357
* Get rid of an superfluous tab in the .s file. This was originallyReed Kotler2013-12-151-1/+1
| | | | | | part of a multi-line pseudo which worked around a linker bug for mips16. llvm-svn: 197356
* Last change for mips16 prolog/epilog cleanup and optimization.Reed Kotler2013-12-154-58/+76
| | | | | | | | | Some tiny cosmetic code changes to follow. Because of the wide ranging nature of the patch a full 24 test cycle was needed to check against regression. This was the smallest patch I could make to progress from the earlier ones in the series. llvm-svn: 197350
* There is no exp10 on NetBSD.Joerg Sonnenberger2013-12-151-0/+6
| | | | llvm-svn: 197348
* Fix AsmWriter's handling of SPIR calling conventions. Patch by Boaz Ouriel.Michael Kuperstein2013-12-151-0/+2
| | | | llvm-svn: 197335
* Replace string matching with a switch on Triple::getEnvironment.Joerg Sonnenberger2013-12-151-4/+10
| | | | llvm-svn: 197332
* [Stackmap] Refactor operand parsing.Juergen Ributzka2013-12-141-91/+74
| | | | llvm-svn: 197329
* Don't manually calculate size in bytesMatt Arsenault2013-12-141-2/+3
| | | | llvm-svn: 197327
* [Powerpc darwin] AsmParser Base implementation.Iain Sandoe2013-12-141-13/+134
| | | | | | | | | | | | This is a base implementation of the powerpc-apple-darwin asm parser dialect. * Enables infrastructure (essentially isDarwin()) and fixes up the parsing of asm directives to separate out ELF and MachO/Darwin additions. * Enables parsing of {r,f,v}XX as register identifiers. * Enables parsing of lo16() hi16() and ha16() as modifiers. The changes to the test case are from David Fang (fangism). llvm-svn: 197324
* Remove weak vtables. No functional change.Juergen Ributzka2013-12-144-1/+9
| | | | llvm-svn: 197323
* [Stackmap] Liveness Analysis PassJuergen Ributzka2013-12-147-14/+255
| | | | | | | | | | | | | | | | | | | | This optional register liveness analysis pass can be enabled with either -enable-stackmap-liveness, -enable-patchpoint-liveness, or both. The pass traverses each basic block in a machine function. For each basic block the instructions are processed in reversed order and if a patchpoint or stackmap instruction is encountered the current live-out register set is encoded as a register mask and attached to the instruction. Later on during stackmap generation the live-out register mask is processed and also emitted as part of the stackmap. This information is optional and intended for optimization purposes only. This will enable a client of the stackmap to reason about the registers it can use and which registers need to be preserved. Reviewed by Andy llvm-svn: 197317
* [Stackmap] Only the AnyReg calling convention should preserve all registers.Juergen Ributzka2013-12-142-5/+8
| | | | llvm-svn: 197316
* Convert register liveness tracking to work on a sub-register level instead ↵Juergen Ributzka2013-12-145-146/+145
| | | | | | | | of just register units. Reviewed by Andy llvm-svn: 197315
* Refactor NVPTX's computeDataLayout.Rafael Espindola2013-12-141-4/+9
| | | | | | No functionality change. llvm-svn: 197312
* Turn NVPTXSubtarget::getDataLayout into a static function.Rafael Espindola2013-12-142-16/+11
| | | | | | No functionality change. llvm-svn: 197311
* Turn AMDGPUSubtarget::getDataLayout into a static function.Rafael Espindola2013-12-143-29/+24
| | | | | | No functionality change. llvm-svn: 197310
* [block-freq] Rename getEntryFrequency() -> getEntryFreq() to match ↵Michael Gottesman2013-12-144-5/+5
| | | | | | getBlockFreq() in all *BlockFrequencyInfo*. llvm-svn: 197304
* [block-freq] Teach branch probability how to return the edge weight in ↵Michael Gottesman2013-12-141-0/+10
| | | | | | | | | | between a BasicBlock and one of its successors. IMHO At some point BasicBlock should be refactored along the lines of MachineBasicBlock so that successors/weights are actually embedded within the block. Now is not that time though. llvm-svn: 197303
* [block-freq] Add a right shift to BlockFrequency that saturates at 1.Michael Gottesman2013-12-141-0/+12
| | | | llvm-svn: 197302
* [block-freq] Remove old BlockFrequency entry frequency and printing code.Michael Gottesman2013-12-141-21/+0
| | | | llvm-svn: 197297
* [block-freq] Refactor LiveInterals::getSpillWeight to use the new ↵Michael Gottesman2013-12-144-8/+10
| | | | | | | | | | | | | | | | | | | | | | | MachineBlockFrequencyInfo methods. This is slightly more interesting than the previous batch of changes. Specifically: 1. We refactor getSpillWeight to take a MachineBlockFrequencyInfo (MBFI) object. This enables us to completely encapsulate the actual manner we use the MachineBlockFrequencyInfo to get our spill weights. This yields cleaner code since one does not need to fetch the actual block frequency before getting the spill weight if all one wants it the spill weight. It also gives us access to entry frequency which we need for our computation. 2. Instead of having getSpillWeight take a MachineBasicBlock (as one might think) to look up the block frequency via the MBFI object, we instead take in a MachineInstr object. The reason for this is that the method is supposed to return the spill weight for an instruction according to the comments around the function. llvm-svn: 197296
* Teach MemoryBuiltins about address spacesMatt Arsenault2013-12-141-5/+11
| | | | llvm-svn: 197292
* [block-freq] Store MBFI as a field on SpillPlacement so we can access it to ↵Michael Gottesman2013-12-142-3/+5
| | | | | | get the entry frequency while processing data. llvm-svn: 197291
* [block-freq] Update MachineBlockPlacement and RegAllocGreedy to use the new ↵Michael Gottesman2013-12-142-9/+13
| | | | | | MachineBlockFrequencyInfo methods. llvm-svn: 197290
* [block-freq] Update BlockFrequencyInfo/MachineBlockFrequencyInfo to use the ↵Michael Gottesman2013-12-142-2/+2
| | | | | | new print methods. llvm-svn: 197289
* Print the address space of a MachineMemOperandMatt Arsenault2013-12-141-0/+4
| | | | llvm-svn: 197288
* [block-freq] Add the equivalent methods to MachineBlockFrequencyInfo and ↵Michael Gottesman2013-12-142-0/+27
| | | | | | BlockFrequencyInfo that were added to BlockFrequencyImpl in r197285 and r197284. llvm-svn: 197287
* Pointer sizes are stored in Bytes. Fix variables names to say so.Rafael Espindola2013-12-131-19/+19
| | | | | | Also update for the current naming style. llvm-svn: 197283
* Fixed a bug in getARMFixupKindMachOInfo() where three ARM fixup kindsKevin Enderby2013-12-131-1/+5
| | | | | | | | | | | were falling into the cases for 24-bit branch kinds which are not 24-bit branches. The routine is to return false for fixups are expected to always be resolvable at assembly time. Which these three fixups are as they have limited displacement and are for local references within a function. rdar://15586725 llvm-svn: 197282
* comment typo.Andrew Trick2013-12-131-1/+1
| | | | llvm-svn: 197278
* Remove APInt::extractBit since it is already implemented via operator[]. ↵Michael Gottesman2013-12-131-8/+0
| | | | | | Change tests for extractBit to test operator[]. llvm-svn: 197277
* DebugInfo: Move type units into the debug_types section with appropriate ↵David Blaikie2013-12-136-18/+65
| | | | | | | | | | | | | | | | | | | | | | | | comdat grouping and type unit headers This commit does not complete the type units feature - there are issues around fission support (skeletal type units, pubtypes/pubnames) and hashing of some types including those containing references to types in other type units. Originally committed as r197073 and reverted in r197079. Recommitted as r197197 to reproduce the failure and reverted as r197199 Turns out there was unstable ordering in the type unit dumping code. Fixed by using MapVector in DWARFContext to store the debug_types comdat sections. Recommitted as r197210 with a fix to dumping and reverted as r197211 because I was a bit gun shy and thought I saw a failure that turned out to be unrelated. So here we go - once more with feeling! \o/ llvm-svn: 197275
* [block-freq] Add the APInt method extractBit.Michael Gottesman2013-12-131-0/+8
| | | | llvm-svn: 197271
* Revert "Convert liveness tracking to work on a sub-register level instead of ↵Andrew Trick2013-12-135-122/+146
| | | | | | | | | | just register units." This reverts commit r197253. This was a great change, but Juergen should be the commit author. llvm-svn: 197262
* Revert "Liveness Analysis Pass"Andrew Trick2013-12-137-253/+14
| | | | | | | | | | | | | | This reverts commit r197254. This was an accidental merge of Juergen's patch. It will be checked in shortly, but wasn't meant to go in quite yet. Conflicts: include/llvm/CodeGen/StackMaps.h lib/CodeGen/StackMaps.cpp test/CodeGen/X86/stackmap-liveness.ll llvm-svn: 197260
* Grow the stackmap/patchpoint format to hold 64-bit IDs.Andrew Trick2013-12-132-9/+8
| | | | llvm-svn: 197255
* Liveness Analysis PassAndrew Trick2013-12-137-13/+252
| | | | llvm-svn: 197254
* Convert liveness tracking to work on a sub-register level instead of just ↵Andrew Trick2013-12-135-146/+122
| | | | | | register units. llvm-svn: 197253
* [AArch64] Simplify the Neon Scalar3Same patterns for floating-point reciprocalChad Rosier2013-12-131-91/+65
| | | | | | | | | step, floating-point reciprocal square root step, floating-point absolute difference, and integer/floating-point compare instructions. Also, move the scalar general arithmetic operation patterns closer to similar code. No functional change intended. llvm-svn: 197250
* Assume defaults to produce smaller datalayout strings.Rafael Espindola2013-12-136-26/+10
| | | | llvm-svn: 197249
* Fix pr18235.Rafael Espindola2013-12-132-25/+18
| | | | | | | | | | The cpp backend is not a reasonable fallback for a missing target. It is a very special backend, so it is reasonable to use it only if explicitly requested. While at it, simplify the interface a bit. llvm-svn: 197241
* [SystemZ] Optimize X [!=]= Y in cases where X - Y or Y - X is also computedRichard Sandiford2013-12-131-0/+21
| | | | | | | In those cases it's better to compare the result of the subtraction against zero. llvm-svn: 197239
* [SystemZ] Make more use of TMHHRichard Sandiford2013-12-131-25/+53
| | | | | | | | | | This originally came about after noticing that InstCombine turns some of the TMHH (icmp (and...), ...) tests into plain comparisons. Since there is no instruction to compare with a 64-bit immediate, TMHH is generally better than an ordered comparison for the cases that it can handle. llvm-svn: 197238
* test commit.Iain Sandoe2013-12-131-1/+1
| | | | | | Amend a comment. llvm-svn: 197237
* [SystemZ] Extend integer absolute selectionRichard Sandiford2013-12-134-4/+55
| | | | | | | | This patch makes more use of LPGFR and LNGFR. It builds on top of the LTGFR selection from r197234. Most of the tests are motivated by what InstCombine would produce. llvm-svn: 197236
* [SystemZ] Add a structure to represent a selected comparisonRichard Sandiford2013-12-131-175/+180
| | | | | | | | | | | ...in an attempt to rein back the increasingly complex selection code. A knock-on effect is that ICmpType is exposed from the outset, which slightly simplifies adjustSubwordCmp. The code is no piece of art even after this change, but at least it should be slightly better. No behavioral change intended. llvm-svn: 197235
* [SystemZ] Make more use of LTGFRRichard Sandiford2013-12-131-0/+31
| | | | | | | | | | | | InstCombine turns (sext (trunc)) into (ashr (shl)), then converts any comparison of the ashr against zero into a comparison of the shl against zero. This makes sense in itself, but we want to undo it for z, since the sign- extension instruction has a CC-setting form. I've included tests for both the original and InstCombined variants, but the former already worked. The patch fixes the latter. llvm-svn: 197234
OpenPOWER on IntegriCloud