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* When instructions are hoisted out of loops by MachineLICM, remove their ↵Wolfgang Pieb2016-12-021-0/+5
| | | | | | | | | | | | | | | debug loc. This prevents erratic stepping behavior as well as incorrect source attribution for sample profiling. Reviewers: dblakie Subscribers: llvm-commit Differential Revision: https://reviews.llvm.org/D27290 llvm-svn: 288442
* SDAG: Avoid a large, usually empty SmallVector in a recursive functionJustin Bogner2016-12-021-2/+2
| | | | | | | | | | | | | | | This SmallVector is using up 128 bytes on the stack every time despite almost always being empty[1], and since this function can recurse quite deeply that adds up to a lot of overhead. We've seen this run afoul of ulimits in some cases with ASAN on. Replacing the SmallVector with a std::vector trades an occasional heap allocation for vastly less stack usage. [1]: I gathered some stats on an internal test suite and the vector was non-empty in only 45,000 of 10,000,000 calls to this function. llvm-svn: 288441
* [AArch64] Fold more spilled/refilled COPYs.Geoff Berry2016-12-011-10/+36
| | | | | | | | | | | | | | | Summary: Make AArch64InstrInfo::foldMemoryOperandImpl more general by folding all full COPYs between register classes of the same size that are either spilled or refilled. Reviewers: MatzeB, qcolombet Subscribers: aemerson, rengolin, mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D27271 llvm-svn: 288439
* [MC] Refactor emitELFSize to make usage more consistent. NFC.Dan Gohman2016-12-015-12/+9
| | | | | | | | | | | | | Move the cast<MCSymbolELF> inside emitELFSize, so that: - it's done in one place instead of at each call - it's more consistent with similar functions like EmitCOFFSafeSEH - ambiguity between cast<> and dyn_cast<> is avoided (which also eliminates an unnecessary dyn_cast call) This also makes it easier to experiment with using ".size" directives on non-ELF targets. llvm-svn: 288437
* [ARM] Fix for 64-bit CAS expansion on ARM32 with -O0Oleg Ranevskyy2016-12-011-7/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This patch fixes comparison of 64-bit atomic with its expected value in CMP_SWAP_64 expansion. Currently, the low words are compared with CMP, while the high words are compared with SBC. SBC expects the carry flag to be set if CMP detects a difference. CMP might leave the carry unset for unequal arguments though if the first one is >= than the second. This might cause the comparison logic to detect false equality. Example of the broken C++ code: ``` std::atomic<long long> at(2); long long ll = 1; std::atomic_compare_exchange_strong(&at, &ll, 3); ``` Even though the atomic `at` and the expected value `ll` are not equal and `atomic_compare_exchange_strong` returns `false`, `at` is changed to 3. The patch replaces SBC with CMPEQ. Reviewers: t.p.northover Subscribers: aemerson, rengolin, llvm-commits, asl Differential Revision: https://reviews.llvm.org/D27315 llvm-svn: 288433
* Revert "[SLP] Fix for PR6246: vectorization for scalar ops on vector elements."Artem Belevich2016-12-011-72/+66
| | | | | | This reverts r288412 which causes severe compile-time regression. llvm-svn: 288431
* RegisterCoalscer: Only coalesce complete reserved registers.Matthias Braun2016-12-011-1/+7
| | | | | | | | | | | | The coalescer eliminates copies from reserved registers of the form: %vregX = COPY %rY in the case where %rY is a reserved register. However this turns out to be invalid if only some of the subregisters are reserved (see also https://reviews.llvm.org/D26648). Differential Revision: https://reviews.llvm.org/D26687 llvm-svn: 288428
* [debug info] Minor cleanup from D27170/r288399David Blaikie2016-12-013-3/+3
| | | | llvm-svn: 288421
* AArch64: fix 128-bit cmpxchg at -O0 (again, again).Tim Northover2016-12-011-6/+14
| | | | | | | | | | | | | | | This time the issue is fortunately just a simple mistake rather than a horrible design spectre. I thought SUBS/SBCS provided sufficient NZCV flags for comparing two 64-bit values, but they don't. The fix is slightly clunkier in AArch64 because we can't use conditional execution to emit a pair of CMPs. Traditionally an "icmp ne i128" would map to an EOR/EOR/ORR/CBNZ, but that uses more registers so it's easier to go with a CSET/CINC/CBNZ combination. Slightly less efficient, but this is -O0 anyway. Thanks to Anton Korobeynikov for pointing out the issue. llvm-svn: 288418
* Fix unused variable warning in Release builds. NFC.Benjamin Kramer2016-12-011-1/+1
| | | | llvm-svn: 288416
* [PR29121] Don't fold if it would produce atomic vector loads or storesPhilip Reames2016-12-011-14/+28
| | | | | | | | The instcombine code which folds loads and stores into their use types can trip up if the use is a bitcast to a type which we can't directly load or store in the IR. In principle, such types shouldn't exist, but in practice they do today. This is a workaround to avoid a bug while we work towards the long term goal. Differential Revision: https://reviews.llvm.org/D24365 llvm-svn: 288415
* Factor out common parts of LVI and Float2Int into ConstantRange [NFCI]Philip Reames2016-12-013-80/+98
| | | | | | | | | | This just extracts out the transfer rules for constant ranges into a single shared point. As it happens, neither bit of code actually overlaps in terms of the handled operators, but with this change that could easily be tweaked in the future. I also want to have this separated out to make experimenting with a eager value info implementation and possibly a ValueTracking-like fixed depth recursion peephole version. There's no reason all four of these can't share a common implementation which reduces the chances of bugs. Differential Revision: https://reviews.llvm.org/D27294 llvm-svn: 288413
* [SLP] Fix for PR6246: vectorization for scalar ops on vector elements.Alexey Bataev2016-12-011-66/+72
| | | | | | | | | | | | | | | When trying to vectorize trees that start at insertelement instructions function tryToVectorizeList() uses vectorization factor calculated as MinVecRegSize/ScalarTypeSize. But sometimes it does not work as tree cost for this fixed vectorization factor is too high. Patch tries to improve the situation. It tries different vectorization factors from max(PowerOf2Floor(NumberOfVectorizedValues), MinVecRegSize/ScalarTypeSize) to MinVecRegSize/ScalarTypeSize and tries to choose the best one. Differential Revision: https://reviews.llvm.org/D27215 llvm-svn: 288412
* Refactored X86InterleavedAccess into a class. NFCI.David L Kreitzer2016-12-011-67/+171
| | | | | | | | Patch by Farhana Aleen Differential Revision: https://reviews.llvm.org/D25986 llvm-svn: 288410
* Move most EH from MachineModuleInfo to MachineFunctionMatthias Braun2016-12-0120-272/+260
| | | | | | | | | | | | | | | | | | | | | | | Recommitting r288293 with some extra fixes for GlobalISel code. Most of the exception handling members in MachineModuleInfo is actually per function data (talks about the "current function") so it is better to keep it at the function instead of the module. This is a necessary step to have machine module passes work properly. Also: - Rename TidyLandingPads() to tidyLandingPads() - Use doxygen member groups instead of "//===- EH ---"... so it is clear where a group ends. - I had to add an ugly const_cast at two places in the AsmPrinter because the available MachineFunction pointers are const, but the code wants to call tidyLandingPads() in between (markFunctionEnd()/endFunction()). Differential Revision: https://reviews.llvm.org/D27227 llvm-svn: 288405
* Fix unused variable warning in Release builds. NFC.Benjamin Kramer2016-12-011-1/+1
| | | | llvm-svn: 288401
* This change removes the dependency on DwarfDebug that was used for ↵Greg Clayton2016-12-019-85/+63
| | | | | | | | | | | | | DW_FORM_ref_addr by making a new DIEUnit class in DIE.cpp. The DIEUnit class represents a compile or type unit and it owns the unit DIE as an instance variable. This allows anyone with a DIE, to get the unit DIE, and then get back to its DIEUnit without adding any new ivars to the DIE class. Why was this needed? The DIE class has an Offset that is always the CU relative DIE offset, not the "offset in debug info section" as was commented in the header file (the comment has been corrected). This is great for performance because most DIE references are compile unit relative and this means most code that accessed the DIE's offset didn't need to make it into a compile unit relative offset because it already was. When we needed to emit a DW_FORM_ref_addr though, we needed to find the absolute offset of the DIE by finding the DIE's compile/type unit. This class did have the absolute debug info/type offset and could be added to the CU relative offset to compute the absolute offset. With this change we can easily get back to a DIE's DIEUnit which will have this needed offset. Prior to this is required having a DwarfDebug and required calling: DwarfCompileUnit *DwarfDebug::lookupUnit(const DIE *CU) const; Now we can use the DIEUnit class to do so without needing DwarfDebug. All clients now use DIEUnit objects (the DwarfDebug stack and the DwarfLinker). A follow on patch for the DWARF generator will also take advantage of this. Differential Revision: https://reviews.llvm.org/D27170 llvm-svn: 288399
* [SLP] Fixed cost model for horizontal reduction.Alexey Bataev2016-12-011-1/+2
| | | | | | | | | | | | | | Currently when cost of scalar operations is evaluated the vector type is used for scalar operations. Patch fixes this issue and fixes evaluation of the vector operations cost. Several test showed that vector cost model is too optimistic. It allowed vectorization of 8 or less add/fadd operations, though scalar code is faster. Actually, only for 16 or more operations vector code provides better performance. Differential Revision: https://reviews.llvm.org/D26277 llvm-svn: 288398
* [llvm] Implement support for -defsym assembler optionMandeep Singh Grang2016-12-011-0/+16
| | | | | | | | | | | | | | | Summary: Changes to llvm-mc to move common logic to separate function. Related clang patch: https://reviews.llvm.org/D26213 Reviewers: rafael, t.p.northover, colinl, echristo, rengolin Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D26214 llvm-svn: 288396
* [X86][SSE] Moved shuffle mask widening/narrowing helper functions earlier in ↵Simon Pilgrim2016-12-011-78/+84
| | | | | | | | the file. Will be necessary for a future patch. llvm-svn: 288395
* [libFuzzer] add a test for r288389 (-rss_limit_mb=0 means no limit).Kostya Serebryany2016-12-011-0/+3
| | | | llvm-svn: 288392
* [SystemZ] Fix fallout from r288374Ulrich Weigand2016-12-011-1/+2
| | | | | | Avoid undefined behavior due to too-large shift count. llvm-svn: 288391
* [AsmParser] Diagnose empty symbol for .set directiveWeiming Zhao2016-12-011-0/+3
| | | | | | | | | | | | Summary: Diagnose empty symbol to avoid hitting assertion in MCContext::getOrCreateSymbol Reviewers: eli.friedman, rengolin Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D26728 llvm-svn: 288390
* [libFuzzer] treat -rss_limit_mb=0 as no limitKostya Serebryany2016-12-011-1/+1
| | | | llvm-svn: 288389
* [GVN, OptDiag] Print the interesting instructions involved in missed ↵Adam Nemet2016-12-011-0/+36
| | | | | | | | | | | | | | | | | | | | | load-elimination [recommitting after the fix in r288307] This includes the intervening store and the load/store that we're trying to forward from in the optimization remark for the missed load elimination. This is hooked up under a new mode in ORE that allows for compile-time budget for a bit more analysis to print more insightful messages. This mode is currently enabled for -fsave-optimization-record (-Rpass is trickier since it is controlled in the front-end). With this we can now print the red remark in http://lab.llvm.org:8080/artifacts/opt-view_test-suite/build/SingleSource/Benchmarks/Dhrystone/CMakeFiles/dry.dir/html/_org_test-suite_SingleSource_Benchmarks_Dhrystone_dry.c.html#L446 Differential Revision: https://reviews.llvm.org/D26490 llvm-svn: 288381
* [GVN, OptDiag] Include the value that is forwarded in load eliminationAdam Nemet2016-12-012-7/+30
| | | | | | | | | | | | | | | | | | | | | | | [recommitting after the fix in r288307] This requires some changes to the opt-diag API. Hal and I have discussed this at the Dev Meeting and came up with a streaming delimiter (setExtraArgs) to solve this. Arguments after this delimiter are only included in the optimization records and not in the remarks printed in the compiler output. (Note, how in the test the content of the YAML file changes but the remarks on the compiler output don't.) This implements the green GVN message with a bug fix at line http://lab.llvm.org:8080/artifacts/opt-view_test-suite/build/SingleSource/Benchmarks/Dhrystone/CMakeFiles/dry.dir/html/_org_test-suite_SingleSource_Benchmarks_Dhrystone_dry.c.html#L446 The fix is that now we properly include the constant value in the message: "load of type i32 eliminated in favor of 7" Differential Revision: https://reviews.llvm.org/D26489 llvm-svn: 288380
* [SystemZ] Fix applyFixup for 12-bit fixupsUlrich Weigand2016-12-011-1/+3
| | | | | | | | | Now that we have fixups that only fill parts of a byte, it turns out we have to mask off the bits outside the fixup area when applying them. Failing to do so caused invalid object code to be emitted for bprp with a negative 12-bit displacement. llvm-svn: 288374
* [GVN] Basic optimization remark supportAdam Nemet2016-12-012-3/+26
| | | | | | | | | | | | | | | | [recommitting after the fix in r288307] Follow-on patches will add more interesting cases. The goal of this patch-set is to get the GVN messages printed in opt-viewer from Dhrystone as was presented in my Dev Meeting talk. This is the optimization view for the function (the last remark in the function has a bug which is fixed in this series): http://lab.llvm.org:8080/artifacts/opt-view_test-suite/build/SingleSource/Benchmarks/Dhrystone/CMakeFiles/dry.dir/html/_org_test-suite_SingleSource_Benchmarks_Dhrystone_dry.c.html#L430 Differential Revision: https://reviews.llvm.org/D26488 llvm-svn: 288370
* [X86][SSE] Classify AND bitmasks as variable shuffle masksSimon Pilgrim2016-12-011-0/+4
| | | | | | They are loading the bitmasks from the constant pool so the cost is similar to loading a shuffle mask. llvm-svn: 288367
* [X86][SSE] Add support for combining AND bitmasks to shuffles.Simon Pilgrim2016-12-011-0/+11
| | | | llvm-svn: 288365
* Remove iostream include from WasmObjectFilePavel Labath2016-12-011-2/+0
| | | | | | | The file does not seems to use c++ iostreams (and is is llvm policy to avoid that). Committing as obvious. llvm-svn: 288364
* [LMT] Restrict nop length to oneAsaf Badouh2016-12-011-2/+2
| | | | | | | | | not all lakemont MCU support long nop. we can't assume we can generate long nop by default for MCU. Differential Revision: https://reviews.llvm.org/D26895 llvm-svn: 288363
* Silence GCC's -Wenum-compare after r288335 in the same way it is doneDaniel Jasper2016-12-011-1/+2
| | | | | | in X86FastISel.cpp. llvm-svn: 288337
* [SelectionDAG] Rename and clarify visitFMULForFMADCombine (NFC)Nicolai Haehnle2016-12-011-4/+6
| | | | | | | | | | | | Summary: Suggested by @spatel in D26602. Reviewers: spatel, hfinkel Subscribers: spatel, llvm-commits Differential Revision: https://reviews.llvm.org/D27260 llvm-svn: 288336
* [X86][SSE] Add support for combining target shuffles to AND bitmasks.Simon Pilgrim2016-12-011-0/+31
| | | | llvm-svn: 288335
* [X86][SSE] Add support for combining ISD::AND with shuffles.Simon Pilgrim2016-12-011-0/+19
| | | | | | Attempts to convert an AND with a vector of 255 or 0 values into a shuffle (blend) mask. llvm-svn: 288333
* [SCCP] Switch over to DEBUG() and drop an #ifdef.Davide Italiano2016-12-011-6/+2
| | | | llvm-svn: 288325
* [SCCP] Prefer `auto` when the type is obvious. NFCI.Davide Italiano2016-12-011-27/+27
| | | | llvm-svn: 288324
* Temporarily Revert "Move most EH from MachineModuleInfo to MachineFunction"Eric Christopher2016-12-0119-252/+263
| | | | | | | | | This apprears to have broken the global isel bot: http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-globalisel_build/5174/console This reverts commit r288293. llvm-svn: 288322
* Object: Set SF_Indirect in ModuleSymbolTable.Peter Collingbourne2016-12-011-0/+2
| | | | | | | | This lets us remove the last use of IRObjectFile::getSymbolGV() in llvm-nm. Differential Revision: https://reviews.llvm.org/D27076 llvm-svn: 288321
* Object: Add SF_Executable symbol flag.Peter Collingbourne2016-12-011-1/+4
| | | | | | | | | | | | This allows us to remove a few uses of IRObjectFile::getSymbolGV() in llvm-nm. While here change host-dependent logic in llvm-nm to target-dependent logic. Differential Revision: https://reviews.llvm.org/D27075 llvm-svn: 288320
* Object: Extract a ModuleSymbolTable class from IRObjectFile.Peter Collingbourne2016-12-016-149/+198
| | | | | | | | | | | | This class represents a symbol table built from in-memory IR. It provides access to GlobalValues and should only be used if such access is required (e.g. in the LTO implementation). We will eventually change IRObjectFile to read from a bitcode symbol table rather than using ModuleSymbolTable, so it would not be able to expose the module. Differential Revision: https://reviews.llvm.org/D27073 llvm-svn: 288319
* Bitcode: The index used by ModuleSummaryIndexBitcodeReader is now required, ↵Peter Collingbourne2016-12-011-23/+23
| | | | | | so make it a reference. NFCI. llvm-svn: 288318
* Bitcode: Introduce BitcodeModule::{has,get}Summary().Peter Collingbourne2016-12-011-97/+82
| | | | | | | | These are equivalent to hasGlobalValueSummary() and getModuleSummaryIndex(). Differential Revision: https://reviews.llvm.org/D27242 llvm-svn: 288317
* LTO: Remove ModuleLoader, make loadModuleFromBuffer static and move into its ↵Peter Collingbourne2016-12-012-21/+24
| | | | | | | | | | only client, ThinLTOCodeGenerator. This is no longer the recommended way to load modules for importing, so it should not be public API. Differential Revision: https://reviews.llvm.org/D27292 llvm-svn: 288316
* Bitcode: Correctly handle Fixed and VBR arrays in BitstreamCursor::skipRecord().Peter Collingbourne2016-12-011-6/+4
| | | | | | | | | | | The assertions were wrong; we need to call getEncodingData() on the element, not the array. While here, simplify the skipRecord() implementation for Fixed and Char6 arrays. This is tested by the code I added to llvm-bcanalyzer which makes sure that we can skip any record. Differential Revision: https://reviews.llvm.org/D27241 llvm-svn: 288315
* Revert previous whitespace changePhilip Reames2016-12-011-1/+0
| | | | llvm-svn: 288312
* Test commit of whitespace to check permissions.Philip Reames2016-12-011-0/+1
| | | | llvm-svn: 288311
* [GVN] When merging blocks update LoopInfo if it's availableAdam Nemet2016-12-011-6/+10
| | | | | | | | | | | | | If LoopInfo is available during GVN, BasicAA will use it. However MergeBlockIntoPredecessor does not update LI as it merges blocks. This didn't use to cause problems because LI was freed before GVN/BasicAA. Now with OptimizationRemarkEmitter, the lifetime of LI is extended so LI needs to be kept up-to-date during GVN. Differential Revision: https://reviews.llvm.org/D27288 llvm-svn: 288307
* Use trigrams to speed up SpecialCaseList.Ivan Krasin2016-12-013-2/+109
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: it's often the case when the rules in the SpecialCaseList are of the form hel.o*bar. That gives us a chance to build trigram index to quickly discard 99% of inputs without running a full regex. A similar idea was used in Google Code Search as described in the blog post: https://swtch.com/~rsc/regexp/regexp4.html The check is defeated, if there's at least one regex more complicated than that. In this case, all inputs will go through the regex. That said, the real-world rules are often simple or can be simplied. That considerably speeds up compiling Chromium with CFI and UBSan. As measured on Chromium's content_message_generator.cc: before, CFI: 44 s after, CFI: 23 s after, CFI, no blacklist: 23 s (~1% slower, but 3 runs were unable to show the difference) after, regular compilation to bitcode: 23 s Reviewers: pcc Subscribers: mgorny, llvm-commits Differential Revision: https://reviews.llvm.org/D27188 llvm-svn: 288303
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