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* [x86] Restructure the checking patterns for v16 and v32 avx2 vectorChandler Carruth2014-11-211-28/+24
| | | | | | | | | | shuffle lowering to allow much better blend matching. Specifically, with the new structure the code seems clearer to me and we correctly can hit the cases where merging two 128-bit lanes is a clear win and can be shuffled cheaply afterward. llvm-svn: 222539
* Allow FDE references outside the +/-2GB range supported by PC relativeJoerg Sonnenberger2014-11-211-0/+11
| | | | | | | | | | | | offsets for code models other than small/medium. For JIT application, memory layout is less controlled and can result in truncations otherwise. Patch from Akos Kiss. Differential Revision: http://reviews.llvm.org/D6079 llvm-svn: 222538
* [x86] Make the previous logic significantly less conservative and getChandler Carruth2014-11-211-14/+10
| | | | | | | | | | | | | a bunch more improvements. Non-lane-crossing is fine, the key is that lane merging only makes sense for single-input shuffles. Not sure why I got so turned around here. The code all works, I was just using the wrong model for it. This only updates v4 and v8 lowering. The v16 and v32 lowering requires restructuring the entire check sequence. llvm-svn: 222537
* [DAG] Teach how to turn a build_vector into a shuffle if some of the ↵Andrea Di Biagio2014-11-211-11/+39
| | | | | | | | | | | | | | operands are zero. Before this patch, the DAGCombiner only tried to convert build_vector dag nodes into shuffles if all operands were either extract_vector_elt or undef. This patch improves that logic and teaches the DAGCombiner how to deal with build_vector dag nodes where one or more operands are zero. A build_vector dag node with some zero operands is turned into a shuffle only if the resulting shuffle mask is legal for the target. llvm-svn: 222536
* [x86] Teach the x86 vector shuffle lowering to detect mergable 128-bitChandler Carruth2014-11-211-4/+154
| | | | | | | | | | | | | | | | | | | lanes. By special casing these we can often either reduce the total number of shuffles significantly or reduce the number of (high latency on Haswell) AVX2 shuffles that potentially cross 128-bit lanes. Even when these don't actually cross lanes, they have much higher latency to support that. Doing two of them and a blend is worse than doing a single insert across the 128-bit lanes to blend and then doing a single interleaved shuffle. While this seems like a narrow case, it kept cropping up on me and the difference is *huge* as you can see in many of the test cases. I first hit this trying to perfectly fix the interleaving shuffle patterns used by Halide for AVX2. llvm-svn: 222533
* [DAG] Refactor the shuffle combining logic in DAGCombiner. NFC.Andrea Di Biagio2014-11-211-153/+73
| | | | | | | | This patch simplifies the logic that combines a pair of shuffle nodes into a single shuffle if there is a legal mask. Also added comments to better describe the algorithm. No functional change intended. llvm-svn: 222522
* [X86] For Silvermont CPU use 16-bit division instead of 64-bit for small ↵Alexey Volkov2014-11-214-12/+23
| | | | | | | | positive numbers Differential Revision: http://reviews.llvm.org/D5938 llvm-svn: 222521
* [asan] Add new hidden compile-time flag asan-instrument-allocas to sanitize ↵Yury Gribov2014-11-211-6/+227
| | | | | | | | variable-sized dynamic allocas. Patch by Max Ostapenko. Reviewed at http://reviews.llvm.org/D6055 llvm-svn: 222519
* Add LLVMScalarOpts to LLVMPowerPCCodeGen.NAKAMURA Takumi2014-11-211-1/+1
| | | | llvm-svn: 222516
* DAGCombiner: Allow the DAGCombiner to combine multiple FDIVs with the same ↵Hao Liu2014-11-213-0/+45
| | | | | | | | | | | | divisor info FMULs by the reciprocal. E.g., ( a / D; b / D ) -> ( recip = 1.0 / D; a * recip; b * recip) A hook is added to allow the target to control whether it needs to do such combine. Reviewed in http://reviews.llvm.org/D6334 llvm-svn: 222510
* Remove a bunch of unnecessary typecasts to 'const TargetRegisterClass *'Craig Topper2014-11-217-67/+38
| | | | llvm-svn: 222509
* [PPC] Use SeparateConstOffsetFromGEPHal Finkel2014-11-211-0/+20
| | | | | | | | | | | | This mirrors r222331, which enabled SeparateConstOffsetFromGEP on AArch64, in the PowerPC backend. Yields, on a POWER7 machine, a 30% speedup on SingleSource/Benchmarks/Shootout/nestedloop (this might just be from LICM, there is a store moved out of the inner loop) and a potential speedup on MultiSource/Benchmarks/mediabench/mpeg2/mpeg2dec/mpeg2decode. Regardless, it makes some code look cleaner, and synchronizing the backends in this regard seems like a generally good thing. llvm-svn: 222504
* Add accessor marcos to ConstantPlaceHolder, similar to those in the base class.Richard Trieu2014-11-211-1/+2
| | | | llvm-svn: 222502
* This Reassociate change unintentionally slipped in r222499David Majnemer2014-11-211-7/+0
| | | | llvm-svn: 222500
* SROA: The alloca type isn't a candidate promotion type for vectorsDavid Majnemer2014-11-212-3/+9
| | | | | | | | | | | | The alloca's type is irrelevant, only those types which are used in a load or store of the exact size of the slice should be considered. This manifested as an assertion failure when we compared the various types: we had a size mismatch. This fixes PR21480. llvm-svn: 222499
* [MCJIT] Remove JITEventListener::NotifyFreeingMachineCode. This method is deadLang Hames2014-11-212-22/+0
| | | | | | now that the old JIT has been removed. llvm-svn: 222494
* Add curly braces to workaround an MSVC bug.Zachary Turner2014-11-211-1/+3
| | | | | | MSVC can't parse this pattern for range-based for loops. llvm-svn: 222491
* [X86] Do not custom lower UINT_TO_FP when the target type does notQuentin Colombet2014-11-211-0/+5
| | | | | | | | match the custom lowering. <rdar://problem/19026326> llvm-svn: 222489
* Verifier: Check that all instructions have their parent pointers set upAdrian Prantl2014-11-211-0/+4
| | | | | | | correctly. This helps with catching problems caused by IRBuilder abuse such as the one fixed in CFE r222487. llvm-svn: 222488
* Fix more instances of -Wsentinel on Windows with s/NULL/nullptr/Reid Kleckner2014-11-204-5/+5
| | | | | | Follow up to r221940, where I must not have caught em all. NFC llvm-svn: 222481
* Add out of line virtual destructors to all LLVMTargetMachine subclassesReid Kleckner2014-11-2022-3/+37
| | | | | | | | | | | | | | | | | These recently all grew a unique_ptr<TargetLoweringObjectFile> member in r221878. When anyone calls a virtual method of a class, clang-cl requires all virtual methods to be semantically valid. This includes the implicit virtual destructor, which triggers instantiation of the unique_ptr destructor, which fails because the type being deleted is incomplete. This is just part of the ongoing saga of PR20337, which is affecting Blink as well. Because the MSVC ABI doesn't have key functions, we end up referencing the vtable and implicit destructor on any virtual call through a class. We don't actually end up emitting the dtor, so it'd be good if we could avoid this unneeded type completion work. llvm-svn: 222480
* Update Makefile following directory removal in r222466Mehdi Amini2014-11-201-1/+1
| | | | llvm-svn: 222475
* SimplifyCFG: Refactor GatherConstantCompares() result in a structMehdi Amini2014-11-201-133/+152
| | | | | | | | | | Code seems cleaner and easier to understand this way This is basically r222416, after fixes for MSVC lack of standard support, and a few cleaning (got rid of a warning). Thanks Nakamura Takumi and Nico Weber for the MSVC fixes. llvm-svn: 222472
* [Hexagon] [NFC] Merging InstPrinter directory in to MCTargetDesc since they ↵Colin LeMahieu2014-11-2011-47/+6
| | | | | | have a circular dependency. llvm-svn: 222458
* [MCJIT] Remove JITEventListener::NotifyFunctionEmitted - this method is deadLang Hames2014-11-202-160/+0
| | | | | | now that the legacy JIT has been removed. llvm-svn: 222453
* Fix a trip-count overflow issue in LoopUnroll.Michael Zolotukhin2014-11-201-2/+11
| | | | | | | | | | | | Currently LoopUnroll generates a prologue loop before the main loop body to execute first N%UnrollFactor iterations. Also, this loop is used if trip-count can overflow - it's determined by a runtime check. However, we've been mistakenly optimizing this loop to a linear code for UnrollFactor = 2, not taking into account that it also serves as a safe version of the loop if its trip-count overflows. llvm-svn: 222451
* X86: use the correct alloca symbol for Windows ItaniumSaleem Abdulrasool2014-11-202-2/+8
| | | | | | | Windows itanium targets the MSVCRT, and the stack probe symbol is provided by MSVCRT. This corrects the emission of stack probes on i686-windows-itanium. llvm-svn: 222439
* Make DWARFAcceleratorTable::dump() const.Frederic Riss2014-11-202-9/+12
| | | | | | | | | As dump() methods should be. To allow that, do not store the DWARFFormValue objects used for the dump in the header data. Per Alexey's suggestion! llvm-svn: 222436
* Add missing copyright headers.Frederic Riss2014-11-202-0/+17
| | | | llvm-svn: 222435
* Do not create a replaceable Variables MDNode for function forward decls.Frederic Riss2014-11-201-4/+4
| | | | | | | | These fields would need to be explicitly deleted before we RAUW the temporary node anyway (this was done in cfe commit r222373). Instead, do not create these useless nodes in the first place. llvm-svn: 222434
* Revert r222416, r222422, r222426: the former revision had problems and ↵Timur Iskhodzhanov2014-11-201-150/+136
| | | | | | fixing them introduced bugs llvm-svn: 222428
* Fix a typoTimur Iskhodzhanov2014-11-201-1/+1
| | | | llvm-svn: 222426
* SimplifyCFG.cpp: Tweak to let msc17 compliant.NAKAMURA Takumi2014-11-201-8/+11
| | | | | | | | - Use LLVM_DELETED_FUNCTION. - Don't use member initializers. - Don't use initializer list. llvm-svn: 222422
* SimplifyCFG: Refactor GatherConstantCompares() result in a structMehdi Amini2014-11-201-136/+147
| | | | | | Code seems cleaner and easier to understand this way llvm-svn: 222416
* [ELF] Prevent ARM ELF object writer from generating deprecated relocation ↵Jyoti Allur2014-11-201-1/+1
| | | | | | code R_ARM_PLT32 llvm-svn: 222414
* Fix a typo in a comment.Craig Topper2014-11-201-1/+1
| | | | llvm-svn: 222412
* Remove support for undocumented SpecialCaseList entries.Alexey Samsonov2014-11-201-12/+0
| | | | | | | | | | | | | "global-init", "global-init-src" and "global-init-type" were originally used to blacklist entities in ASan init-order checker. However, they were never documented, and later were replaced by "=init" category. Old blacklist entries should be converted as follows: * global-init:foo -> global:foo=init * global-init-src:bar -> src:bar=init * global-init-type:baz -> type:baz=init llvm-svn: 222401
* [Hexagon] Adding A2_xor instruction with IR selection pattern and test.Colin LeMahieu2014-11-192-6/+6
| | | | llvm-svn: 222399
* Revert "[Reassociate] As the expression tree is rewritten make sure the ↵Chad Rosier2014-11-191-8/+7
| | | | | | | | | | | | | operands are" This reverts commit r222142. This is causing/exposing an execution-time regression in spec2006/gcc and coremark on AArch64/A57/Ofast. Conflicts: test/Transforms/Reassociate/optional-flags.ll llvm-svn: 222398
* [Hexagon] Adding A2_or instruction with IR selection pattern and test.Colin LeMahieu2014-11-192-3/+6
| | | | llvm-svn: 222396
* Try to fix MSVS build after r222384. No intended behavior change.Nico Weber2014-11-191-3/+3
| | | | llvm-svn: 222386
* SimplifyCFG: turn recursive GatherConstantCompares into iterativeMehdi Amini2014-11-191-99/+138
| | | | | | A long sequence of || or && could lead to a stack explosion. llvm-svn: 222384
* RegisterCoalescer: Improve debug messagesMatthias Braun2014-11-191-6/+8
| | | | | | | | | - Show "Considering..." message after flipping so you actually see the final destination vreg as destination. - Add a message on final join, so you can grep for "Success" messages to obtain a list of which register got merged with which. llvm-svn: 222382
* Add a print and verify pass after the RegisterCoalescerMatthias Braun2014-11-191-0/+1
| | | | llvm-svn: 222381
* MachineVerifier: Report register for bad liverangesMatthias Braun2014-11-191-24/+28
| | | | llvm-svn: 222380
* Introduce register dump helperMatthias Braun2014-11-191-0/+9
| | | | llvm-svn: 222379
* AliasSet: Simplify mergeSetInDavid Majnemer2014-11-191-4/+3
| | | | | | No functional change intended. llvm-svn: 222376
* [X86] Improved lowering of v4x32 build_vector dag nodes.Andrea Di Biagio2014-11-191-58/+90
| | | | | | | | | | | | | | | | | | This patch improves the lowering of v4f32 and v4i32 build_vector dag nodes that are known to have at least two non-zero elements. With this patch, a build_vector that performs a blend with zero is converted into a shuffle. This is done to let the shuffle legalizer expand the dag node in a optimal way. For example, if we know that a build_vector performs a blend with zero, we can try to lower it as a movq/blend instead of always selecting an insertps. This patch also improves the logic that lowers a build_vector into a insertps with zero masking. See for example the extra test cases added to test sse41.ll. Differential Revision: http://reviews.llvm.org/D6311 llvm-svn: 222375
* [ADT] Fix PR20728 - Incorrect APFloat::fusedMultiplyAdd results for x86_fp80.Lang Hames2014-11-191-12/+24
| | | | | | | | | | | | | | As detailed at http://llvm.org/PR20728, due to an internal overflow in APFloat::multiplySignificand the APFloat::fusedMultiplyAdd method can return incorrect results for x87DoubleExtended (x86_fp80) values. This commonly manifests as incorrect constant folding of libm fmal calls on x86. E.g. fmal(1.0L, 1.0L, 3.0L) == 0.0L (should be 4.0L) This patch fixes PR20728 by adding an extra bit to the significand for intermediate results of APFloat::multiplySignificand, avoiding the overflow. llvm-svn: 222374
* R600/SI: Make SIInstrInfo::isOperandLegal() more strictTom Stellard2014-11-191-1/+10
| | | | | | | | | | | | A register operand that has a common sub-class with its instruction's defined register class is not always legal. For example, SReg_32 and M0Reg both have a common sub-class, but we can't use an SReg_32 in instructions that expect a M0Reg. This prevents the llvm.SI.sendmsg.ll test from failing when the fold operand pass is added. llvm-svn: 222368
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