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* Adjust to change in ctorChris Lattner2005-10-021-5/+5
| | | | llvm-svn: 23585
* Minor tweak to the branch selector. When emitting a two-way branch, and ifChris Lattner2005-10-011-6/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | we're in a single-mbb loop, make sure to emit the backwards branch as the conditional branch instead of the uncond branch. For example, emit this: LBBl29_z__44: stw r9, 0(r15) stw r9, 4(r15) stw r9, 8(r15) stw r9, 12(r15) addi r15, r15, 16 addi r8, r8, 1 cmpw cr0, r8, r28 ble cr0, LBBl29_z__44 b LBBl29_z__48 *** NOT PART OF LOOP Instead of: LBBl29_z__44: stw r9, 0(r15) stw r9, 4(r15) stw r9, 8(r15) stw r9, 12(r15) addi r15, r15, 16 addi r8, r8, 1 cmpw cr0, r8, r28 bgt cr0, LBBl29_z__48 *** PART OF LOOP! b LBBl29_z__44 The former sequence has one fewer dispatch group for the loop body. llvm-svn: 23582
* like the comment says, enable thisChris Lattner2005-10-011-3/+1
| | | | llvm-svn: 23581
* Add some very paranoid checking for operand/result reg class matchupChris Lattner2005-10-011-3/+20
| | | | | | | For instructions that define multiple results, use the right regclass to define the result, not always the rc of result #0 llvm-svn: 23580
* Fix VC++ warnings.Jeff Cohen2005-10-012-5/+4
| | | | llvm-svn: 23579
* fix typoChris Lattner2005-10-011-1/+1
| | | | llvm-svn: 23578
* Modify the ppc backend to use two register classes for FP: F8RC and F4RC.Chris Lattner2005-10-019-152/+253
| | | | | | | These are used to represent float and double values, and the two regclasses contain the same physical registers. llvm-svn: 23577
* add a methodChris Lattner2005-10-011-0/+5
| | | | llvm-svn: 23575
* typoJim Laskey2005-10-011-1/+1
| | | | llvm-svn: 23574
* 1. Simplify the gathering of node groups.Jim Laskey2005-10-011-54/+22
| | | | | | 2. Printing node groups when displaying nodes. llvm-svn: 23573
* Should be using flag and not chain.Jim Laskey2005-09-301-1/+1
| | | | llvm-svn: 23572
* Remove some now-dead code.Nate Begeman2005-09-301-15/+4
| | | | llvm-svn: 23571
* subtarget support for CIX and FIX extentions (the only 2 I care about right now)Andrew Lenharth2005-09-301-2/+35
| | | | llvm-svn: 23569
* 1. Made things node-centric (from operand).Jim Laskey2005-09-301-244/+609
| | | | | | | | 2. Added node groups to handle flagged nodes. 3. Started weaning simple scheduling off existing emitter. llvm-svn: 23566
* Rename MRegisterDesc -> TargetRegisterDesc for consistencyChris Lattner2005-09-302-2/+2
| | | | llvm-svn: 23564
* trim down the target info structs now that we have a preferred spill ↵Chris Lattner2005-09-301-104/+104
| | | | | | | | register class for each callee save register Why is V9 maintaining these tables manually? ugh! llvm-svn: 23561
* now that we have a reg class to spill with, get this info from the regclassChris Lattner2005-09-301-4/+3
| | | | llvm-svn: 23559
* constant fold these callsChris Lattner2005-09-301-2/+2
| | | | llvm-svn: 23558
* simplify this code using the new regclass info passed inChris Lattner2005-09-301-29/+45
| | | | llvm-svn: 23557
* Now that we have getCalleeSaveRegClasses() info, use it to pass the registerChris Lattner2005-09-301-8/+11
| | | | | | class into the spill/reload methods. Targets can now rely on that argument. llvm-svn: 23556
* stub out a virtual methodChris Lattner2005-09-301-0/+4
| | | | llvm-svn: 23554
* CR registers are not used by this "target"Chris Lattner2005-09-302-8/+1
| | | | llvm-svn: 23552
* these registers don't belong to any register classes, so don't mark themChris Lattner2005-09-301-11/+21
| | | | | | as callee save. They can never be generated by the compiler. llvm-svn: 23551
* Now that self referential classes are supported, get rid of a work-around.Chris Lattner2005-09-301-4/+6
| | | | llvm-svn: 23544
* pass extra argsChris Lattner2005-09-301-2/+4
| | | | llvm-svn: 23539
* these methods get extra argsChris Lattner2005-09-303-8/+14
| | | | llvm-svn: 23538
* Pass extra regclasses into spilling codeChris Lattner2005-09-3010-21/+41
| | | | llvm-svn: 23537
* Change this code ot pass register classes into the stack slot spiller/reloaderChris Lattner2005-09-304-11/+19
| | | | | | | code. PrologEpilogInserter hasn't been updated yet though, so targets cannot use this info. llvm-svn: 23536
* Use the 32-bit version for nowChris Lattner2005-09-301-1/+1
| | | | llvm-svn: 23534
* Add a bunch of patterns for F64 FP ops, add some more integer opsChris Lattner2005-09-292-38/+84
| | | | llvm-svn: 23533
* Remove code for patterns that are autogeneratedChris Lattner2005-09-291-30/+9
| | | | llvm-svn: 23532
* begining alpha subtarget supportAndrew Lenharth2005-09-297-19/+86
| | | | llvm-svn: 23531
* tblgen autogens this pattern nowChris Lattner2005-09-291-6/+0
| | | | llvm-svn: 23530
* copy and paste errorAndrew Lenharth2005-09-291-1/+1
| | | | llvm-svn: 23528
* now that tblgen is smarter, this pattern is not needed. Also, tblgenChris Lattner2005-09-291-3/+1
| | | | | | now inverts commuted versions of ANDC/ORC with the current .td file. llvm-svn: 23527
* Insert stores after phi nodes in the normal dest. This fixesChris Lattner2005-09-291-2/+5
| | | | | | LowerInvoke/2005-08-03-InvokeWithPHI.ll llvm-svn: 23525
* consistency with other cases, no functionality changeChris Lattner2005-09-291-0/+2
| | | | llvm-svn: 23524
* Make the JIT default to the DAG isel instead of the pattern isel, like LLC.Chris Lattner2005-09-291-1/+4
| | | | | | | | | The Pattern isel has some strange memory corruption issues going on. :( This should have been converted over anyway, but it got forgotten somehow when switching to the dag isel. llvm-svn: 23523
* Fix two bugs in my patch earlier today that broke int->fp conversion on X86.Chris Lattner2005-09-291-2/+2
| | | | llvm-svn: 23522
* Fold isascii into a simple comparison. This speeds up 197.parser by 7.4%,Chris Lattner2005-09-291-0/+26
| | | | | | bringing the LLC time down to the CBE time. llvm-svn: 23521
* remove a bunch of unneeded stuff, or self evident commentsChris Lattner2005-09-291-45/+6
| | | | llvm-svn: 23519
* Implement a couple of memcmp folds from the todo listChris Lattner2005-09-291-3/+121
| | | | llvm-svn: 23517
* Silence VC++ redeclaration warnings.Jeff Cohen2005-09-291-4/+6
| | | | llvm-svn: 23516
* Never rely on ReplaceAllUsesWith when selecting, use CodeGenMap instead.Chris Lattner2005-09-291-34/+29
| | | | | | | ReplaceAllUsesWith does not replace scalars SDOperand floating around on the stack, permitting things to be selected multiple times. llvm-svn: 23515
* Codegen ADD X, IMM -> addis/addi if needed.Chris Lattner2005-09-281-2/+12
| | | | | | This implements PowerPC/fold-li.ll llvm-svn: 23514
* Autogen MUL, move FP cases togetherChris Lattner2005-09-281-24/+12
| | | | llvm-svn: 23512
* disentangle FP from INT versions of div/mulChris Lattner2005-09-281-18/+16
| | | | llvm-svn: 23511
* Use the autogenerated matcher for ADD/SUBChris Lattner2005-09-281-30/+0
| | | | llvm-svn: 23510
* add a patter for SUBFICChris Lattner2005-09-281-1/+1
| | | | llvm-svn: 23509
* Mark int binops as int-only, add FP binops. Mark FADD/FMUL as commutative butChris Lattner2005-09-281-15/+23
| | | | | | not associative. Add [SU]REM. llvm-svn: 23508
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