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* Wdocumentation fixSimon Pilgrim2016-12-081-1/+1
| | | | llvm-svn: 289038
* Add a comment consumer mechanism to MCAsmLexerOliver Stannard2016-12-082-1/+17
| | | | | | | | | This allows clients to register an AsmCommentConsumer with the MCAsmLexer, which receives a callback each time a comment is parsed. Differential Revision: https://reviews.llvm.org/D27511 llvm-svn: 289036
* [AVR] Add an assertion to ensure we don't emit LPM when it's unsupportedDylan McKay2016-12-081-0/+2
| | | | llvm-svn: 289030
* LTO: Hash the parts of the LTO configuration that affect code generation.Peter Collingbourne2016-12-081-3/+36
| | | | | | | | | Most importantly, we need to hash the relocation model, otherwise we can end up trying to link non-PIC object files into PIEs or DSOs. Differential Revision: https://reviews.llvm.org/D27556 llvm-svn: 289024
* Revert "[CodeGen] Fix invalid DWARF info on Win64"Keno Fischer2016-12-089-38/+15
| | | | | | Appears to break on build bots. Reverting pending investigation. llvm-svn: 289014
* [CodeGen] Fix invalid DWARF info on Win64Keno Fischer2016-12-089-15/+38
| | | | | | | | | | | | | | | The relocations for `DIEEntry::EmitValue` were wrong for Win64 (emitting FK_Data_4 instead of FK_SecRel_4). This corrects that oversight so that the DWARF data is correct in Win64 COFF files. Fixes PR15393. Patch by Jameson Nash <jameson@juliacomputing.com> based on a patch by David Majnemer. Differential Revision: https://reviews.llvm.org/D21731 llvm-svn: 289013
* Make a DWARF generator so we can unit test DWARF APIs with gtest.Greg Clayton2016-12-088-130/+758
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The only tests we have for the DWARF parser are the tests that use llvm-dwarfdump and expect output from textual dumps. More DWARF parser modification are coming in the next few weeks and I wanted to add tests that can verify that we can encode and decode all form types, as well as test some other basic DWARF APIs where we ask DIE objects for their children and siblings. DwarfGenerator.cpp was added in the lib/CodeGen directory. This file contains the code necessary to easily create DWARF for tests: dwarfgen::Generator DG; Triple Triple("x86_64--"); bool success = DG.init(Triple, Version); if (!success) return; dwarfgen::CompileUnit &CU = DG.addCompileUnit(); dwarfgen::DIE CUDie = CU.getUnitDIE(); CUDie.addAttribute(DW_AT_name, DW_FORM_strp, "/tmp/main.c"); CUDie.addAttribute(DW_AT_language, DW_FORM_data2, DW_LANG_C); dwarfgen::DIE SubprogramDie = CUDie.addChild(DW_TAG_subprogram); SubprogramDie.addAttribute(DW_AT_name, DW_FORM_strp, "main"); SubprogramDie.addAttribute(DW_AT_low_pc, DW_FORM_addr, 0x1000U); SubprogramDie.addAttribute(DW_AT_high_pc, DW_FORM_addr, 0x2000U); dwarfgen::DIE IntDie = CUDie.addChild(DW_TAG_base_type); IntDie.addAttribute(DW_AT_name, DW_FORM_strp, "int"); IntDie.addAttribute(DW_AT_encoding, DW_FORM_data1, DW_ATE_signed); IntDie.addAttribute(DW_AT_byte_size, DW_FORM_data1, 4); dwarfgen::DIE ArgcDie = SubprogramDie.addChild(DW_TAG_formal_parameter); ArgcDie.addAttribute(DW_AT_name, DW_FORM_strp, "argc"); // ArgcDie.addAttribute(DW_AT_type, DW_FORM_ref4, IntDie); ArgcDie.addAttribute(DW_AT_type, DW_FORM_ref_addr, IntDie); StringRef FileBytes = DG.generate(); MemoryBufferRef FileBuffer(FileBytes, "dwarf"); auto Obj = object::ObjectFile::createObjectFile(FileBuffer); EXPECT_TRUE((bool)Obj); DWARFContextInMemory DwarfContext(*Obj.get()); This code is backed by the AsmPrinter code that emits DWARF for the actual compiler. While adding unit tests it was discovered that DIEValue that used DIEEntry as their values had bugs where DW_FORM_ref1, DW_FORM_ref2, DW_FORM_ref8, and DW_FORM_ref_udata forms were not supported. These are all now supported. Added support for DW_FORM_string so we can emit inlined C strings. Centralized the code to unique abbreviations into a new DIEAbbrevSet class and made both the dwarfgen::Generator and the llvm::DwarfFile classes use the new class. Fixed comments in the llvm::DIE class so that the Offset is known to be the compile/type unit offset. DIEInteger now supports more DW_FORM values. There are also unit tests that cover: Encoding and decoding all form types and values Encoding and decoding all reference types (DW_FORM_ref1, DW_FORM_ref2, DW_FORM_ref4, DW_FORM_ref8, DW_FORM_ref_udata, DW_FORM_ref_addr) including cross compile unit references with that go forward one compile unit and backward on compile unit. Differential Revision: https://reviews.llvm.org/D27326 llvm-svn: 289010
* CFI-icall on ThumbEvgeniy Stepanov2016-12-081-4/+14
| | | | | | | | | | | | Replace @progbits in the section directive with %progbits, because "@" starts a comment on arm/thumb. Use b.w branch instruction. Use .thumb_function and .thumb_set for proper arm/thumb interwork. This way jumptable entry addresses on thumb have bit 0 set (correctly). This does not affect CFI check math, because the address of the jumptable start also has that bit set. This does not work on thumbv5, because it does not support b.w, and the linker would not insert a veneer (trampoline?) to extend the range of b.n. We may need to do full-range plt-style jumptables on thumbv54, which are 12 bytes per entry. Another option is "push lr; bl; pop pc" (4 bytes) but that needs unwinding instructions, etc. Differential Revision: https://reviews.llvm.org/D27499 llvm-svn: 289008
* TargetPassConfig: Rename DisablePostRA -> DisablePostRASched; NFCMatthias Braun2016-12-081-3/+3
| | | | llvm-svn: 289003
* LivePhysReg: Use reference instead of pointer in init(); NFCMatthias Braun2016-12-087-11/+11
| | | | llvm-svn: 289002
* [InlineSpiller] Don't call TargetInstrInfo::foldMemoryOperand with an empty ↵Quentin Colombet2016-12-081-0/+5
| | | | | | | | list. Since r287792 if we try to do that we will hit an assert. llvm-svn: 289001
* [ADT, IR] Fix some Clang-tidy modernize-use-equals-delete and Include What ↵Eugene Zelenko2016-12-073-75/+151
| | | | | | You Use warnings; other minor fixes (NFC). llvm-svn: 288989
* [BDCE] Skip metadata while replacing uses.Davide Italiano2016-12-072-4/+13
| | | | | | | | | | | | The fix committed in r288851 doesn't cover all the cases. In particular, if we have an instruction with side effects which has a no non-dbg use not depending on the bits, we still perform RAUW destroying the dbg.value's first argument. Prevent metadata from being replaced here to avoid the issue. Differential Revision: https://reviews.llvm.org/D27534 llvm-svn: 288987
* GlobalISel: use correct builder for ConstantExprs.Tim Northover2016-12-071-32/+45
| | | | | | | | ConstantExpr instances were emitting code into the current block rather than the entry block. This meant they didn't necessarily dominate all uses, which is clearly wrong. llvm-svn: 288985
* [ObjectYAML] Pull DWARF support into DWARFYAML namespaceChris Bieneman2016-12-073-24/+48
| | | | | | | | Since DWARF formatting is agnostic to the object file it is stored in, it doesn't make sense for this to be in the MachOYAML implementation. Pulling it into its own namespace means we could modify the ELF and COFF YAML tools to emit DWARF as well. In a follow-up patch I will better abstract this in obj2yaml and yaml2obj so that the DWARF bits in the tools can be re-used too. llvm-svn: 288984
* GlobalISel: store the current MachineFunction as direct state. NFC.Tim Northover2016-12-071-45/+41
| | | | | | | Having to ask the MIRBuilder for the current function is a little awkward, and I'm intending to improve how that's threaded through anyway. llvm-svn: 288983
* [ObjectYAML] Rename DWARF entries to match section namesChris Bieneman2016-12-071-2/+2
| | | | | | This change makes the yaml tags for the members of the DWARF data match the names of the DWARF sections. llvm-svn: 288981
* GlobalISel: simplify MachineIRBuilder interface.Tim Northover2016-12-073-33/+27
| | | | | | | | | | | | MachineIRBuilder had weird before/after and beginning/end flags for the insert point. Unfortunately the non-default means that instructions will be inserted in reverse order which is almost never what anyone wants. Really, I think we just want (like IRBuilder has) the ability to insert at any C++ iterator-style point (i.e. before any instruction or before MBB.end()). So this fixes MIRBuilders to behave like IRBuilders in this respect. llvm-svn: 288980
* [libFuzzer] include FuzzerIO.h and hopefully fix the Mac build. reported by ↵Kostya Serebryany2016-12-071-0/+1
| | | | | | Dejan Mircevski llvm-svn: 288979
* InstCombine: Fold bitcast of vector to FP scalarMatt Arsenault2016-12-071-23/+25
| | | | llvm-svn: 288978
* [GVNHoist] Invalidate MemDep when an instruction is moved.Eli Friedman2016-12-071-0/+1
| | | | | | | | | | See also r279907. Fixes https://llvm.org/bugs/show_bug.cgi?id=30991 . Differential Revision: https://reviews.llvm.org/D27493 llvm-svn: 288968
* [X86] Skip over DEBUG_VALUE while looking for start of call sequenceMichael Kuperstein2016-12-071-3/+3
| | | | | | | | | | | If we don't skip over DEBUG_VALUEs, we get differences between -g and non-g code. This fixes PR31242. Differential Revision: https://reviews.llvm.org/D27485 llvm-svn: 288965
* [X86] Do not assume "ri" instructions always have an immediate operandMichael Kuperstein2016-12-072-3/+8
| | | | | | | | | | | The second operand of an "ri" instruction may be an immediate, but it may also be a globalvariable, so we should make any assumptions. This fixes PR31271. Differential Revision: https://reviews.llvm.org/D27481 llvm-svn: 288964
* Fix the apple build issue caused by r288956Chris Bieneman2016-12-071-1/+1
| | | | | | Should be checking if HAVE_CRASHREPORTERCLIENT_H is defined not relying on it having a value. llvm-svn: 288963
* [ObjectYAML] Support for DWARF __debug_abbrev sectionChris Bieneman2016-12-071-2/+17
| | | | | | This patch adds support for round-tripping DWARF debug abbreviations through the obj<->yaml tools. llvm-svn: 288955
* [SelectionDAG] Add knownbits support for vector demandedelts in ↵Simon Pilgrim2016-12-071-2/+4
| | | | | | SMAX/SMIN/UMAX/UMIN opcodes llvm-svn: 288926
* [X86][SSE] Remove AND -> VZEXT combineSimon Pilgrim2016-12-071-92/+0
| | | | | | | | | | This is now performed more generally by the target shuffle combine code. Already covered by tests that were originally added in D7666/rL229480 to support combineVectorZext (or VectorZextCombine as it was known then....). Differential Revision: https://reviews.llvm.org/D27510 llvm-svn: 288918
* [SelectionDAG] Add knownbits support for EXTRACT_VECTOR_ELT opcodesSimon Pilgrim2016-12-071-0/+36
| | | | llvm-svn: 288916
* [SelectionDAG] Removed old knownbits TODO comment. NFCI.Simon Pilgrim2016-12-071-3/+0
| | | | | | EXTRACT_VECTOR_ELT does support demanded elts if the element index is known and in range. llvm-svn: 288913
* [LV] Scalarize operands of predicated instructionsMatthew Simpson2016-12-071-7/+210
| | | | | | | | | | | | | | | | | | | | | | This patch attempts to scalarize the operand expressions of predicated instructions if they were conditionally executed in the original loop. After scalarization, the expressions will be sunk inside the blocks created for the predicated instructions. The transformation essentially performs un-if-conversion on the operands. The cost model has been updated to determine if scalarization is profitable. It compares the cost of a vectorized instruction, assuming it will be if-converted, to the cost of the scalarized instruction, assuming that the instructions corresponding to each vector lane will be sunk inside a predicated block, possibly avoiding execution. If it's more profitable to scalarize the entire expression tree feeding the predicated instruction, the expression will be scalarized; otherwise, it will be vectorized. We only consider the cost of the entire expression to accurately estimate the cost of the required insertelement and extractelement instructions. Differential Revision: https://reviews.llvm.org/D26083 llvm-svn: 288909
* Try unbreaking the MSVC build.Benjamin Kramer2016-12-071-1/+1
| | | | llvm-svn: 288907
* [AVR] Expand 'SELECT_CC' nodes whereever possibleDylan McKay2016-12-071-2/+2
| | | | llvm-svn: 288905
* [LowerTypeTests] Use the TrailingObjects infrastructure for trailing objects.Benjamin Kramer2016-12-071-6/+10
| | | | | | Also avoid allocating ~3x as much memory as needed. llvm-svn: 288904
* When GVN removes a redundant load, it should not modify the debug location ↵Andrea Di Biagio2016-12-071-1/+4
| | | | | | | | | | | | | | | of the dominating load. In the case of a fully redundant load LI dominated by an equivalent load V, GVN should always preserve the original debug location of V. Otherwise, we risk to introduce an incorrect stepping. If V has debug info, then clearly it should not be modified. If V has a null debugloc, then it is still potentially incorrect to propagate LI's debugloc because LI may not post-dominate V. Differential Revision: https://reviews.llvm.org/D27468 llvm-svn: 288903
* [X86][SSE] Consistently set MOVD/MOVQ load/store/move instructions to ↵Simon Pilgrim2016-12-072-67/+81
| | | | | | | | | | integer domain We are being inconsistent with these instructions (and all their variants.....) with a random mix of them using the default float domain. Differential Revision: https://reviews.llvm.org/D27419 llvm-svn: 288902
* [InlineFunction] Refactor code in function `fixupLineNumbers' as suggested ↵Andrea Di Biagio2016-12-071-16/+18
| | | | | | by David in D27462. NFC llvm-svn: 288901
* [mips][rtdyld] Merge code to write relocated values to the section. NFCSimon Dardis2016-12-072-126/+111
| | | | | | | | | | | | Preparation work for implementing N32 support. Patch By: Daniel Sanders Reviewers: vkalintiris, atanasyan Differential Revision: https://reviews.llvm.org/D27460 llvm-svn: 288900
* [X86][XOP] Fix VPERMIL2 non-constant pool shuffle decoding (PR31296)Simon Pilgrim2016-12-071-6/+8
| | | | | | | | The non-constant pool version of DecodeVPERMIL2PMask was not offsetting correctly for the second input. I've updated the code to match the implementation in the constant-pool version. Annoyingly this bug was hidden for so long as it's tricky to combine to useful variable shuffle masks that don't become constant-pool entries. llvm-svn: 288898
* [AVR] Allow loading from stack slots where src and dest registers are identicalDylan McKay2016-12-074-8/+48
| | | | | | Fixes PR 31256 llvm-svn: 288897
* [InlineFunction] Do not propagate the callsite debug location to ↵Andrea Di Biagio2016-12-071-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | instructions inlined from functions with debug info. When a function F is inlined, InlineFunction extends the debug location of every instruction inlined from F by adding an InlinedAt. However, if an instruction has a 'null' debug location, InlineFunction would propagate the callsite debug location to it. This behavior existed since revision 210459. Revision 210459 was originally committed specifically to workaround the lack of debug information for instructions inlined from intrinsic functions (which are usually declared with attributes `__always_inline__, __nodebug__`). The problem with revision 210459 is that it doesn't make any sort of distinction between instructions inlined from a 'nodebug' function and instructions which are inlined from a function built with debug info. This issue may lead to incorrect stepping in the debugger. This patch works under the assumption that a nodebug function does not have a DISubprogram. When a function F is inlined into another function G, InlineFunction checks if F has debug info associated with it. For nodebug functions, the InlineFunction logic is unchanged (i.e. it would still propagate the callsite debugloc to the inlined instructions). Otherwise, InlineFunction no longer propagates the callsite debug location. Differential Revision: https://reviews.llvm.org/D27462 llvm-svn: 288895
* Reintroduce a check accidentally removed in 288873 to fix clang botsPhilip Reames2016-12-071-4/+12
| | | | | | I believe this is the cause of the failure, but have not been able to confirm. Note that this is a speculative fix; I'm still waiting for a full build to finish as I synced and ended up doing a clean build which takes 20+ minutes on my machine. llvm-svn: 288886
* Fix a warning introduced in r288874Philip Reames2016-12-071-1/+0
| | | | llvm-svn: 288884
* AMDGPU : Add S_SETREG instructions to fix fdiv precision issues.Tom Stellard2016-12-078-12/+173
| | | | | | | | | | | | | | Patch By: Wei Ding Summary: This patch fixes the fdiv precision issues. Reviewers: b-sumner, cfang, wdng, arsenm Subscribers: kzhuravl, nhaehnle, yaxunl, tony-tye Differential Revision: https://reviews.llvm.org/D26424 llvm-svn: 288879
* [AArch64] Correct the check of signed 9-bit imm in isLegalAddressingMode()Haicheng Wu2016-12-071-1/+1
| | | | | | | | In the addressing mode, signed 9-bit imm is [-256, 255], not [-512, 511]. Differential Revision: https://reviews.llvm.org/D27480 llvm-svn: 288876
* [LCG] Add basic verification of the parent set and fix bugs it uncovers.Chandler Carruth2016-12-071-4/+23
| | | | | | The existing unittests actually cover this now that we verify things. llvm-svn: 288875
* [LVI] Remove used return value from markX functionsPhilip Reames2016-12-071-28/+26
| | | | llvm-svn: 288874
* [LVI] Simplify mergeIn codePhilip Reames2016-12-071-24/+20
| | | | | | Remove the unused return type, use early return, use assignment operator. llvm-svn: 288873
* [LVI] Simplify obfuscated codePhilip Reames2016-12-071-14/+0
| | | | | | It doesn't matter why something is overdefined if it is... llvm-svn: 288871
* IR: Reduce the amount of boilerplate required for a metadata kind. NFCI.Peter Collingbourne2016-12-061-107/+29
| | | | llvm-svn: 288867
* AMDGPU: Add llvm.amdgcn.interp.mov intrinsicTom Stellard2016-12-061-0/+6
| | | | | | | | | | Reviewers: arsenm, nhaehnle Subscribers: kzhuravl, wdng, yaxunl, tony-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D26725 llvm-svn: 288865
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