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* [X86][SSE] Add MULHS/MULHU custom lowering for i8 vectorsSimon Pilgrim2016-03-261-0/+124
| | | | | | | | Currently this is to mainly to prevent scalarization of integer division by constants. Differential Revision: http://reviews.llvm.org/D18307 llvm-svn: 264511
* [X86][AVX512BW] AVX512BW can sign-extend v32i8 to v32i16 for simpler v32i8 ↵Simon Pilgrim2016-03-261-2/+3
| | | | | | | | multiplies. Only pre-AVX512BW targets need to split v32i8 vectors. llvm-svn: 264509
* [PowerPC] Disable the CTR optimization in the presence of {min,max}numDavid Majnemer2016-03-261-0/+2
| | | | | | | | | The minnum and maxnum intrinsics get lowered to libcalls which invalidates the CTR optimization. This fixes PR27083. llvm-svn: 264508
* [X86][SSE] Don't duplicate Lower256IntArith functionality in LowerMul. NFC.Simon Pilgrim2016-03-261-13/+5
| | | | | | LowerMul v32i8 on AVX2 needs to split the 256-bit sources to allow sign-extension back to v16i16 to occur. Since this is basically the same as Lower256IntArith we simplify by using that here instead. llvm-svn: 264506
* Minor code cleanup. NFC.Junmo Park2016-03-261-1/+1
| | | | llvm-svn: 264505
* [Power9] Implement new altivec instructions: permute, count zero, extend ↵Chuang-Yu Cheng2016-03-263-0/+181
| | | | | | | | | | | | | | | | | | | | | sign, negate, parity, shift/rotate, mul10 This change implements the following vector operations: - vclzlsbb vctzlsbb vctzb vctzd vctzh vctzw - vextsb2w vextsh2w vextsb2d vextsh2d vextsw2d - vnegd vnegw - vprtybd vprtybq vprtybw - vbpermd vpermr - vrlwnm vrlwmi vrldnm vrldmi vslv vsrv - vmul10cuq vmul10uq vmul10ecuq vmul10euq 28 instructions Thanks Nemanja, Kit for invaluable hints and discussion! Reviewers: hal, nemanja, kbarton, tjablin, amehsan Phabricator: http://reviews.llvm.org/D15887 llvm-svn: 264504
* ThinLTO: use the callgraph from the combined index to drive the FunctionImporterMehdi Amini2016-03-262-257/+280
| | | | | | | | | | | | | | | | | | Summary: Now that the summary contains the full reference/call graph, we can replace the existing function importer that loads and inspect the IR to iteratively walk the call graph by a traversal based purely on the summary information. Decouple the actual importing decision from any IR manipulation. Reviewers: tejohnson Subscribers: llvm-commits, joker.eph Differential Revision: http://reviews.llvm.org/D18343 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 264503
* Rename ModuleSummaryIndex::modPathStringEntries() into modulePaths()Mehdi Amini2016-03-261-1/+1
| | | | | | | It now return the map instead of an iterator. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 264489
* [Support] Switch to RAII helper for error-as-out-parameter idiom.Lang Hames2016-03-251-2/+2
| | | | | | As discussed on the llvm-commits thread for r264467. llvm-svn: 264479
* Improve the reliability of file renaming in Windows by having the compiler retrySunil Srivastava2016-03-251-16/+33
| | | | | | | | | | | the rename operation on 3 error conditions of ReplaceFileW() that it was previously bailing out on. Patch by Douglas Yung! Differential Revision: http://reviews.llvm.org/D17903 llvm-svn: 264477
* [Object] Make createMachOObjectFile return Expected<...> rather thanLang Hames2016-03-253-12/+9
| | | | | | ErrorOr<...>. llvm-svn: 264473
* Allow value forwarding past release fences in GVNPhilip Reames2016-03-251-0/+9
| | | | | | | | | | | | | | A release fence acts as a publication barrier for stores within the current thread to become visible to other threads which might observe the release fence. It does not require the current thread to observe stores performed on other threads. As a result, we can allow store-load and load-load forwarding across a release fence. We choose to be much more conservative about stores. In theory, nothing prevents us from shifting a store from after a release fence to before it, and then eliminating the preceeding (previously fenced) store. Doing this without actually moving the second store is likely also legal, but we chose to be conservative at this time. The LangRef indicates only atomic loads and stores are effected by fences. This patch chooses to be far more conservative then that. This is the GVN companion to http://reviews.llvm.org/D11434 which applied the same logic in EarlyCSE and has been baking in tree for a while now. Differential Revision: http://reviews.llvm.org/D11436 llvm-svn: 264472
* [Object] Make MachOObjectFile's constructor private, provide a static createLang Hames2016-03-251-29/+26
| | | | | | | | | | method instead. This is not quite a named constructor: Construction may fail, and MachOObjectFiles are usually passed by unique_ptr anyway, so create returns an Expected<std::unique_ptr<MachOObjectFile>>. llvm-svn: 264469
* [X86] Emit a proper ADJCALLSTACKDOWN in EmitLoweredTLSAddrDavid Majnemer2016-03-251-1/+1
| | | | | | | | | We forgot to add the second machine operand to our ADJCALLSTACKDOWN, resulting in crashes in PEI. This fixes PR27071. llvm-svn: 264465
* [MachineCopyPropagation] Expose more dead copies across instructions with ↵Jun Bum Lim2016-03-251-3/+14
| | | | | | | | | | | regmasks When encountering instructions with regmasks, instead of cleaning up all the elements in MaybeDeadCopies map, remove only the instructions erased. By keeping more instruction in MaybeDeadCopies, this change will expose more dead copies across instructions with regmasks. llvm-svn: 264462
* Prevent construction of cycle in DAG store mergeNirav Dave2016-03-253-40/+44
| | | | | | | | | | | | | | | | | | | | | When merging stores in DAGCombiner, add check to ensure that no dependenices exist that would cause the construction of a cycle in our DAG. This may happen if one store has a data dependence on another instruction (e.g. a load) which itself has a (chain) dependence on another store being merged. These stores cannot be merged safely and doing so results in a cycle that is discovered in LegalizeDAG. This test is only done in cases where Antialias analysis is used (UseAA) as non-AA store merge candidates will be merged logically after all loads which have been checked to not alias. Reviewers: ahatanak, spatel, niravd, arsenm, hfinkel, tstellarAMD, jyknight Subscribers: llvm-commits, tberghammer, danalbert, srhines Differential Revision: http://reviews.llvm.org/D18336 llvm-svn: 264461
* [libFuzzer] use fflush after every PrintfKostya Serebryany2016-03-251-0/+1
| | | | llvm-svn: 264459
* Remove useless and unused CrashRecoveryContext::getBacktrace(). This ↵Richard Smith2016-03-251-8/+0
| | | | | | function always returned an empty string. llvm-svn: 264458
* [RS4GC] Lower calls to @llvm.experimental.deoptimizeSanjoy Das2016-03-252-10/+30
| | | | | | | | | | | | | | This changes RS4GC to lower calls to ``@llvm.experimental.deoptimize`` to gc.statepoints wrapping ``__llvm_deoptimize``, and changes ``callsGCLeafFunction`` to recognize ``@llvm.experimental.deoptimize`` as a non GC leaf function. I've had to hard code the ``"__llvm_deoptimize"`` name in RewriteStatepointsForGC; since ``TargetLibraryInfo`` is available only during codegen. This isn't without precedent in the codebase, so I'm not overtly concerned. llvm-svn: 264456
* CodeGen: Don't iterate over operands after we've erased an MIJustin Bogner2016-03-251-13/+20
| | | | | | | | | | | This fixes a use-after-free introduced 3 years ago, in r182872 ;) The code more or less worked because the memory that CopyMI was pointing to happened to still be valid, but lots of tests would crash if you ran under ASAN with the recycling allocator changes from llvm.org/PR26808 llvm-svn: 264455
* ARM: maintain BB ordering when expanding WIN__DBZCHKSaleem Abdulrasool2016-03-251-1/+1
| | | | | | | | | | | | | It is possible to have a fallthrough MBB prior to MBB placement. The original addition of the BB would result in reordering the BB as not preceding the successor. Because of the fallthrough nature of the BB, we could end up executing incorrect code or even a constant pool island! Insert the spliced BB into the same location to avoid that. Thanks to Tim Northover for invaluable hints and Fiora for the discussion on what may have been occurring! llvm-svn: 264454
* [ThinLTO] Rename edges() to calls() for clarity (NFC)Teresa Johnson2016-03-251-3/+3
| | | | | | Helps distinguish from refs() which iterates over non-call references. llvm-svn: 264445
* CodeGen: Fix a use-after-free in TIIJustin Bogner2016-03-251-2/+4
| | | | | | Found by ASAN with the recycling allocator changes from PR26808. llvm-svn: 264443
* AMDGPU: Fix a use-after free and a missing breakJustin Bogner2016-03-251-1/+2
| | | | | | | | | | | | | | | | We're erasing MI here, but then immediately using it again inside the `if`. This moves the erase after we're done using it. Doing that reveals a second problem though - this case is missing a break, so we fall through to the default and dereference MI again. This is obviously a bug, though I don't know how to write a test that triggers it - all we do in the error case is print some extra debug output. Both of these issue crash on lots of tests under ASAN with the recycling allocator changes from PR26808 applied. llvm-svn: 264442
* [X86] Use "and $0" and "orl $-1" to store 0 and -1 when optimizing for minsizeHans Wennborg2016-03-251-0/+12
| | | | | | | | | | | | 64-bit, 32-bit and 16-bit move-immediate instructions are 7, 6, and 5 bytes, respectively, whereas and/or with 8-bit immediate is only three bytes. Since these instructions imply an additional memory read (which the CPU could elide, but we don't think it does), restrict these patterns to minsize functions. Differential Revision: http://reviews.llvm.org/D18374 llvm-svn: 264440
* Consider regmasks when computing register-based DBG_VALUE live rangesReid Kleckner2016-03-252-33/+63
| | | | | | | | | | | | | | Now register parameters that aren't saved to the stack or CSRs are considered dead after the first call. Previously the debugger would show whatever was in the register. Fixes PR26589 Reviewers: aprantl Differential Revision: http://reviews.llvm.org/D17211 llvm-svn: 264429
* [Object] Start threading Error through MachOObjectFile construction.Lang Hames2016-03-252-92/+151
| | | | llvm-svn: 264425
* [SystemZ] Remove isBranch and isTerminator flags on BRCT and BRCTG.Jonas Paulsson2016-03-251-1/+1
| | | | | | | | The BranchUnaryRI instruction class already sets these flags. Reviewed by Ulrich Weigand. llvm-svn: 264411
* Revert "Bitcode: Collect all MDString records into a single blob"Duncan P. N. Exon Smith2016-03-256-135/+34
| | | | | | | This reverts commit r264409 since it failed to bootstrap: http://lab.llvm.org:8080/green/job/clang-stage2-configure-Rlto_build/8302/ llvm-svn: 264410
* Bitcode: Collect all MDString records into a single blobDuncan P. N. Exon Smith2016-03-256-34/+135
| | | | | | | | | | | | | | | | | | | | | | | Optimize output of MDStrings in bitcode. This emits them in big blocks (currently 1024) in a pair of records: - BULK_STRING_SIZES: the sizes of the strings in the block, and - BULK_STRING_DATA: a single blob, which is the concatenation of all the strings. Inspired by Mehdi's similar patch, http://reviews.llvm.org/D18342, this should (a) slightly reduce bitcode size, since there is less record overhead, and (b) greatly improve reading speed, since blobs are super cheap to deserialize. I needed to add support for blobs to streaming input to get the test suite passing. - StreamingMemoryObject::getPointer reads ahead and returns the address of the blob. - To avoid a possible reallocation of StreamingMemoryObject::Bytes, BitstreamCursor::readRecord needs to move the call to JumpToEnd forward so that getPointer is the last bitstream operation. llvm-svn: 264409
* [AArch64] Fix typo. NFC.Chad Rosier2016-03-251-2/+1
| | | | llvm-svn: 264408
* Enable non-power-of-2 #pragma unroll counts.David L Kreitzer2016-03-252-26/+35
| | | | | | | | Patch by Evgeny Stupachenko. Differential Revision: http://reviews.llvm.org/D18202 llvm-svn: 264407
* [X86][SSE] Don't duplicate Lower256IntArith functionality in LowerShift. NFC.Simon Pilgrim2016-03-251-20/+2
| | | | | | LowerShift was using the same code as Lower256IntArith to split 256-bit vectors into 2 x 128-bit vectors, so now we just call Lower256IntArith. llvm-svn: 264403
* fixed typoElena Demikhovsky2016-03-251-1/+1
| | | | llvm-svn: 264395
* Add lastAccessedTime to file_statusMehdi Amini2016-03-252-10/+31
| | | | | | | | | Differential Revision: http://reviews.llvm.org/D18456 This is a re-commit of r264387 and r264388 after fixing a typo. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 264392
* Revert "Add lastAccessedTime to file_status"Mehdi Amini2016-03-252-31/+10
| | | | | | | | This reverts commit r264387. Bots are broken in various ways, I need to take one commit at a time... From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 264390
* Revert "Fix windows build for sys::fs:file_status Access Time added in r264387"Mehdi Amini2016-03-251-2/+2
| | | | | | | | This reverts commit r264388. Bots are broken in various ways, I need to take one commit at a time... From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 264389
* Fix windows build for sys::fs:file_status Access Time added in r264387Mehdi Amini2016-03-251-2/+2
| | | | | From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 264388
* Add lastAccessedTime to file_statusMehdi Amini2016-03-252-10/+31
| | | | | | | | | | | Reviewers: silvas Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D18456 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 264387
* Query the StringMap only once when creating MDString (NFC)Mehdi Amini2016-03-251-11/+6
| | | | | | | | | | | | | | | | Summary: Loading IR with debug info improves MDString::get() from 19ms to 10ms. This is a rework of D16597 with adding an "emplace" method on the StringMap to avoid requiring the MDString move ctor to be public. Reviewers: dexonsmith Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D17920 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 264386
* Adjust initial size in StringMap constructor to guarantee no grow()Mehdi Amini2016-03-251-1/+15
| | | | | | | | | | | | | | | | | | Summary: StringMap ctor accepts an initialize size, but expect it to be rounded to the next power of 2. The ctor can handle that directly instead of expecting clients to round it. Also, since the map will resize itself when 75% full, take this into account an initialize a larger initial size to avoid any growth. Reviewers: dblaikie Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D18344 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 264385
* Add GUID/getGlobalIdentifier() non-static API to global valueMehdi Amini2016-03-251-0/+5
| | | | | | | | | | | | | | | Summary: These are just helpers calling their static counter part to simplify client code. Reviewers: tejohnson Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D18339 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 264382
* Bitcode: Use std::stable_partition for reproducible buildsDuncan P. N. Exon Smith2016-03-251-2/+2
| | | | | | | Caught by inspection while working on partitioning metadata. It's nice to produce the same bitcode if you run the compiler twice. llvm-svn: 264381
* Bitcode: Stop using MODULE_CODE_METADATA_VALUESDuncan P. N. Exon Smith2016-03-252-67/+2
| | | | | | | | | | | | | | | | | | | | | | | | | The motivation for MODULE_CODE_METADATA_VALUES was to enable an -flto=thin scheme where: 1. First, one function is cherry-picked from a bitcode file. 2. Later, another function is cherry-picked. 3. Later, ... 4. Finally, the metadata needed by all the previous functions is loaded. This was abandoned in favour of: 1. Calculate the superset of functions needed from a Module. 2. Link all functions at once. Delayed metadata reading no longer serves a purpose. It also adds a few complication, since we can't count on metadata being properly parsed when exiting the BitcodeReader. After discussing with Teresa, we agreed to remove it. The code that depended on this was removed/updated in r264326. llvm-svn: 264378
* AMDGPU: Cost model for basic integer operationsMatt Arsenault2016-03-251-0/+31
| | | | | | | This resolves bug 21148 by preventing promotion to i64 induction variables. llvm-svn: 264376
* X86: Use push-pop for materializing 8-bit immediates for minsize (take 2)Hans Wennborg2016-03-257-4/+93
| | | | | | | | | This is the same as r255936, with added logic for avoiding clobbering of the red zone (PR26023). Differential Revision: http://reviews.llvm.org/D18246 llvm-svn: 264375
* AMDGPU: Partially implement getArithmeticInstrCost for FP opsMatt Arsenault2016-03-252-1/+94
| | | | llvm-svn: 264374
* IR: Stop upgrading !llvm.loop attachments via MDStringDuncan P. N. Exon Smith2016-03-253-10/+73
| | | | | | | | | | | | Remove logic to upgrade !llvm.loop by changing the MDString tag directly. This old logic would check (and change) arbitrary strings that had nothing to do with loop metadata. Instead, check !llvm.loop attachments directly, and change which strings get attached. Rather than updating the assembly-based upgrade, drop it entirely. It has been quite a while since we supported upgrading textual IR. llvm-svn: 264373
* IR: Reserve an MDKind for !llvm.loop; NFCDuncan P. N. Exon Smith2016-03-253-8/+11
| | | | | | | | | | This reserves an MDKind for !llvm.loop, which allows callers to avoid a string-based lookup. I'm not sure why it was missing. There should be no functionality change here, just a small compile-time speedup. llvm-svn: 264371
* ARM: fix optimised division on WoASaleem Abdulrasool2016-03-251-0/+1
| | | | | | | | | We did not have an explicit branch to the continuation BB. When the check was hoisted, this could permit control follow to fall through into the division trap. Add the explicit branch to the continuation basic block to ensure that code execution is correct. llvm-svn: 264370
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