Commit message (Collapse) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | ARM parsing/encoding for VCMP/VCMPE. | Jim Grosbach | 2011-10-03 | 1 | -0/+11 |
| | | | | llvm-svn: 141038 | ||||
* | Fix typo in comments. | Nick Lewycky | 2011-10-03 | 1 | -2/+2 |
| | | | | llvm-svn: 141032 | ||||
* | Check-pointing the new SjLj EH lowering. | Bill Wendling | 2011-10-03 | 2 | -0/+77 |
| | | | | | | | | | | | This code will replace the version in ARMAsmPrinter.cpp. It creates a new machine basic block, which is the dispatch for the return from a longjmp call. It then shoves the address of that machine basic block into the correct place in the function context so that the EH runtime will jump to it directly instead of having to go through a compare-and-jump-to-the-dispatch bit. This should be more efficient in the common case. llvm-svn: 141031 | ||||
* | Add support for 64-bit logical NOR. | Akira Hatanaka | 2011-10-03 | 1 | -0/+7 |
| | | | | llvm-svn: 141029 | ||||
* | Add support for 64-bit count leading ones and zeros instructions. | Akira Hatanaka | 2011-10-03 | 1 | -0/+15 |
| | | | | llvm-svn: 141028 | ||||
* | Move the grabbing of the jump buffer into the caller function, eliminating ↵ | Bill Wendling | 2011-10-03 | 1 | -31/+33 |
| | | | | | | the need for returning a std::pair. llvm-svn: 141026 | ||||
* | ARM assembly parsing and encoding for VMRS/FMSTAT. | Jim Grosbach | 2011-10-03 | 3 | -0/+18 |
| | | | | llvm-svn: 141025 | ||||
* | Add support for 64-bit divide instructions. | Akira Hatanaka | 2011-10-03 | 3 | -3/+17 |
| | | | | llvm-svn: 141024 | ||||
* | Add C api for Instruction->eraseFromParent(). | Devang Patel | 2011-10-03 | 1 | -0/+4 |
| | | | | llvm-svn: 141023 | ||||
* | Thumb2 ADD/SUB can take SP as a destination register. | Jim Grosbach | 2011-10-03 | 1 | -18/+18 |
| | | | | | | | It's documented as a separate instruction to line up with the Thumb1 encodings, for which it really is a distinct instruction encoding. llvm-svn: 141020 | ||||
* | Clean up MipsInstrInfo::copyPhysReg and handle copies from and to 64-bit integer | Akira Hatanaka | 2011-10-03 | 1 | -51/+44 |
| | | | | | | registers. llvm-svn: 141019 | ||||
* | Add support for 64-bit integer multiply instructions. | Akira Hatanaka | 2011-10-03 | 2 | -4/+26 |
| | | | | llvm-svn: 141017 | ||||
* | Add definitions of instructions which move values between 64-bit integer | Akira Hatanaka | 2011-10-03 | 2 | -0/+27 |
| | | | | | | | registers and 64-bit HI and LO registers. Fix encoding of the 32-bit versions of the instructions. llvm-svn: 141015 | ||||
* | Add support for MOVBE and RDRAND instructions for the assembler and ↵ | Craig Topper | 2011-10-03 | 5 | -1/+48 |
| | | | | | | disassembler. Includes feature flag checking, but no instrinsic support. Fixes PR10832, PR11026 and PR11027. llvm-svn: 141007 | ||||
* | Whitespace. | Eric Christopher | 2011-10-03 | 1 | -1/+1 |
| | | | | llvm-svn: 141005 | ||||
* | Typo. | Eric Christopher | 2011-10-03 | 1 | -1/+1 |
| | | | | llvm-svn: 141004 | ||||
* | Add the returns_twice attribute to LLVM. | Rafael Espindola | 2011-10-03 | 5 | -4/+6 |
| | | | | llvm-svn: 141001 | ||||
* | Treat VEX.vvvv as a 3-bit field outside of 64-bit mode. Prevents access to ↵ | Craig Topper | 2011-10-03 | 1 | -0/+3 |
| | | | | | | registers xmm8-xmm15 outside 64-bit mode. llvm-svn: 140997 | ||||
* | Fix VEX disassembling to ignore REX.RXBW bits in 32-bit mode. | Craig Topper | 2011-10-03 | 1 | -9/+13 |
| | | | | llvm-svn: 140993 | ||||
* | Reapply r140979 with fix! We never did get a testcase, but careful review of the | Nick Lewycky | 2011-10-03 | 1 | -4/+15 |
| | | | | | | logic by David Meyer revealed this bug. llvm-svn: 140992 | ||||
* | Revert r140979 due to reports of bootstrap failure. | Nick Lewycky | 2011-10-03 | 1 | -8/+4 |
| | | | | llvm-svn: 140980 | ||||
* | Add one more case we compute a max trip count. | Nick Lewycky | 2011-10-03 | 1 | -4/+8 |
| | | | | llvm-svn: 140979 | ||||
* | Fix some Intel syntax disassembly issues with instructions that implicitly ↵ | Craig Topper | 2011-10-02 | 2 | -32/+47 |
| | | | | | | use AL/AX/EAX/RAX such as ADD/SUB/ADC/SUBB/XOR/OR/AND/CMP/MOV/TEST. llvm-svn: 140974 | ||||
* | Special case disassembler handling of REX.B prefix on NOP instruction to ↵ | Craig Topper | 2011-10-02 | 1 | -2/+39 |
| | | | | | | decode as XCHG R8D, EAX instead. Fixes PR10344. llvm-svn: 140971 | ||||
* | Add a new icmp+select optz'n. Also shows off the load(cst) folding added in | Nick Lewycky | 2011-10-02 | 1 | -0/+6 |
| | | | | | | r140966. llvm-svn: 140969 | ||||
* | Enhance a couple places where we were doing constant folding of instructions, | Nick Lewycky | 2011-10-02 | 2 | -7/+8 |
| | | | | | | but not load instructions. Noticed by inspection. llvm-svn: 140966 | ||||
* | Fix disassembling of INVEPT and INVVPID to take operands | Craig Topper | 2011-10-01 | 1 | -2/+8 |
| | | | | llvm-svn: 140955 | ||||
* | Fix disassembler handling of CRC32 which is an odd instruction that uses ↵ | Craig Topper | 2011-10-01 | 1 | -0/+3 |
| | | | | | | 0xf2 as an opcode extension and allows the opsize prefix. This necessitated adding IC_XD_OPSIZE and IC_64BIT_XD_OPSIZE contexts. Unfortunately, this increases the size of the disassembler tables. Fixes PR10702. llvm-svn: 140954 | ||||
* | Revert r140924 "Attempt to fix dynamic stack realignment for thumb1 functions." | Chad Rosier | 2011-10-01 | 3 | -27/+7 |
| | | | | | | to appease nightly testers. Not quite there yet. llvm-svn: 140953 | ||||
* | Moved type construction out of the loop and added an assert on the legality ↵ | Nadav Rotem | 2011-10-01 | 1 | -10/+10 |
| | | | | | | of the type. Formatted lines to the 80 char limit. llvm-svn: 140952 | ||||
* | Move TableGen's parser and entry point into a library | Peter Collingbourne | 2011-10-01 | 11 | -1/+5077 |
| | | | | | | This is the first step towards splitting LLVM and Clang's tblgen executables. llvm-svn: 140951 | ||||
* | No one should be using the method directly. Assert if they do. | Bill Wendling | 2011-10-01 | 1 | -12/+1 |
| | | | | llvm-svn: 140947 | ||||
* | Add a convenience method to tell if two things are equal. | Bill Wendling | 2011-10-01 | 2 | -16/+10 |
| | | | | llvm-svn: 140946 | ||||
* | Use the ARMConstantPoolMBB class to handle the MBB values. | Bill Wendling | 2011-10-01 | 4 | -36/+13 |
| | | | | llvm-svn: 140943 | ||||
* | Add ARMConstantPoolMBB to hold an MBB value in the constant pool. | Bill Wendling | 2011-10-01 | 2 | -1/+90 |
| | | | | llvm-svn: 140942 | ||||
* | Remove dead code. | Bill Wendling | 2011-10-01 | 2 | -14/+0 |
| | | | | llvm-svn: 140941 | ||||
* | Remove now dead methods and ivar. | Bill Wendling | 2011-10-01 | 2 | -34/+12 |
| | | | | llvm-svn: 140940 | ||||
* | Use the new ARMConstantPoolSymbol class to handle external symbols. | Bill Wendling | 2011-10-01 | 6 | -14/+27 |
| | | | | llvm-svn: 140939 | ||||
* | Add an ARMConstantPool class for external symbols. This will split out the ↵ | Bill Wendling | 2011-10-01 | 2 | -5/+118 |
| | | | | | | support for external symbols from the base class. llvm-svn: 140938 | ||||
* | Remove now dead methods and ivar from ARMConstantPoolValue. | Bill Wendling | 2011-10-01 | 2 | -38/+3 |
| | | | | llvm-svn: 140937 | ||||
* | Switch over to using ARMConstantPoolConstant for global variables, functions, | Bill Wendling | 2011-10-01 | 6 | -34/+39 |
| | | | | | | and block addresses. llvm-svn: 140936 | ||||
* | Some more refactoring. | Bill Wendling | 2011-10-01 | 2 | -6/+78 |
| | | | | | | | | * Add a couple of Create methods to the ARMConstantPoolConstant class, * Add its own version of getExistingMachineCPValue, and * Modify hasSameValue to return false if the object isn't an ARMConstantPoolConstant. llvm-svn: 140935 | ||||
* | Add a Create method that accepts 'kind' and 'pcadj' arguments. | Bill Wendling | 2011-10-01 | 2 | -0/+10 |
| | | | | llvm-svn: 140934 | ||||
* | Refactoring: Separate out the ARM constant pool Constant from the ARM constant | Bill Wendling | 2011-10-01 | 2 | -6/+94 |
| | | | | | | | | pool value. It's not used right now, but will be soon. llvm-svn: 140933 | ||||
* | Attempt to fix dynamic stack realignment for thumb1 functions. It is in fact | Chad Rosier | 2011-10-01 | 3 | -7/+27 |
| | | | | | | | | useful if an optimization assumes the stack has been realigned. Credit to Eli for his assistance. rdar://10043857 llvm-svn: 140924 | ||||
* | Inlining and unrolling heuristics should be aware of free truncs. | Andrew Trick | 2011-10-01 | 4 | -15/+31 |
| | | | | | | | | | | We want heuristics to be based on accurate data, but more importantly we don't want llvm to behave randomly. A benign trunc inserted by an upstream pass should not cause a wild swings in optimization level. See PR11034. It's a general problem with threshold-based heuristics, but we can make it less bad. llvm-svn: 140919 | ||||
* | whitespace | Andrew Trick | 2011-10-01 | 3 | -64/+64 |
| | | | | llvm-svn: 140916 | ||||
* | Add Windows x64 stack walking support. Patch by Aaron Ballman! | Michael J. Spencer | 2011-10-01 | 1 | -32/+190 |
| | | | | llvm-svn: 140906 | ||||
* | When inferring the pointer alignment, if the global doesn't have an initializer | Bill Wendling | 2011-09-30 | 1 | -0/+2 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | and the alignment is 0 (i.e., it's defined globally in one file and declared in another file) it could get an alignment which is larger than the ABI allows for that type, resulting in aligned moves being used for unaligned loads. For instance, in file A.c: struct S s; In file B.c: struct { // something long }; extern S s; void foo() { struct S p = s; // ... } this copy is a 'memcpy' which is turned into a series of 'movaps' instructions on X86. But this is wrong, because 'struct S' has alignment of 4, not 16. llvm-svn: 140902 | ||||
* | Promote comment to doxycomment. Adjust whitespace. No functionality change. | Nick Lewycky | 2011-09-30 | 1 | -4/+3 |
| | | | | llvm-svn: 140899 |