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* [X86] Add patterns for 256-bit non-temporal stores when only AVX1 is ↵Craig Topper2016-05-081-6/+20
| | | | | | supported. While there, add a predicate to the SSE2 patterns to avoid an ordering dependency. llvm-svn: 268872
* [X86] No need to avoid selecting AVX_SET0 for 256-bit integer types when ↵Craig Topper2016-05-081-23/+1
| | | | | | only AVX1 is supported. AVX_SET0 just expands to 256-bit VXORPS which is legal in AVX1. llvm-svn: 268871
* [ARM] Fix Scavenger assert due to underestimated stack sizeWeiming Zhao2016-05-081-5/+25
| | | | | | | | | | | | | | | | (re-apply r268810 as it exposed an uninitialized variable in ARM MFI. Patch 268868 should fix that.) Summary: Currently, when checking if a stack is "BigStack" or not, it doesn't count into spills and arguments. Therefore, LLVM won't reserve spill slot for this actually "BigStack". This may cause scavenger failure. Reviewers: rengolin Subscribers: vitalybuka, aemerson, rengolin, tberghammer, danalbert, srhines, llvm-commits Differential Revision: http://reviews.llvm.org/D19896 llvm-svn: 268869
* Fix use-of-uninitialized-value of ARMMachineFunctionInfoWeiming Zhao2016-05-081-1/+1
| | | | | | | | | | | | Summary: Explicitly initialize ArgumentStackSize to prevent the msan failure. Reviewers: rengolin Subscribers: aemerson, rengolin, llvm-commits Differential Revision: http://reviews.llvm.org/D20051 llvm-svn: 268868
* Fix unused variable warning.Simon Pilgrim2016-05-071-1/+0
| | | | llvm-svn: 268867
* [SelectionDAG] Added bitreverse(bitreverse(v)) --> vSimon Pilgrim2016-05-072-0/+18
| | | | | | Added bitreverse creation testing llvm-svn: 268865
* [X86] Fix InstAliases to not allow FARCALL32i/FARCALL16i/FARJMP32i/FARJMP16i ↵Craig Topper2016-05-071-8/+8
| | | | | | in 64-bit mode. llvm-svn: 268863
* [X86] Pulled out duplicate mask width calculation. NFCI.Simon Pilgrim2016-05-071-2/+3
| | | | llvm-svn: 268861
* [x86, BMI] add TLI hook for 'andn' and use it to simplify comparisonsSanjay Patel2016-05-073-0/+63
| | | | | | | | | | | | | | | | | | | | | For the sake of minimalism, this patch is x86 only, but I think that at least PPC, ARM, AArch64, and Sparc probably want to do this too. We might want to generalize the hook and pattern recognition for a target like PPC that has a full assortment of negated logic ops (orc, nand). Note that http://reviews.llvm.org/D18842 will cause this transform to trigger more often. For reference, this relates to: https://llvm.org/bugs/show_bug.cgi?id=27105 https://llvm.org/bugs/show_bug.cgi?id=27202 https://llvm.org/bugs/show_bug.cgi?id=27203 https://llvm.org/bugs/show_bug.cgi?id=27328 Differential Revision: http://reviews.llvm.org/D19087 llvm-svn: 268858
* [PM] code refactoring -- preparation for new PM porting /NFCXinliang David Li2016-05-073-19/+34
| | | | llvm-svn: 268851
* Fix stripDebugInfo: was modifying "DebugLoc" attached to the intrinsic after ↵Mehdi Amini2016-05-071-0/+1
| | | | | | | | | deleting it. Fix MSAN build. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 268849
* MipsELFObjectWriter.cpp: Activate debug printer just for +Asserts. ↵NAKAMURA Takumi2016-05-071-0/+2
| | | | | | [-Wunused-function] llvm-svn: 268848
* Refactor stripDebugInfo(Function) to handle intrinsicMehdi Amini2016-05-071-21/+14
| | | | | | | | | | | | | | This moves the code that handles stripping debug info intrinsic from StripDebugInfo(Module) to StripDebugInfo(Function). The latter is already walking every instructions so it makes sense to do it at the same time. This makes also stripDebugInfo(Function) as an API more useful: it is really dropping every debug info in the Function. Finally the existing code is trigerring an assertion when the Module is not fully materialized. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 268847
* [Orc] Rename OrcArchitectureSupport to OrcABISupport and add Win32 ABI support.Lang Hames2016-05-073-81/+171
| | | | | | | | This enables lazy JITing on Windows x86-64. Patch by David. Thanks David! llvm-svn: 268845
* Revert r268832 "Refactor stripDebugInfo(Function) to handle intrinsic"Vitaly Buka2016-05-071-13/+21
| | | | | | It breaks many bots llvm-svn: 268837
* [ValueTracking] Hoist some computation out of a loop; NFCSanjoy Das2016-05-071-20/+11
| | | | | | There is no need to match the comparison instruction repeatedly. llvm-svn: 268836
* Clean up comment; NFCSanjoy Das2016-05-071-1/+1
| | | | llvm-svn: 268835
* Delete trailing whitespace; NFCSanjoy Das2016-05-071-8/+8
| | | | llvm-svn: 268834
* Revert r268810 becase it brakes msan bot.Vitaly Buka2016-05-071-25/+5
| | | | | | | 16802==WARNING: MemorySanitizer: use-of-uninitialized-value lib/Target/ARM/ARMFrameLowering.cpp:1632 llvm-svn: 268833
* Refactor stripDebugInfo(Function) to handle intrinsicMehdi Amini2016-05-071-21/+13
| | | | | | | | | | | | | | This moves the code that handles stripping debug info intrinsic from StripDebugInfo(Module) to StripDebugInfo(Function). The latter is already walking every instructions so it makes sense to do it at the same time. This makes also stripDebugInfo(Function) as an API more useful: it is really dropping every debug info in the Function. Finally the existing code is trigerring an assertion when the Module is not fully materialized. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 268832
* [X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.Ahmed Bougacha2016-05-071-0/+50
| | | | | | | | | | | | | | | | | | | | | | | | | This re-applies r268760, reverted in r268794. Fixes http://llvm.org/PR27670 The original imp-defs assertion was way overzealous: forward all implicit operands, except imp-defs of the new super-reg def (r268787 for GR64, but also possible for GR16->GR32), or imp-uses of the new super-reg use. While there, mark the source use as Undef, and add an imp-use of the old source reg: that should cover any case of dead super-regs. At the stage the pass runs, flags are unlikely to matter anyway; still, let's be as correct as possible. Also add MIR tests for the various interesting cases. Original commit message: Codesize is less (16) or equal (8), and we avoid partial dependencies. Differential Revision: http://reviews.llvm.org/D19999 llvm-svn: 268831
* [X86] Register and initialize the FixupBW pass.Ahmed Bougacha2016-05-073-8/+19
| | | | | | That lets us use it in MIR tests. llvm-svn: 268830
* [libFuzzer] enhance -rss_limit_mb and enable by default. Now it will print ↵Kostya Serebryany2016-05-068-15/+82
| | | | | | the OOM reproducer. llvm-svn: 268821
* [PGO] Use rsplit to parse value-data line in text profile file.Rong Xu2016-05-061-1/+1
| | | | | | | | | The value-data line is <PGOFuncName>:<Count_Value>. PGOFuncName might contain ':' for the internal linkage functions. We therefore need to use rsplit, rather split, to extract the data from the line. This fixes the error when merging a text profile file to an indexed profile file. llvm-svn: 268818
* Implement a safer bitcode upgrade for DISubprogram.Adrian Prantl2016-05-062-6/+9
| | | | | | | | | | | | | | | | | | The bitcode upgrade I added for DISubprogram in r266446 was based on the assumption that the CU node for the subprogram was already materialized by the time the DISubprogram is visited. This assumption may not hold true as future versions of LLVM may decide to write out bitcode in a different order. This patch corrects this by introducing a versioning bit next to the distinct flag to unambiguously differentiate the new from the old record layouts. Note for people stabilizing LLVM out-of-tree: This patch introduces a bitcode incompatibility with llvm trunk revisions from r266446 — this commit. (But D19987 will ensure that it degrades gracefully). http://reviews.llvm.org/D20004 rdar://problem/26074194 llvm-svn: 268816
* DetectDeadLanes: Increase precision when detecting undef inputsMatthias Braun2016-05-061-53/+121
| | | | | | | | | | | | | In case of COPY-like instruction we may be able to deduce that a certain input is unused, based on the used lanes of the register defined by the instruction. This even works accross otherwise incompatible copies (no need to have compatible lanemasks, completely unused operands are still completely unused). It even makes sense to redo the analysis in this case since we gained information for a case we previously stopped at because of the incompatible masks. llvm-svn: 268815
* DetectDeadLanes: Cleanup, assert on some impossible cases.Matthias Braun2016-05-061-9/+8
| | | | llvm-svn: 268814
* Drop error when trying to fallback from PDB to DWARF.Zachary Turner2016-05-061-0/+4
| | | | llvm-svn: 268813
* [ARM] Fix Scavenger assert due to underestimated stack sizeWeiming Zhao2016-05-061-5/+25
| | | | | | | | | | | | | | | | | | | (this is resubmit of r268529 with minor refactoring. r268529 was reverted at r268536 due a memory sanitizer failure. I have not been able to reproduce that failure and I checked all the variable used in my change but I could not spot an issue. I did some refactoring and see if it will give a clearer hint) Summary: Currently, when checking if a stack is "BigStack" or not, it doesn't count into spills and arguments. Therefore, LLVM won't reserve spill slot for this actually "BigStack". This may cause scavenger failure. Reviewers: rengolin Subscribers: vitalybuka, aemerson, rengolin, tberghammer, danalbert, srhines, llvm-commits Differential Revision: http://reviews.llvm.org/D19896 llvm-svn: 268810
* Reapply 267210 with fix for PR27490Philip Reames2016-05-061-8/+10
| | | | | | | | | | | Original Commit Message Extend load/store type canonicalization to handle unordered operations Extend the type canonicalization logic to work for unordered atomic loads and stores. Note that while this change itself is fairly simple and low risk, there's a reasonable chance this will expose problems in the backends by suddenly generating IR they wouldn't have seen before. Anything of this nature will be an existing bug in the backend (you could write an atomic float load), but this will definitely change the frequency with which such cases are encountered. If you see problems, feel free to revert this change, but please make sure you collect a test case. Note that the concern about lowering is now much less likely. PR27490 proved that we already *were* mucking with the types of ordered atomics and volatiles. As a result, this change doesn't introduce as much new behavior as originally thought. llvm-svn: 268809
* Make llvm-pdbdump print CV type recordsZachary Turner2016-05-062-1/+7
| | | | | | | | | | This reuses the CVTypeDumper from libcodeview to dump full information about type records within a PDB file. Differential Revision: http://reviews.llvm.org/D20022 Reviewed By: rnk llvm-svn: 268808
* [libFuzzer] add exeprimental -rss_limit_mb flag to fight against OOMsKostya Serebryany2016-05-064-0/+31
| | | | llvm-svn: 268807
* LiveIntervalAnalysis: Fix handleMove() extending liverange for undef inputsMatthias Braun2016-05-061-3/+6
| | | | | | | Fix handleMove() incorrectly extending liveranges when an undef input of a vreg was moved past the (current) end of the liverange. llvm-svn: 268805
* [GVN] PRE of unordered loadsPhilip Reames2016-05-061-8/+4
| | | | | | Again, fairly simple. Only change is ensuring that we actually copy the property of the load correctly. The aliasing legality constraints were already handled by the FRE patches. There's nothing special about unorder atomics from the perspective of the PRE algorithm itself. llvm-svn: 268804
* Revert "[X86] Add a new LOW32_ADDR_ACCESS_RBP register class."Quentin Colombet2016-05-062-14/+1
| | | | | | | | This reverts commit r268796. I believe it breaks test/CodeGen/X86/asm-mismatched-types.ll with: Cannot emit physreg copy instruction llvm-svn: 268799
* [X86] Add a new LOW32_ADDR_ACCESS_RBP register class.Quentin Colombet2016-05-062-1/+14
| | | | | | | | ABIs like NaCl uses 32-bit addresses but have 64-bit frame. The new register class reflects those constraints when choosing a register class for a address access. llvm-svn: 268796
* [X86] Rename the X32_ADDR_ACCESS register class into LOW32_ADDR_ACCESS.Quentin Colombet2016-05-062-8/+12
| | | | | | | | This register class may be used by any ABIs that uses x86_64 ISA while using 32-bit addresses, not just in X32 cases. Make sure the name reflects that. llvm-svn: 268795
* Revert r268760, it caused PR27670.Nico Weber2016-05-061-53/+0
| | | | llvm-svn: 268794
* Add missing include.Zachary Turner2016-05-061-0/+1
| | | | llvm-svn: 268792
* Port DebugInfoPDB over to using llvm::Error.Zachary Turner2016-05-0617-224/+475
| | | | | | | Differential Revision: http://reviews.llvm.org/D19940 Reviewed By: rnk llvm-svn: 268791
* [RS4GC] Fix typo in commentSanjoy Das2016-05-061-1/+1
| | | | llvm-svn: 268790
* Change GenericBinaryError to no longer include a FileName, which is then notKevin Enderby2016-05-062-32/+30
| | | | | | | | | | | | | | | | | | part of the error message. As the caller is the one that needs to add the name of where the "object file" comes from to the error message as the object file could be in an archive, or coming from a slice of a Mach-O universal file or a buffer created by a JIT. In the cases of a Mach-O universal file the architecture name may or may not also need to be printed which is up to the tool code. For example if the tool code is only selecting the host architecture slice then that architecture name is never printed. This patch is the change to the libObject code and there will be follow on commits for changes to the code for each tool. llvm-svn: 268789
* [X86] Accept imp-defs of GR64 super-registers in FixupBW MOVrr.Ahmed Bougacha2016-05-061-5/+11
| | | | | | Testcase will follow shortly. llvm-svn: 268787
* [MSan] [X86] Fix vararg helper for fixed arguments in overflow area.Marcin Koscielnicki2016-05-061-0/+11
| | | | | | | | This fixes http://llvm.org/PR27646 on x86_64. Differential Revision: http://reviews.llvm.org/D19997 llvm-svn: 268783
* [AMDGPU][llvm-mc] Some refactoring of .td filesArtem Tamazov2016-05-062-27/+27
| | | | | | | | | Some custom Operands and AsmOperandClasses moved to proper place. No functional changes. Differential Revision: http://reviews.llvm.org/D20012 llvm-svn: 268780
* Refactor the Verifier so it can diagnose IR validation errors and debugAdrian Prantl2016-05-061-159/+195
| | | | | | | | | | | | | | | | | | | | | | | info metadata errors separately. (NFC) This patch refactors the Verifier so it can diagnose IR validation errors and debug info metadata errors separately. The motivation behind this change is that broken (or outdated) debug info can be "recovered" from by stripping the debug info. The problem I'm trying to solve with this sequence of patches is that historically we've done a really bad job at verifying debug info. We want to be able to make the verifier stricter without having to worry about breaking bitcode compatibility with existing producers. For example, we don't necessarily want IR produced by an older version of clang to be rejected by an LTO link just because of malformed debug info, and rather provide an option to strip it. Note that merely outdated (but well-formed) debug info would continue to be auto-upgraded in this scenario. http://reviews.llvm.org/D19986 rdar://problem/25818489 llvm-svn: 268778
* [Hexagon] Be careful about anti-dependencies with a call in packetizerKrzysztof Parzyszek2016-05-061-2/+24
| | | | | | | | | | | In a case like J2_callr <ga:@foo>, %R0<imp-use>, ... R0<def> = ... the anti-dependency on R0 cannot be ignored and the two instructions cannot be packetized together, since if they were, the assignment to R0 would take place before the call. llvm-svn: 268776
* [GVN] Handle unordered atomics in cross block FREPhilip Reames2016-05-061-5/+5
| | | | | | You'll note there are essentially no code changes here. Cross block FRE heavily reuses code from the block local FRE. All of the tricky parts were done as part of the previous patch and the refactoring that removed the original code duplication. llvm-svn: 268775
* SDAG: Don't leave dangling dead nodes after SelectCodeCommonJustin Bogner2016-05-061-1/+3
| | | | | | | Relying on the caller to clean up after we've replaced all uses of a node won't work when we've migrated to the `void Select(...)` API. llvm-svn: 268774
* [X86] Get rid of X32_NOREX_ADDR_ACCESS register class.Quentin Colombet2016-05-062-4/+1
| | | | | | | According to H.J. Lu <hjl.tools@gmail.com>, this register class is never used. llvm-svn: 268771
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