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* [X86] Remove override of shouldUseStrictFP_TO_INT for fp80. NFCCraig Topper2019-12-042-9/+0
| | | | | | | | | | I suspect this became unnecessary after r354161. Prior to that we may have been going through the default expansion of FP_TO_UINT on 64-bit targets and then ending up back in Custom X86 handling to handle the FP_TO_SINT for it. Now we just Custom handle the FP_TO_UINT directly. We already need to handle it for 32-bit mode during type legalization so we wouldn't save any code by using the default expansion on 64-bit.
* Reland [AArch64][MachineOutliner] Return address signing for outlined functionsDavid Tellenbach2019-12-051-8/+288
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Reland after fixing an ASan failure by stopping outlining early if the constraints for return address signing removed too many outlining candidates. During AArch64 frame lowering instructions to enable return address signing are inserted into functions if needed. Functions generated during machine outlining don't run through target frame lowering and hence are missing such instructions. This patch introduces the following changes: 1. If not all functions that potentially participate in function outlining agree on their return address signing scope and their return address signing key, outlining is disabled for these functions. 2. If not all functions that potentially participate in function outlining agree on their support for v8.3A features, outlining is disabled for these functions. 3. If an outlining candidate would outline instructions that modify sp in a way that invalidates return address signing, outlining is disabled for that particular candidate. 4. If all candidate functions agree on the signing scope, signing key and their support for v8.3 features, the outlined function behaves as if it had the same scope and key attributes and as if it would provide the same v8.3A support as the original functions. Reviewers: ostannard, paquette Reviewed By: ostannard Subscribers: kristof.beyls, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70635
* [GlobalISel] Fix compiler crash lowering G_LOAD in AArch64.Amara Emerson2019-12-041-1/+1
| | | | | | Patch by Daniel Rodríguez Troitiño. Differential Revision: https://reviews.llvm.org/D70794
* Revert "Reland [AArch64][MachineOutliner] Return address signing for ↵Sterling Augustine2019-12-041-284/+8
| | | | | | | | | outlined functions" This reverts commit 02760b750b2ffcc0e2f5d78ecb137c80930c42c3. The original commit is not asan clean. http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux-fast/builds/37147/steps/check-llvm%20asan/logs/stdio
* [llvm] Fixing MIRVRegNamerUtils to properly handle 2+ MachineBasicBlocks.Puyan Lotfi2019-12-043-31/+8
| | | | | | | | | | | An interplay of code from D70210, along with code from the Value-Numbering-esque hash-based namer from D70210, as well as some crusty code from the original MIR-Canon code lead to multiple causes of failure when canonicalizing or renaming vregs for MIR with multiple basic blocks. This patch fixes those issues while deleting some no longer needed code and adding a nice diamond test case to boot. Differential Revision: https://reviews.llvm.org/D70478
* [llvm-symbolizer] Support debug file lookup using build IDPetr Hosek2019-12-041-0/+94
| | | | | | | | | | | | | | | | | | | Build ID is a protocol for looking up debug files that's already supported by various tools including debuggers. For example, when locating debug files, gdb would check the following directories: - /usr/lib/debug/.build-id/ab/cdef1234.debug - /usr/bin/ls.debug - /usr/bin/.debug/ls.debug - /usr/lib/debug/usr/bin/ls.debug llvm-symbolizer currently consults all of these except for build ID based one. This patch implements support for build ID lookup. The set of debug directories to search is specified by the new option: --debug-file-directory, whose name matches the debug-file-directory variable used by gdb for the same purpose. Differential Revision: https://reviews.llvm.org/D70759
* [ThinLTO] Fix importing of writeonly variables in distributed ThinLTOTeresa Johnson2019-12-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: D69561/dde5893 enabled importing of readonly variables with references, however, it introduced a bug relating to importing/internalization of writeonly variables with references. A fix for this was added in D70006/7f92d66. But this didn't work in distributed ThinLTO mode. The reason is that the fix (importing the writeonly var with a zeroinitializer) was only applied when there were references on the writeonly var summary. In distributed ThinLTO mode, where we only have a small slice of the index, we will not have the references on the importing side if we are not importing those referenced values. Rather than changing this handshaking (which will require a lot of other changes, since that's how we know what to import in the distributed backend clang invocation), we can simply always give the writeonly variable a zero initializer. Reviewers: evgeny777, steven_wu Subscribers: mehdi_amini, inglorion, hiraditya, dexonsmith, arphaman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70977
* [DWARF5][Debuginfo] Compilation unit type (DW_UT_skeleton) and root DIE ↵Alexey Lapshin2019-12-054-5/+24
| | | | | | | | | | | | | | | | | | | | (DW_TAG_compile_unit) do not match. That patch fixes incompatible compilation unit type (DW_UT_skeleton) and root DIE (DW_TAG_compile_unit) error. cat split-dwarf.cpp int main() { int a = 1; return 0; } clang++ -O -g -gsplit-dwarf -gdwarf-5 split-dwarf.cpp; llvm-dwarfdump --verify ./a.out | grep skeleton error: Compilation unit type (DW_UT_skeleton) and root DIE (DW_TAG_compile_unit) do not match. The fix is to change DW_TAG_compile_unit into DW_TAG_skeleton_unit when skeleton file is generated. Differential Revision: https://reviews.llvm.org/D70880
* [VectorUtils] API for VFShape, update VFInfo.Francesco Petrogalli2019-12-042-2/+46
| | | | | | | | | | | | | | | | | | | | | | Summary: This patch introduces an API to build and modify vector shapes. The validity of a VFShape can be checked with the `hasValidParameterList` method, which is also run in an assertion each time a VFShape is modified. The field VFISAKind has been moved to VFInfo under the assumption that different ISAs can map to the same VFShape (as it can be in the case of vector extensions with the same registers size, for example AVX and AVX2). Reviewers: sdesmalen, jdoerfert, simoll, hsaito Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70513
* [X86] Add missing break to the end of the last case in a switch. NFCCraig Topper2019-12-041-0/+1
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* Add support for lowering 32-bit/64-bit pointersAmy Huang2019-12-044-6/+72
| | | | | | | | | | | | | | | | | | | | Summary: This follows a previous patch that changes the X86 datalayout to represent mixed size pointers (32-bit sext, 32-bit zext, and 64-bit) with address spaces (https://reviews.llvm.org/D64931) This patch implements the address space cast lowering to the corresponding sign extension, zero extension, or truncate instructions. Related to https://bugs.llvm.org/show_bug.cgi?id=42359 Reviewers: rnk, craig.topper, RKSimon Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D69639
* Revert "Add some missing includes to MicrosoftDemangle.cpp (PR44217)"David Blaikie2019-12-041-2/+0
| | | | | | | This reverts commit 9b962d83ece841e43fd2823375dc6ddc94c1b178. This didn't address the underlying issue (in MicrosoftDemangleNodes.h) that was fixed 6 months ago anyway.
* Revert "[DebugInfo] Recover debug intrinsics when killing duplicated/empty ↵Tozer2019-12-042-64/+22
| | | | | | | | basic blocks" This reverts commit 72ce759928e6dfee6a9efa310b966c19722352ba. Reverted due to build failure.
* Reland [AArch64][MachineOutliner] Return address signing for outlined functionsDavid Tellenbach2019-12-041-8/+284
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Reland after fixing a bug that allowed outlining of SP modifying instructions that invalidated return address signing. During AArch64 frame lowering instructions to enable return address signing are inserted into functions if needed. Functions generated during machine outlining don't run through target frame lowering and hence are missing such instructions. This patch introduces the following changes: 1. If not all functions that potentially participate in function outlining agree on their return address signing scope and their return address signing key, outlining is disabled for these functions. 2. If not all functions that potentially participate in function outlining agree on their support for v8.3A features, outlining is disabled for these functions. 3. If an outlining candidate would outline instructions that modify sp in a way that invalidates return address signing, outlining is disabled for that particular candidate. 4. If all candidate functions agree on the signing scope, signing key and their support for v8.3 features, the outlined function behaves as if it had the same scope and key attributes and as if it would provide the same v8.3A support as the original functions. Reviewers: ostannard, paquette Reviewed By: ostannard Subscribers: kristof.beyls, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70635
* Revert "[Coverage] Revise format to reduce binary size"Vedant Kumar2019-12-046-306/+78
| | | | | | | | | | This reverts commit e18531595bba495946aa52c0a16b9f9238cff8bc. On Windows, there is an error: http://lab.llvm.org:8011/builders/sanitizer-windows/builds/54963/steps/stage%201%20check/logs/stdio error: C:\b\slave\sanitizer-windows\build\stage1\projects\compiler-rt\test\profile\Profile-x86_64\Output\instrprof-merging.cpp.tmp.v1.o: Failed to load coverage: Malformed coverage data
* [Coverage] Revise format to reduce binary sizeVedant Kumar2019-12-046-78/+306
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Revise the coverage mapping format to reduce binary size by: 1. Naming function records and marking them `linkonce_odr`, and 2. Compressing filenames. This shrinks the size of llc's coverage segment by 82% (334MB -> 62MB) and speeds up end-to-end single-threaded report generation by 10%. For reference the compressed name data in llc is 81MB (__llvm_prf_names). Rationale for changes to the format: - With the current format, most coverage function records are discarded. E.g., more than 97% of the records in llc are *duplicate* placeholders for functions visible-but-not-used in TUs. Placeholders *are* used to show under-covered functions, but duplicate placeholders waste space. - We reached general consensus about giving (1) a try at the 2017 code coverage BoF [1]. The thinking was that using `linkonce_odr` to merge duplicates is simpler than alternatives like teaching build systems about a coverage-aware database/module/etc on the side. - Revising the format is expensive due to the backwards compatibility requirement, so we might as well compress filenames while we're at it. This shrinks the encoded filenames in llc by 86% (12MB -> 1.6MB). See CoverageMappingFormat.rst for the details on what exactly has changed. Fixes PR34533 [2], hopefully. [1] http://lists.llvm.org/pipermail/llvm-dev/2017-October/118428.html [2] https://bugs.llvm.org/show_bug.cgi?id=34533 Differential Revision: https://reviews.llvm.org/D69471
* [LoopInterchange] Improve inner exit loop safety checks.Florian Hahn2019-12-041-33/+36
| | | | | | | | | | | | | | | | | | | | The PHI node checks for inner loop exits are too permissive currently. As indicated by an existing comment, we should only allow LCSSA PHI nodes that are part of reductions or are only used outside of the loop nest. We ensure this by checking the users of the LCSSA PHIs. Specifically, it is not safe to use an exiting value from the inner loop in the latch of the outer loop. It also moves the inner loop exit check before the outer loop exit check. Fixes PR43473. Reviewers: efriedma, mcrosier Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D68144
* [llvm][Transform] Remove unused variable. [NFCI]Francesco Petrogalli2019-12-041-1/+1
| | | | The variable prevents compiling when using -Werror=unused-variable.
* [PGO][PGSO] Distinguish queries from unit tests and explicitly enable for ↵Hiroshi Yamauchi2019-12-041-0/+5
| | | | | | | | | | | | | | | | the existing IR passes only. NFC. Summary: This is one more prep step necessary before the code gen pass instrumentation code could go in. Reviewers: davidxl Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70988
* [SVE][AArch64] Adding patterns for while intrinsics.Mikhail Gudim2019-12-042-28/+40
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* [LVI] Restructure cachingNikita Popov2019-12-041-96/+47
| | | | | | | | | | | | | | | Variant on D70103. The caching is switched to always use a BB to cache entry map, which then contains per-value caches. A separate set contains value handles with a deletion callback. This allows us to properly invalidate overdefined values. A possible alternative would be to always cache by value first and have per-BB maps/sets in the each cache entry. In that case we could use a ValueMap and would avoid the separate value handle set. I went with the BB indexing at the top level to make it easier to integrate D69914, but possibly that's not the right choice. Differential Revision: https://reviews.llvm.org/D70376
* [XCOFF][AIX] Emit TOC entries for object file generationjasonliu2019-12-044-7/+12
| | | | | | | | | | | | | | | | | | | | Summary: Implement emitTCEntry for PPCTargetXCOFFStreamer. Add TC csects to TOCCsects for object file writing. Note: 1. I did not include any raw data testing for this object file generation because TC entries raw data will all be 0 without relocation implemented. I will add raw data testing as part of relocation testing later. 2. I removed "Symbol->setFragment(F);" for common symbols because we don't need it, and if we have it then we would hit assertions below: Assertion `(SymbolContents == SymContentsUnset || SymbolContents == SymContentsOffset) && "Cannot get offset for a common/variable symbol"' failed. 3.Fixed incorrect TOC-base alignment. Differential Revision: https://reviews.llvm.org/D70798
* Add some missing includes to MicrosoftDemangle.cpp (PR44217)David Blaikie2019-12-041-0/+2
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* [DebugInfo] Recover debug intrinsics when killing duplicated/empty basic blocksstozer2019-12-042-22/+64
| | | | | | | | | | When basic blocks are killed, either due to being empty or to being an if.then or if.else block whose complement contains identical instructions, some of the debug intrinsics in that block are lost. This patch sinks those intrinsics into the single successor block, setting them Undef if necessary to prevent debug info from falling out-of-date. Differential Revision: https://reviews.llvm.org/D70318
* Reapply "[llvm][Support] Take in CurrentDirectory as a parameter in ↵Kadir Cetinkaya2019-12-041-28/+46
| | | | | | ExpandResponseFiles" Attemps to fix windows buildbots.
* [ELF] Support for PT_GNU_PROPERTY in header and toolsPeter Smith2019-12-041-0/+1
| | | | | | | | | | | | | The PT_GNU_PROPERTY is generated by a linker to describe the .note.gnu.property section. The Linux kernel uses this program header to locate the .note.gnu.property section. It is described in "The Linux gABI extension" Include support for llvm-readelf, llvm-readobj and the yaml reader and writers. Differential Revision: https://reviews.llvm.org/D70959
* Revert "[llvm][Support] Take in CurrentDirectory as a parameter in ↵Kadir Cetinkaya2019-12-041-46/+28
| | | | | | ExpandResponseFiles" This reverts commit 75656005dbc8866e1888932a68a830b0df403560.
* [ARM][MVE][Intrinsics] Add VMULH/VRMULH intrinsics.Mark Murray2019-12-041-14/+40
| | | | | | | | | | | | Summary: Add MVE VMULH/VRMULH intrinsics and unit tests. Reviewers: simon_tatham, ostannard, dmgreen Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D70948
* [llvm][Support] Take in CurrentDirectory as a parameter in ExpandResponseFilesKadir Cetinkaya2019-12-041-28/+46
| | | | | | | | | | | | | | | | | Summary: This is a follow-up to D70769 and D70222, which allows propagation of current directory down to ExpandResponseFiles for handling of relative paths. Previously clients had to mutate FS to achieve that, which is not thread-safe and can even be thread-hostile in the case of real file system. Reviewers: sammccall Subscribers: hiraditya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D70857
* [Support] add vfs support for ExpandResponseFilesKadir Cetinkaya2019-12-041-18/+43
| | | | | | | | | | | | | | | | Summary: add vfs support for `ExpandResponseFiles`. Patch By: liu hui(@lh123) Reviewers: kadircet, espindola, alexshap, rupprecht, jhenderson Reviewed By: kadircet Subscribers: mgorny, sammccall, merge_guards_bot, emaste, sbc100, arichardson, hiraditya, aheejin, jakehehrlich, MaskRay, rupprecht, seiya, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D70769
* [AArch64][SVE] Implement reversal intrinsicsCullen Rhodes2019-12-042-8/+37
| | | | | | | | | | | | | | | | | | | | | | | Summary: Adds intrinsics for the following: * rbit * revb * revh * revw Patterns are also defined to map the 'llvm.bswap.*' intrinsic to the SVE revb instruction. Reviewers: sdesmalen, huntergr, dancgr, rengolin, efriedma, rovka Reviewed By: sdesmalen Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70960
* [AMDGPU][MC] Remove duplicate code introduced in r359316.Jay Foad2019-12-041-9/+0
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* [SimpleLoopUnswitch] Invalidate the topmost loop with ExitBB as exiting.Florian Hahn2019-12-041-2/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | SCEV caches the exiting blocks when computing exit counts. In SimpleLoopUnswitch, we split the exit block of the loop to unswitch. Currently we only invalidate the loop containing that exit block, but if that block is the exiting block for a parent loop, we have stale cache entries. We have to invalidate the top-most loop that contains the exit block as exiting block. We might also be able to skip invalidating the loop containing the exit block, if the exit block is not an exiting block of that loop. There are also 2 more places in SimpleLoopUnswitch, that use a similar problematic approach to get the loop to invalidate. If the patch makes sense, I will also update those places to a similar approach (they deal with multiple exit blocks, so we cannot directly re-use getTopMostExitingLoop). Fixes PR43972. Reviewers: skatkov, reames, asbirlea, chandlerc Reviewed By: asbirlea Differential Revision: https://reviews.llvm.org/D70786
* Allow negative offsets in MipsMCInstLower::LowerOperandAlex Richardson2019-12-042-7/+5
| | | | | | | | | | | | | | | | | | | | | | | Summary: We rely on this in our CHERI backend to address the GOT by generating a $pc-relative addresses. For this we emit the following code sequence: lui $1, %pcrel_hi(_CHERI_CAPABILITY_TABLE_-8) daddiu $1, $1, %pcrel_lo(_CHERI_CAPABILITY_TABLE_-4) cgetpccincoffset $c1, $1 However, without this change the addend is implicitly converted to UINT32_MAX and an invalid pointer value is generated. Reviewers: atanasyan Reviewed By: atanasyan Subscribers: merge_guards_bot, sdardis, hiraditya, jrtc27, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70953
* Handle BUNDLE instructions in MipsAsmPrinterAlex Richardson2019-12-041-0/+4
| | | | | | | | | | | | | | | | | | | | | | Summary: In our CHERI fork we use BUNDLE instructions to ensure that a three-instruction sequence to generate a program-counter-relative value is emitted without reordering or insertions (since that would break the 32-bit offset computation). Currently MipsAsmPrinter asserts when it encounters a pseudo instruction. To handle BUNDLE we can simply skip the instruction which will then make EmitInstruction() process the contents of the bundle in order. Reviewers: atanasyan Reviewed By: atanasyan Subscribers: merge_guards_bot, sdardis, hiraditya, jrtc27, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70945
* MipsDelaySlotFiller: Don't move BUNDLE instructions into the delay slotAlex Richardson2019-12-041-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: In our CHERI fork we use BUNDLE instructions to ensure that a three-instruction sequence to generate a program-counter-relative value is emitted without reordering or insertions (since that would break the 32-bit offset computation). This sequence is created in MipsExpandPseudo and we use finalizeBundle() to create the BUNDLE instruction. However, the delay slot filler currently breaks this pattern since the BUNDLE will be removed and so all instructions are moved into the delay slot. Since the delay slot only executes the first instruction, this results in incorrect computations (and run-time crashes) if the branch is taken. The original test cases uses CHERI instructions, so for the test case here I simple filled a BUNDLE with a no-op DADDiu $sp_64, -16 and DADDiu $sp_64, 16. Reviewers: atanasyan Reviewed By: atanasyan Subscribers: merge_guards_bot, sdardis, hiraditya, jrtc27, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70944
* Add debug output to MipsDelaySlotFiller passAlex Richardson2019-12-041-5/+28
| | | | | | | | | | | | | | | | | | Summary: I was tracking down a code-generation bug in this pass and found that the added output was useful. It is also helpful to find out why a delay slot could not be filled even though there is clearly a valid instruction (which appears to mostly be caused by CFI instructions). Reviewers: atanasyan Reviewed By: atanasyan Subscribers: merge_guards_bot, sdardis, hiraditya, jrtc27, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70940
* [AArch64TTI] Compute imm materialization cost for AArch64 intrinsicsFlorian Hahn2019-12-041-0/+6
| | | | | | | | | | | | | | | | Currently, getIntImmCost returns TCC_Free for almost all intrinsics. For most AArch64 specific intrinsics however, it looks like integer constants cannot be folded into most of them (at least the ones I checked). Unless we know that we can fold integer operands with the intrinsic, we handle more cases correctly by returning the cost to materialize the immediate than return TCC_Free. Reviewers: SjoerdMeijer, dmgreen, t.p.northover, ributzka Reviewed By: SjoerdMeijer Differential Revision: https://reviews.llvm.org/D70669
* [NFC] Use default case in EVT::getEVTStringCullen Rhodes2019-12-041-127/+2
| | | | | | | | | | Summary: The default case handles the majority of MVTs so most of the individual cases can be removed. Also added a case for floating point types. Reviewed By: sdesmalen Differential Revision: https://reviews.llvm.org/D70955
* AMDGPU: Avoid folding 2 constant operands into an SALU operationDavid Stuttard2019-12-041-0/+23
| | | | | | | | | | | | | | | Summary: Catch the (admittedly unusual) case where SIFoldOperands attempts to fold 2 constant operands into the same SALU operation, with neither operand able to be encoded as an inline constant. Change-Id: Ibc48d662c9ffd8bbacd154976b0b1c257ace0927 Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, tpr, t-tye, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70896
* [yaml2obj] - Make DynamicSymbols to be Optional<> too.Georgii Rymar2019-12-041-16/+21
| | | | | | | | | | | | | | | | | | We already have Symbols property to list regular symbols and it is currently Optional<>. This patch makes DynamicSymbols to be optional too. With this there is no need to define a dummy symbol anymore to trigger creation of the .dynsym and it is now possible to define an empty .dynsym using just the following line: DynamicSymbols: [] (it is important to have when you do not want to have dynamic symbols, but want to have a .dynsym) Now the code is consistent and it helped to fix a bug: previously we did not report an error when both Content/Size and an empty Symbols/DynamicSymbols list were specified. Differential revision: https://reviews.llvm.org/D70956
* [APFloat] Prevent construction of APFloat with Semantics and FP valueEhud Katz2019-12-042-2/+2
| | | | | | | | | | | | | | | | | Constructor invocations such as `APFloat(APFloat::IEEEdouble(), 0.0)` may seem like they accept a FP (floating point) value, but the overload they reach is actually the `integerPart` one, not a `float` or `double` overload (which only exists when `fltSemantics` isn't passed). This may lead to possible loss of data, by the conversion from `float` or `double` to `integerPart`. To prevent future mistakes, a new constructor overload, which accepts any FP value and marked with `delete`, to prevent its usage. Fixes PR34095. Differential Revision: https://reviews.llvm.org/D70425
* [DWARFDebugLoclists] Add support for other DW_LLE encodingsPavel Labath2019-12-041-8/+38
| | | | | | | | | | | | | | | Summary: lldb's loclists parser has support for DW_LLE_start_end(x) encodings. To avoid regressing when switching the implementation to llvm's, I add parsing support for all previously unsupported location list encodings. Reviewers: dblaikie, JDevlieghere, aprantl, SouraVX Subscribers: hiraditya, probinson, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70949
* [DWARFDebugRnglists] Add a callback-based version of the getAbsoluteRanges ↵Pavel Labath2019-12-041-2/+11
| | | | | | | | | | | | | | | | | | | | function Summary: The dump() function already accepts a callback. This makes getAbsoluteRanges do the same. The existing DWARFUnit overload is implemented on top of the new function. This enables usage of the debug_rnglists parser from within lldb (which has it's own dwarf parser). Reviewers: dblaikie, JDevlieghere, aprantl Subscribers: hiraditya, probinson, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70952
* [SelectionDAG] Expand nnan FMINNUM/FMAXNUM to select sequenceUlrich Weigand2019-12-041-0/+20
| | | | | | | | | | | | | | | | | InstCombine may synthesize FMINNUM/FMAXNUM nodes from fcmp+select sequences (where the fcmp is marked nnan). Currently, if the target does not otherwise handle these nodes, they'll get expanded to libcalls to fmin/fmax. However, these functions may reside in libm, which may introduce a library dependency that was not originally present in the source code, potentially resulting in link failures. To fix this problem, add code to TargetLowering::expandFMINNUM_FMAXNUM to expand FMINNUM/FMAXNUM to a compare+select sequence instead of the libcall. This is done only if the node is marked as "nnan"; in this case, the expansion to compare+select is always correct. This also suffices to catch all cases where FMINNUM/FMAXNUM was synthesized as above. Differential Revision: https://reviews.llvm.org/D70965
* [MacroFusion] Limit the max fused number as 2 to reduce the dependencyQingShan Zhang2019-12-041-1/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the example: int foo(int a, int b, int c, int d) { return a + b + c + d; } And this is the Dependency Graph: +------+ +------+ +------+ +------+ | A | | B | | C | | D | +--+--++ +---+--+ +--+---+ +--+---+ ^ ^ ^ ^ ^ ^ | | | | | | | | | |New1 +--------------+ | | | | | | | | | +--+---+ | |New2 | +-------+ ADD1 | | | | +--+---+ | | | Fuse ^ | | +-------------+ | +------------+ | | | Fuse +--+---+ +----------->+ ADD2 | | +------+ +--+---+ | ADD3 | +------+ We need also create an artificial edge from ADD1 to A if https://reviews.llvm.org/D69998 is landed. That will force the Node A scheduled before the ADD1 and ADD2. But in fact, it is ok to schedule the Node A in-between ADD3 and ADD2, as ADD3 and ADD2 are NOT a fusion pair because ADD2 has been matched to ADD1. We are creating these unnecessary dependency edges that override the heuristics. Differential Revision: https://reviews.llvm.org/D70066
* [PowerPC] folding rlwinm + rlwinm to rlwinmczhengsz2019-12-031-0/+138
| | | | | | | | | | | | For example: x3 = rlwinm x3, 27, 5, 31 x3 = rlwinm x3, 19, 0, 12 can be combined to x3 = rlwinm x3, 14, 0, 12 Reviewed by: steven.zhang, lkail Differential Revision: https://reviews.llvm.org/D70374
* [X86] Model DAZ and FTZWang, Pengfei2019-12-042-21/+43
| | | | | | | | | | | | Summary: This is a follow-up of D70881. It models DAZ and FTZ for releated instructions. Reviewers: craig.topper, RKSimon, andrew.w.kaylor Subscribers: hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D70938
* [X86] Model MXCSR for all AVX512 instructionsWang, Pengfei2019-12-042-57/+79
| | | | | | | | | | | | Summary: Model MXCSR for all AVX512 instructions Reviewers: craig.topper, RKSimon, andrew.w.kaylor Subscribers: hiraditya, llvm-commits, LuoYuanke, LiuChen3 Tags: #llvm Differential Revision: https://reviews.llvm.org/D70881
* [FPEnv] [PowerPC] Lowering ppc_fp128 StrictFP Nodes to libcallsCraig Topper2019-12-034-210/+283
| | | | | | | | This is an alternative to D64662 that shares more code between strict and non-strict nodes. It's modeled after the implementation that I did for softening. Differential Revision: https://reviews.llvm.org/D70867
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