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* Fix pr19645.Rafael Espindola2014-05-039-53/+47
| | | | | | | | | | | | | | | | The fix itself is fairly simple: move getAccessVariant to MCValue so that we replace the old weak expression evaluation with the far more general EvaluateAsRelocatable. This then requires that EvaluateAsRelocatable stop when it finds a non trivial reference kind. And that in turn requires the ELF writer to look harder for weak references. Last but not least, this found a case where we were being bug by bug compatible with gas and accepting an invalid input. I reported pr19647 to track it. llvm-svn: 207920
* [ARM64] Correctly select ANDWri in FastISel.Joey Gouly2014-05-031-6/+13
| | | | | | http://reviews.llvm.org/D3598 llvm-svn: 207917
* SLPVectorizer: Lazily allocate the map for block numbering.Benjamin Kramer2014-05-032-27/+26
| | | | | | | | There is no point in creating it if we're not going to vectorize anything. Creating the map is expensive as it creates large values. No functionality change. llvm-svn: 207916
* Rename member variable to try to fix the bots.Rafael Espindola2014-05-031-7/+7
| | | | llvm-svn: 207915
* [ELFYAML] Group ELF header falgs to target specific blocks. Handle flagsSimon Atanasyan2014-05-031-36/+45
| | | | | | | | which are corresponding to the current target read from the ELF file. This fix cannot be tested until obj2yaml does not support ELF format. llvm-svn: 207905
* [ELFYAML] Add more SHT_xxx flags to the YAML section type mapping.Simon Atanasyan2014-05-031-0/+17
| | | | llvm-svn: 207904
* Vectorize intrinsic math function calls in SLPVectorizer.Karthik Bhat2014-05-032-143/+22
| | | | | | | This patch adds support to recognize and vectorize intrinsic math functions in SLPVectorizer. Review: http://reviews.llvm.org/D3560 and http://reviews.llvm.org/D3559 llvm-svn: 207901
* Try simplifying LexicalScopes ownership again.David Blaikie2014-05-021-28/+32
| | | | | | | | | | | | | | Committed initially in r207724-r207726 and reverted due to compiler-rt crashes in r207732. Instead, fix this harder with unordered_map and store the LexicalScopes by value in the map. This did necessitate moving the definition of LexicalScope above the definition of LexicalScopes. Let's see how the buildbots/compilers tolerate unordered_map::emplace + std::piecewise_construct + std::forward_as_tuple... llvm-svn: 207876
* Satisfy GCC's urgent need for parentheses around ‘&&’ within ‘||’.Benjamin Kramer2014-05-021-2/+2
| | | | llvm-svn: 207871
* Aliases are always definitions. Delete dead code.Rafael Espindola2014-05-021-6/+2
| | | | llvm-svn: 207869
* Clean up constructor logic and member access for LoopVectorizeHints.Eric Christopher2014-05-021-34/+39
| | | | | | | | | There are public functions that mutate various members as well as another private member already, so make all the members private to avoid the discontinuity and add accessors for the values. Should be no functional change. llvm-svn: 207868
* llvm-cov: Fix handling of line zero appearing in a line tableJustin Bogner2014-05-021-6/+18
| | | | | | | | | | | | | Reading line tables in llvm-cov was pretty broken, but would happen to work as long as no line in the table was 0. It's not clear to me whether a line of zero *should* show up in these tables, but deciding to read a string in the middle of the line table is certainly the wrong thing to do if it does. I've also added some comments, as trying to figure out what this block of code was doing was fairly unpleasant. llvm-svn: 207866
* Teach GlobalDCE how to remove empty global_ctor entries.Nico Weber2014-05-024-158/+204
| | | | | | | | | | | | | | | | | This moves most of GlobalOpt's constructor optimization code out of GlobalOpt into Transforms/Utils/CDtorUtils.{h,cpp}. The public interface is a single function OptimizeGlobalCtorsList() that takes a predicate returning which constructors to remove. GlobalOpt calls this with a function that statically evaluates all constructors, just like it did before. This part of the change is behavior-preserving. Also add a call to this from GlobalDCE with a filter that removes global constructors that contain a "ret" instruction and nothing else – this fixes PR19590. llvm-svn: 207856
* [GVN] Pass the phi-translated address of a load instead of the untranslatedAkira Hatanaka2014-05-021-2/+1
| | | | | | | | | address to AnalyzeLoadFromClobberingLoad. This fixes a bug in load-PRE where PRE is applied to a load that is not partially redundant. <rdar://problem/16638765>. llvm-svn: 207853
* MC: place .file records into the correct sectionSaleem Abdulrasool2014-05-021-0/+1
| | | | | | | | | .file records are supposed to have a section identifier of 65534 (IMAGE_SCN_DEBUG) rather than 0. This is spelt out clearly within the PE/COFF specification. Fix this minor oversight with the implementation for support for .file records. llvm-svn: 207851
* DAGCombine: prevent formation of illegal ConstantFP nodes.Tim Northover2014-05-021-5/+10
| | | | llvm-svn: 207850
* Add a description for AMD's bdver4 (aka Excavator).Benjamin Kramer2014-05-022-0/+9
| | | | | | This is just bdver3 + AVX2 + BMI2. llvm-svn: 207847
* R600/SI: Add processor type for Mullins.Tom Stellard2014-05-021-0/+2
| | | | | | | Reviewed-by: Tom Stellard <thomas.stellard@amd.com> Signed-off-by: Samuel Li <samuel.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> llvm-svn: 207846
* R600: Expand vector sin and cos.Tom Stellard2014-05-021-0/+2
| | | | | | | | v2: move code to AMDGPUISelLowering.cpp squash with tests (both EG and SI) Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> llvm-svn: 207845
* R600: Expand TruncStore i64 -> {i16,i8}Tom Stellard2014-05-021-0/+2
| | | | llvm-svn: 207844
* R600/SI: Only create one instruction when spilling/restoring register v3Tom Stellard2014-05-027-36/+231
| | | | | | | | | | | | | | | | | | The register spiller assumes that only one new instruction is created when spilling and restoring registers, so we need to emit pseudo instructions for vector register spills and lower them after register allocation. v2: - Fix calculation of lane index - Extend VGPR liveness to end of program. v3: - Use SIMM16 field of S_NOP to specify multiple NOPs. https://bugs.freedesktop.org/show_bug.cgi?id=75005 llvm-svn: 207843
* AArch64/ARM64: add patterns for post-indexed ST1 ops.Tim Northover2014-05-021-0/+47
| | | | llvm-svn: 207840
* ARM64: refactor NEON post-indexed loads & stores (MC).Tim Northover2014-05-023-987/+443
| | | | | | | | | | | | | | | | | | | Previously, LLVM had no knowledge that these instructions actually modified their address register: fine if they never end up in CodeGen, but when I'd rather like to write some patterns for them it becomes a disaster. The change is mostly straightforward, I think the most significant design decision was to *always* put the address write-back first. This allows loads and stores to be accessed more uniformly, for example permitting the continued sharing of the InstAlias definitions. I also discovered that the custom Decode logic is no longer needed, so I removed it. No tests, because there should be no functionality change. llvm-svn: 207839
* AArch64/ARM64: support indexed loads/stores on vector types.Tim Northover2014-05-024-1/+72
| | | | | | | | While post-indexed LD1/ST1 instructions do exist for vector loads, this patch makes use of the more flexible addressing-modes in LDR/STR instructions. llvm-svn: 207838
* Allow SelectionDAG::FoldConstantArithmetic to work when it's called with a ↵Benjamin Kramer2014-05-021-2/+8
| | | | | | vector VT but scalar values. llvm-svn: 207835
* Fold strlen(expr ? "str1" : "str2") to x ? len1 : len2. This fires about 330 ↵Nick Lewycky2014-05-021-0/+15
| | | | | | times in a bootstrap of clang. llvm-svn: 207828
* [Stackmaps] Pacify windows buildbot.Juergen Ributzka2014-05-011-0/+3
| | | | llvm-svn: 207807
* [Stackmaps] Add command line option to specify the stackmap version.Juergen Ributzka2014-05-011-1/+10
| | | | llvm-svn: 207805
* [Stackmaps] Refactor serialization code. No functional change intended.Juergen Ributzka2014-05-011-125/+144
| | | | llvm-svn: 207804
* [Stackmaps] Replace the custom ConstantPool class with a MapVector.Juergen Ributzka2014-05-011-5/+7
| | | | llvm-svn: 207803
* [IR] Make {extract,insert}element accept an index of any integer type.Michael J. Spencer2014-05-014-15/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Given the following C code llvm currently generates suboptimal code for x86-64: __m128 bss4( const __m128 *ptr, size_t i, size_t j ) { float f = ptr[i][j]; return (__m128) { f, f, f, f }; } ================================================= define <4 x float> @_Z4bss4PKDv4_fmm(<4 x float>* nocapture readonly %ptr, i64 %i, i64 %j) #0 { %a1 = getelementptr inbounds <4 x float>* %ptr, i64 %i %a2 = load <4 x float>* %a1, align 16, !tbaa !1 %a3 = trunc i64 %j to i32 %a4 = extractelement <4 x float> %a2, i32 %a3 %a5 = insertelement <4 x float> undef, float %a4, i32 0 %a6 = insertelement <4 x float> %a5, float %a4, i32 1 %a7 = insertelement <4 x float> %a6, float %a4, i32 2 %a8 = insertelement <4 x float> %a7, float %a4, i32 3 ret <4 x float> %a8 } ================================================= shlq $4, %rsi addq %rdi, %rsi movslq %edx, %rax vbroadcastss (%rsi,%rax,4), %xmm0 retq ================================================= The movslq is uneeded, but is present because of the trunc to i32 and then sext back to i64 that the backend adds for vbroadcastss. We can't remove it because it changes the meaning. The IR that clang generates is already suboptimal. What clang really should emit is: %a4 = extractelement <4 x float> %a2, i64 %j This patch makes that legal. A separate patch will teach clang to do it. Differential Revision: http://reviews.llvm.org/D3519 llvm-svn: 207801
* Remove HexagonTargetMachine::addPassesForOptimizations; it is not needed any ↵Pranav Bhandarkar2014-05-012-16/+0
| | | | | | more. llvm-svn: 207800
* Add basic functionality for assignment of ints.Reed Kotler2014-05-011-1/+167
| | | | | | | | | | | | | | | This creates a lot of core infrastructure in which to add, with little effort, quite a bit more to mips fast-isel Test Plan: simplestore.ll Reviewers: dsanders Reviewed By: dsanders Differential Revision: http://reviews.llvm.org/D3527 llvm-svn: 207790
* Fix uninitialized variable introduced in r207739.David Blaikie2014-05-011-1/+1
| | | | | | | | | | This was initialized by llvm-mc (calling setDwarfVersion) but other clients (such as clang, llc, etc) aren't necessarily initializing this so we were getting garbage DWARF version values in the output. Initialize it to a reasonable default (the same default used in llvm-mc, though this is higher than it was (2) previously). llvm-svn: 207788
* Don't propagate StorageClass and ComplexType to aliases.Rafael Espindola2014-05-011-2/+1
| | | | | | | | | This matches gas' behaviour on COFF. I think that this yak is now sufficiently shaved for aliases with offset to work. llvm-svn: 207786
* Update and sort CMakeLists.Benjamin Kramer2014-05-011-5/+6
| | | | llvm-svn: 207785
* Add an optimization that does CSE in a group of similar GEPs.Eli Bendersky2014-05-013-4/+601
| | | | | | | | | | | | | | This optimization merges the common part of a group of GEPs, so we can compute each pointer address by adding a simple offset to the common part. The optimization is currently only enabled for the NVPTX backend, where it has a large payoff on some benchmarks. Review: http://reviews.llvm.org/D3462 Patch by Jingyue Wu. llvm-svn: 207783
* PR19623: Implement typedefs of void.David Blaikie2014-05-011-1/+0
| | | | | | | | This the LLVM portion that will allow Clang and other frontends to emit typedefs of void by providing a null type for the typedef's underlying type. llvm-svn: 207777
* Fixing a cast-qual warning. getBufferStart() and getBufferEnd() both return ↵Aaron Ballman2014-05-011-2/+3
| | | | | | | | a const char *, so casting to non-const was triggering a warning (even though the assignment and usage was always const anyway). No functional changes intended. llvm-svn: 207774
* R600/SI: Fix verifier error with pseudo store instructions.Matt Arsenault2014-05-011-1/+1
| | | | | | | | Use i32 instead of specifying SReg_32. When this is the pseudo INDIRECT_BASE_ADDR, this would give a bogus verifier error. llvm-svn: 207770
* Compute the correct section for zed = foo + 1 in COFF.Rafael Espindola2014-05-011-10/+9
| | | | | | | | | This fixes pr19147. There are a few more related issues to fix, but the testcase in the bug now passes. llvm-svn: 207763
* Move getBaseSymbol somewhere the COFF writer can use.Rafael Espindola2014-05-012-26/+25
| | | | | | I will use it there in a second. llvm-svn: 207761
* [ARM64] Prefer generation of bzero on Darwin onlyBradley Smith2014-05-011-2/+5
| | | | llvm-svn: 207760
* Make getBaseSymbol non recursive.Rafael Espindola2014-05-011-3/+5
| | | | llvm-svn: 207759
* Don't force symbols to be globals in .thumb_set.Rafael Espindola2014-05-011-5/+2
| | | | | | | | | | | | | | | | | | | | | | We currently force symbols to be globals in .thumb_set. The intent seems to be that given .thumb_set foo, bar we emit an undefined symbol to bar if it is never defined. The side effect is that we mark bar as global, even if it is defined, which gas does not. Producing an undefined reference to bar is a general difference from MC and gas. For example, given a = b gas will produce an undefined reference to b, MC will not. I would be surprised if any code depends on this, but it it does, we should fix the general difference, not special case .thumb_set. llvm-svn: 207757
* AArch64/ARM64: print BFM instructions as BFI or BFXILTim Northover2014-05-011-0/+27
| | | | | | | The canonical form of the BFM instruction is always one of the more explicit extract or insert operations, which makes reading output much easier. llvm-svn: 207752
* [LCG] Add the other simple edge insertion API to the call graph. ThisChandler Carruth2014-05-011-0/+15
| | | | | | | | | just connects an SCC to one of its descendants directly. Not much of an impact. The last one is the hard one -- connecting an SCC to one of its ancestors, and thereby forming a cycle such that we have to merge all the SCCs participating in the cycle. llvm-svn: 207751
* [LCG] Don't lookup the child SCC twice. Spotted this by inspection, andChandler Carruth2014-05-011-2/+2
| | | | | | no functionality changed. llvm-svn: 207750
* [LCG] Add some basic methods for querying the parent/child relationshipsChandler Carruth2014-05-011-0/+15
| | | | | | | | of SCCs in the SCC DAG. Exercise them in the big graph test case. These will be especially useful for establishing invariants in insertion logic. llvm-svn: 207749
* Correction to assert statemtent to allow 32-bit unsigned numbers with the ↵Richard Barton2014-05-011-2/+2
| | | | | | | | top bit set. This fixes an ARM assembler crash - regression test added. llvm-svn: 207747
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