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* InstrProf: Move constructor to the headerDuncan P. N. Exon Smith2014-03-211-3/+0
| | | | | | | | Fixes 80-column violation at the same time. <rdar://problem/15950346> llvm-svn: 204516
* InstrProf: Change magic number to have non-text charactersDuncan P. N. Exon Smith2014-03-211-8/+8
| | | | | | | | | Include non-text characters in the magic number so that text files can't match. <rdar://problem/15950346> llvm-svn: 204513
* InstrProf: Use move semantics with unique_ptrDuncan P. N. Exon Smith2014-03-211-4/+4
| | | | | | <rdar://problem/15950346> llvm-svn: 204512
* InstrProf: Detect magic numbers in a more scalable wayDuncan P. N. Exon Smith2014-03-211-34/+32
| | | | | | | | No functionality change. <rdar://problem/15950346> llvm-svn: 204511
* InstrProf: Actually detect bad headersDuncan P. N. Exon Smith2014-03-212-7/+7
| | | | | | <rdar://problem/15950346> llvm-svn: 204510
* [RuntimeDyld] Fix comment for previous commit (r204439)Juergen Ributzka2014-03-211-2/+4
| | | | llvm-svn: 204508
* [RuntimeDyld] clang-format files.Juergen Ributzka2014-03-216-747/+580
| | | | llvm-svn: 204507
* DebugInfo: Omit DW_AT_addr_base from skeletal type units.David Blaikie2014-03-211-7/+7
| | | | | | | | | | | | | Type units have no addresses, so there's no need for DW_AT_addr_base. This removes another relocation from every skeletal type unit and brings LLVM's skeletal type units in line with GCC's (containing only GNU_dwo_name (strp), comp_dir (strp), and GNU_pubnames (flag_present)). Cary's got some ideas about using str_index in the .o file to reduce those last two relocations (well, replace two relocations with one relocation (pointing to the string index) and two indicies) llvm-svn: 204506
* [AArch64] Add SchedRW lists to NEON instructions.Chad Rosier2014-03-214-246/+512
| | | | | | | | | | | | Previously, only regular AArch64 instructions were annotated with SchedRW lists. This patch does the same for NEON enabling these instructions to be scheduled by the MIScheduler. Additionally, store operations are now modeled and a few SchedRW lists were updated for bug fixes (e.g. multiple def operands). Reviewers: apazos, mcrosier, atrick Patch by Dave Estes <cestes@codeaurora.org>! llvm-svn: 204505
* InstrProf: Read raw binary profile in llvm-profdataDuncan P. N. Exon Smith2014-03-211-4/+106
| | | | | | | | | | | | | | Read a raw binary profile that corresponds to a memory dump from the runtime profile. The test is a binary file generated from cfe/trunk/test/Profile/c-general.c with the new compiler-rt runtime and the matching text version of the input. It includes instructions on how to regenerate. <rdar://problem/15950346> llvm-svn: 204496
* ProfileData: Avoid brace initialization, windows doesn't like itJustin Bogner2014-03-211-1/+3
| | | | llvm-svn: 204494
* R600/SI: Move instruction patterns to scalar versions.Matt Arsenault2014-03-212-38/+45
| | | | | | | Some of them also had the pattern on both, so this removes the duplication. llvm-svn: 204492
* ProfileData: Introduce InstrProfWriter using the naive text formatJustin Bogner2014-03-213-0/+65
| | | | | | | | | | | This isn't a format we'll want to write out in practice, but moving it to the writer library simplifies llvm-profdata and isolates it from further changes to the format. This also allows us to update the tests to not rely on the text output format. llvm-svn: 204489
* ProfileData: Introduce the InstrProfReader interface and a text readerJustin Bogner2014-03-218-2/+186
| | | | | | | | | | This introduces the ProfileData library and updates llvm-profdata to use this library for reading profiles. InstrProfReader is an abstract base class that will be subclassed for both the raw instrprof data from compiler-rt and the efficient instrprof format that will be used for PGO. llvm-svn: 204482
* [mips] Correct lowering of VECTOR_SHUFFLE to VSHF.Daniel Sanders2014-03-211-1/+8
| | | | | | | | | | | | | | | | | | | | | Summary: VECTOR_SHUFFLE concatenates the vectors in an vectorwise fashion. <0b00, 0b01> + <0b10, 0b11> -> <0b00, 0b01, 0b10, 0b11> VSHF concatenates the vectors in a bitwise fashion: <0b00, 0b01> + <0b10, 0b11> -> 0b0100 + 0b1110 -> 0b01001110 <0b10, 0b11, 0b00, 0b01> We must therefore swap the operands to get the correct result. The test case that discovered the issue was MultiSource/Benchmarks/nbench. Reviewers: matheusalmeida Reviewed By: matheusalmeida Differential Revision: http://llvm-reviews.chandlerc.com/D3142 llvm-svn: 204480
* R600/SI: Handle MUBUF instructions in SIInstrInfo::moveToVALU()Tom Stellard2014-03-215-4/+150
| | | | llvm-svn: 204476
* R600/SI: Handle S_MOV_B64 in SIInstrInfo::moveToVALU()Tom Stellard2014-03-211-2/+50
| | | | llvm-svn: 204475
* R600/SI: Use SGPR_(32|64) reg clases when lowering SI_ADDR64_RSRCTom Stellard2014-03-211-4/+4
| | | | | | | | | | | | | | The SReg_(32|64) register classes contain special registers in addition to the numbered SGPRs. This can lead to machine verifier errors when these register classes are used as sub-registers for SReg_128, since SReg_128 only uses the numbered SGPRs. Replacing SReg_(32|64) with SGPR_(32|64) fixes this problem, since the SGPR_(32|64) register classes contain only numbered SGPRs. Tests cases for this are comming in a later commit. llvm-svn: 204474
* Sink: Don't sink static allocas from the entry blockTom Stellard2014-03-211-0/+7
| | | | | | | CodeGen treats allocas outside the entry block as dynamically sized stack objects. llvm-svn: 204473
* [SystemZ] Use "let Predicates =" for blocks of new instructionsRichard Sandiford2014-03-212-18/+15
| | | | | | | | | ...instead of a separate Requires for each one. This style was already used in some places and seems more compact. No behavioral change intended. llvm-svn: 204452
* [SystemZ] Add support for z196 float<->unsigned conversionsRichard Sandiford2014-03-212-5/+49
| | | | | | These complement the older float<->signed instructions. llvm-svn: 204451
* [mips] Update namespace.Matheus Almeida2014-03-211-5/+1
| | | | | | | We should be using the llvm namespace and not an anonymous namespace in a header file. llvm-svn: 204450
* [RuntimeDyld] Allow processRelocationRef to process more than one relocation ↵Juergen Ributzka2014-03-218-46/+66
| | | | | | | | | | | | | entry at a time. Some targets require more than one relocation entry to perform a relocation. This change allows processRelocationRef to process more than one relocation entry at a time by passing the relocation iterator itself instead of just the relocation entry. Related to <rdar://problem/16199095> llvm-svn: 204439
* [Constant Hoisting] Make the constant materialization cost operand dependentJuergen Ributzka2014-03-213-30/+47
| | | | | | | | | Extend the target hook to take also the operand index into account when calculating the cost of the constant materialization. Related to <rdar://problem/16381500> llvm-svn: 204435
* [Constant Hoisting] Lazily compute the idom and cache the result.Juergen Ributzka2014-03-211-4/+43
| | | | | | Related to <rdar://problem/16381500> llvm-svn: 204434
* [Constant Hoisting] Change the algorithm to only track constants for ↵Juergen Ributzka2014-03-211-239/+321
| | | | | | | | | | | | | | | | | | | | | | | | instructions. Originally the algorithm would search for expensive constants and track their users, which could be instructions and constant expressions. This change only tracks the constants for instructions, but constant expressions are indirectly covered too. If an operand is an constant expression, then we look through the expression to find anny expensive constants. The algorithm keep now track of the instruction and the operand index where the constant is used. This allows more precise hoisting of constant materialization code for PHI instructions, because we only hoist to the basic block of the incoming operand. Before we had to find the idom of all PHI operands and hoist the materialization code there. This also makes updating of instructions easier. Before we had to keep track of the original constant, find it in the instructions, and then replace it. Now we can just simply update the operand. Related to <rdar://problem/16381500> llvm-svn: 204433
* [Constant Hoisting] Fix capitalization of function names.Juergen Ributzka2014-03-211-33/+34
| | | | llvm-svn: 204432
* [Constant Hoisting] Replace the MapVector with a separate Map and Vector to ↵Juergen Ributzka2014-03-211-38/+51
| | | | | | | | | | | keep track of constant candidates. This simplifies working with the constant candidates and removes the tight coupling between the map and the vector. Related to <rdar://problem/16381500> llvm-svn: 204431
* MCParser: add an assertionSaleem Abdulrasool2014-03-211-1/+3
| | | | | | | Add an assertion that the section is not NULL. Potential NULL pointer dereference identified by clang static analyzer. llvm-svn: 204429
* This reverts commit r203762, "ARM: support emission of complex SO expressions".Jiangning Liu2014-03-211-14/+2
| | | | | | The commit r203762 introduced silent failure for complext SO expression, and it's even worse than compiler crash. llvm-svn: 204427
* [Support] Make sure LockFileManager works correctly with relative paths.Argyrios Kyrtzidis2014-03-211-1/+3
| | | | llvm-svn: 204426
* Fix an assertion caused by using inline asm with indirect register inputs.Kevin Qin2014-03-211-1/+1
| | | | llvm-svn: 204425
* [AArch64] Remove .data_region directive from AArch64.Kevin Qin2014-03-211-2/+0
| | | | | | | | | .data_region is only used in Darwin, so it shouldn't be generated for other OS. Currently AArch64 doesn't support darwin yet, so I removed it from AArch64. When Darwin is supported someday, we can add it back and associate it with Darwin. llvm-svn: 204424
* [Support] Make sure sys::fs::remove can remove symbolic links and make sure ↵Argyrios Kyrtzidis2014-03-212-8/+5
| | | | | | LockFileManager can handle a symbolic link that points nowhere. llvm-svn: 204422
* Object/COFF: Support large relocation table.Rui Ueyama2014-03-211-11/+32
| | | | | | | | | | | | | | | | NumberOfRelocations field in COFF section table is only 16-bit wide. If an object has more than 65535 relocations, the number of relocations is stored to VirtualAddress field in the first relocation field, and a special flag (IMAGE_SCN_LNK_NRELOC_OVFL) is set to Characteristics field. In test we cheated a bit. I made up a test file so that it has IMAGE_SCN_LNK_NRELOC_OVFL flag but the number of relocations is much smaller than 65535. This is to avoid checking in a large test file just to test a file with many relocations. Differential Revision: http://llvm-reviews.chandlerc.com/D3139 llvm-svn: 204418
* Fix PR19136: [ARM] Fix Folding SP Update into vpush/vpopWeiming Zhao2014-03-201-3/+13
| | | | | | | | | | | Sicne MBB->computeRegisterLivenes() returns Dead for sub regs like s0, d0 is used in vpop instead of updating sp, which causes s0 dead before its use. This patch checks the liveness of each subreg to make sure the reg is actually dead. llvm-svn: 204411
* Don't use EmitAbsValue with symbol references.Rafael Espindola2014-03-202-6/+6
| | | | | | | | | | | | | | | The function exists to force an expression to be absolute, but there it is not possible to force a symbol reference since a = b .long a means something else. This is an alternative fix for pr9951 that uses an assert. It then deletes the old pr9951 test that was testing nothing already. llvm-svn: 204399
* Add an option to MCJIT to have it forward all sections to theLang Hames2014-03-203-17/+44
| | | | | | | | | | | | | | | | | | | | | | RTDyldMemoryManager, regardless of whether it thinks they're "required for execution". Currently, RuntimeDyld only passes sections that are "required for execution" to the RTDyldMemoryManager, and takes "required for execution" to mean exactly "contains symbols or relocations". There are two problems with this: (1) It can drop sections with anonymous data that is referenced by code. (2) It leaves the JIT client no way to inspect interesting sections that aren't actually required to run the program (e.g dwarf sections). A test case is still in the works. Future work: We may want to replace this with a generic section filtering mechanism, but that will require more consideration. For now, this flag at least allows clients to volunteer to do the filtering themselves. Fixes <rdar://problem/15177691>. llvm-svn: 204398
* Revert "[Constant Hoisting] Extend coverage of the constant hoisting pass."Juergen Ributzka2014-03-203-431/+282
| | | | | | I will break this up into smaller pieces for review and recommit. llvm-svn: 204393
* [Constant Hoisting] Extend coverage of the constant hoisting pass.Juergen Ributzka2014-03-203-282/+431
| | | | | | | | | This commit extends the coverage of the constant hoisting pass, adds additonal debug output and updates the function names according to the style guide. Related to <rdar://problem/16381500> llvm-svn: 204389
* Remove LowerInvoke's obsolete "-enable-correct-eh-support" optionMark Seaborn2014-03-202-508/+9
| | | | | | | | | | | | | | | This option caused LowerInvoke to generate code using SJLJ-based exception handling, but there is no code left that interprets the jmp_buf stack that the resulting code maintained (llvm.sjljeh.jblist). This option has been obsolete for a while, and replaced by SjLjEHPrepare. This leaves the default behaviour of LowerInvoke, which is to convert invokes to calls. Differential Revision: http://llvm-reviews.chandlerc.com/D3136 llvm-svn: 204388
* Typo.Eric Christopher2014-03-201-1/+1
| | | | llvm-svn: 204378
* Reapply DW_AT_low/high_pc patch:Eric Christopher2014-03-204-81/+141
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the range machinery for DW_AT_ranges and DW_AT_high/lo_pc. This commit moves us from a single range per subprogram to extending ranges if we are: a) In the same section, and b) In the same enclosing CU. This means we have more fine grained ranges for compile units, and fewer ranges overall when we have multiple functions in the same CU adjacent to each other in the object file. Also remove all of the earlier hacks around this functionality for function sections etc. Also update all of the testcases to take into account the merging functionality. with a fix for location entries in the debug_loc section: Make sure that debug loc entries are relative to the low_pc of the compile unit. This means that when we only have a single range that the offset should be just relative to the low_pc of the unit, for multiple ranges for a CU this means that we'll be relative to 0 which we emit along with DW_AT_ranges. This mostly shows up with linked binaries, so add a testcase with multiple CUs so that our location is going to be offset of a CU with a non-zero low_pc. llvm-svn: 204377
* Remove dead and incorrect code.Rafael Espindola2014-03-201-14/+1
| | | | | | is_symlink was always false since it was using stat instead of lstat. llvm-svn: 204361
* Add comments from Eric's review of r204094.David Blaikie2014-03-201-0/+5
| | | | llvm-svn: 204358
* R600: Remove unused method declaration.Matt Arsenault2014-03-201-6/+0
| | | | llvm-svn: 204357
* [MIPS] Add cpu octeon and some instructionsKai Nacke2014-03-2010-6/+118
| | | | | | | | | | The Octeon cpu from Cavium Networks is mips64r2 based and has an extended instruction set. In order to utilize this with LLVM, a new cpu feature "octeon" and a subtarget feature "cnmips" is added. A small set of new instructions (baddu, dmul, pop, dpop, seq, sne) is also added. LLVM generates dmul, pop and dpop instructions with option -mcpu=octeon or -mattr=+cnmips. llvm-svn: 204337
* [ASan] Do not instrument globals from the llvm.metadata section.Alexander Potapenko2014-03-201-0/+2
| | | | | | Fixes https://code.google.com/p/address-sanitizer/issues/detail?id=279. llvm-svn: 204331
* Provide an operand for microMIPS wait instruction.Zoran Jovanovic2014-03-203-5/+18
| | | | llvm-svn: 204329
* Implementation of microMIPS 16-bit instructions MOVE and JALR.Zoran Jovanovic2014-03-207-10/+117
| | | | | | Differential Revision: http://llvm-reviews.chandlerc.com/D3112 llvm-svn: 204325
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