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* [MC][COFF] Emit weak symbols to the correct section. Patch by Dmitry Puzirev!Michael J. Spencer2012-11-131-2/+13
| | | | llvm-svn: 167877
* Add (some) PowerPC TLS relocation types to ELF.h andUlrich Weigand2012-11-131-2/+18
| | | | | | | generate them from PPCELFObjectWriter::getRelocTypeInner as appropriate. llvm-svn: 167864
* Fix wrong PowerPC instruction opcodes for:Ulrich Weigand2012-11-132-4/+4
| | | | | | | | - lwaux - lhzux - stbu llvm-svn: 167863
* Fix wrong PowerPC instruction encodings due toUlrich Weigand2012-11-132-10/+10
| | | | | | | | | operand field name mismatches in: - AForm_3 (fmul, fmuls) - XFXForm_5 (mtcrf) - XFLForm (mtfsf) llvm-svn: 167862
* Fix instruction encoding for "bd(n)z" on PowerPC,Ulrich Weigand2012-11-133-14/+15
| | | | | | by using a new instruction format BForm_1. llvm-svn: 167861
* Fix instruction encoding for "isel" on PowerPC,Ulrich Weigand2012-11-133-2/+22
| | | | | | using a new instruction format AForm_4. llvm-svn: 167860
* X86: when constructing VZEXT_LOAD from other loads, makes sure its outputManman Ren2012-11-131-0/+12
| | | | | | | | | | | chain is correctly setup. As an example, if the original load must happen before later stores, we need to make sure the constructed VZEXT_LOAD is constrained to be before the stores. rdar://12684358 llvm-svn: 167859
* Do not consider a machine instruction that uses and defines the sameUlrich Weigand2012-11-131-16/+44
| | | | | | | | | | physical register as candidate for common subexpression elimination in MachineCSE. This fixes a bug on PowerPC in MultiSource/Applications/oggenc/oggenc caused by MachineCSE invalidly merging two separate DYNALLOC insns. llvm-svn: 167855
* Adding changes to support GNU style archive library readingShankar Easwaran2012-11-131-26/+118
| | | | llvm-svn: 167853
* Fix -join-splitedges: my previous "cleanup" broke it.Andrew Trick2012-11-131-1/+1
| | | | | | | Working on reducing unit tests. This won't be enabled unless a subtarget enables misched. llvm-svn: 167851
* Revert 167755/167760. We don't want to emit crash diagnostics on ↵Chad Rosier2012-11-131-4/+1
| | | | | | command-line syntax errors. llvm-svn: 167849
* Codegen support for arbitrary vector getelementptrs.Duncan Sands2012-11-131-3/+3
| | | | llvm-svn: 167830
* Relax the restrictions on vector of pointer types, and vector getelementptr.Duncan Sands2012-11-136-57/+81
| | | | | | | | | | | | | | | Previously in a vector of pointers, the pointer couldn't be any pointer type, it had to be a pointer to an integer or floating point type. This is a hassle for dragonegg because the GCC vectorizer happily produces vectors of pointers where the pointer is a pointer to a struct or whatever. Vector getelementptr was restricted to just one index, but now that vectors of pointers can have any pointer type it is more natural to allow arbitrary vector getelementptrs. There is however the issue of struct GEPs, where if each lane chose different struct fields then from that point on each lane will be working down into unrelated types. This seems like too much pain for too little gain, so when you have a vector struct index all the elements are required to be the same. llvm-svn: 167828
* DependenceAnalysis: Print all dependency pairs when dumping. Update all ↵Benjamin Kramer2012-11-131-8/+5
| | | | | | | | testcases. Part of a patch by Preston Briggs. llvm-svn: 167827
* misched: Allow subtargets to enable misched and dependent options.Andrew Trick2012-11-135-14/+47
| | | | | | | | | | | | This allows me to begin enabling (or backing out) misched by default for one subtarget at a time. To run misched we typically want to: - Disable SelectionDAG scheduling (use the source order scheduler) - Enable more aggressive coalescing (until we decide to always run the coalescer this way) - Enable MachineScheduler pass itself. Disabling PostRA sched may follow for some subtargets. llvm-svn: 167826
* Added RegisterCoalescer support for joining global copies first.Andrew Trick2012-11-131-20/+80
| | | | | | | | | | | | This adds the -join-globalcopies option which can be enabled by default once misched is also enabled. Ideally, the register coalescer would be able to split local live ranges in a way that produces copies that can be easily resolved by the scheduler. Until then, this heuristic should be good enough to at least allow the scheduler to run after coalescing. llvm-svn: 167825
* Figure out <size> argument of llvm.lifetime intrinsics at the moment they ↵Alexey Samsonov2012-11-131-2/+21
| | | | | | are created (during function inlining) llvm-svn: 167821
* Test commit.Jyotsna Verma2012-11-131-0/+1
| | | | | | Add a blank line. llvm-svn: 167819
* BBVectorize: Remove temporary assert used for debuggingHal Finkel2012-11-131-1/+0
| | | | llvm-svn: 167817
* instcombine: Migrate math library call simplificationsMeador Inge2012-11-133-252/+270
| | | | | | | | | | | | | | | | | This patch migrates the math library call simplifications from the simplify-libcalls pass into the instcombine library call simplifier. I have typically migrated just one simplifier at a time, but the math simplifiers are interdependent because: 1. CosOpt, PowOpt, and Exp2Opt all depend on UnaryDoubleFPOpt. 2. CosOpt, PowOpt, Exp2Opt, and UnaryDoubleFPOpt all depend on the option -enable-double-float-shrink. These two factors made migrating each of these simplifiers individually more of a pain than it would be worth. So, I migrated them all together. llvm-svn: 167815
* BBVectorize: Don't vectorize vector-manipulation chainsHal Finkel2012-11-131-0/+17
| | | | | | | | Don't choose a vectorization plan containing only shuffles and vector inserts/extracts. Due to inperfections in the cost model, these can lead to infinite recusion. llvm-svn: 167811
* Revert r167759. Ben is right this isn't likely to help much.Evan Cheng2012-11-131-4/+2
| | | | llvm-svn: 167809
* misched: Don't consider artificial edges weak edges.Andrew Trick2012-11-132-9/+5
| | | | | | | For now be more conservative in case other out-of-tree schedulers rely on the old behavior of artificial edges. llvm-svn: 167808
* Use the 'count' attribute instead of the 'upper_bound' attribute.Bill Wendling2012-11-132-3/+6
| | | | | | | | | If we have a type 'int a[1]' and a type 'int b[0]', the generated DWARF is the same for both of them because we use the 'upper_bound' attribute. Instead use the 'count' attrbute, which gives the correct number of elements in the array. <rdar://problem/12566646> llvm-svn: 167806
* Cleanup the main RegisterCoalescer loop.Andrew Trick2012-11-131-23/+10
| | | | | | Block priorities still apply outside loops. llvm-svn: 167793
* revert r167740Shuxin Yang2012-11-131-314/+8
| | | | llvm-svn: 167787
* Cleanup -join-splitedges. Make the loop more obvious.Andrew Trick2012-11-121-5/+2
| | | | llvm-svn: 167785
* BBVectorize: Only some insert element operand pairs are free.Hal Finkel2012-11-121-13/+17
| | | | | | | | This fixes another infinite recursion case when using target costs. We can only replace insert element input chains that are pure (end with inserting into an undef). llvm-svn: 167784
* Add an option to enable prototype "fission" capabilities and debug changes.Eric Christopher2012-11-122-0/+16
| | | | llvm-svn: 167765
* Cache size of PassVector to speed up getNumContainedPasses().Evan Cheng2012-11-121-2/+4
| | | | | | | | getNumContainedPasses() used to compute the size of the vector on demand. It is called repeated in loops (such as runOnFunction()) and it can be updated while inside the loop. llvm-svn: 167759
* Added a temporary option to avoid critical edges splitting.Andrew Trick2012-11-121-16/+55
| | | | | | | | | This teaches the register coalescer to be less prone to split critical edges. I am currently benchmarking this with the new (post-coalescer) scheduler. I plan to enable this by default and remove the option as soon as misched is enabled. llvm-svn: 167758
* Rewrite DIContext interface to take an object. Update all callers.Eric Christopher2012-11-124-59/+105
| | | | llvm-svn: 167757
* Revert r167620; this can be implemented using an existing CL option.Chad Rosier2012-11-121-1/+4
| | | | llvm-svn: 167755
* misched: rename interfaceto avoid gcc warningsAndrew Trick2012-11-121-2/+1
| | | | llvm-svn: 167753
* BBVectorize: Use a more sophisticated check for input costHal Finkel2012-11-121-14/+43
| | | | | | | | | The old checking code, which assumed that input shuffles and insert-elements could always be folded (and thus were free) is too simple. This can only happen in special circumstances. Using the simple check caused infinite recursion. llvm-svn: 167750
* misched: Target-independent support for MacroFusion.Andrew Trick2012-11-121-5/+61
| | | | | | | | | Uses the infrastructure from r167742 to support clustering instructure that the target processor can "fuse". e.g. cmp+jmp. Next step: target hook implementations with test cases, and enable. llvm-svn: 167744
* BBVectorize: Check the types of compare instructionsHal Finkel2012-11-121-0/+2
| | | | | | | The pass would previously assert when trying to compute the cost of compare instructions with illegal vector types (like struct pointers). llvm-svn: 167743
* misched: Target-independent support for load/store clustering.Andrew Trick2012-11-122-12/+182
| | | | | | | | | | This infrastructure is generally useful for any target that wants to strongly prefer two instructions to be adjacent after scheduling. A following checkin will add target-specific hooks with unit tests. Then this feature will be enabled by default with misched. llvm-svn: 167742
* This change is to fix rdar://12571717 which is about assertion in ↵Shuxin Yang2012-11-121-8/+314
| | | | | | | | | | | | | | | | | | Reassociate pass. The assertion is trigged when the Reassociater tries to transform expression ... + 2 * n * 3 + 2 * m + ... into: ... + 2 * (n*3 + m). In the process of the transformation, a helper routine folds the constant 2*3 into 6, confusing optimizer which is trying the to eliminate the common factor 2, and cannot find 2 any more. Review is pending. But I'd like commit first in order to help those who are waiting for this fix. llvm-svn: 167740
* misched: Infrastructure for weak DAG edges.Andrew Trick2012-11-126-45/+100
| | | | | | | | This adds support for weak DAG edges to the general scheduling infrastructure in preparation for MachineScheduler support for heuristics based on weak edges. llvm-svn: 167738
* Make TOC order deterministic by using MapVector instead of DenseMap.Ulrich Weigand2012-11-121-3/+3
| | | | llvm-svn: 167737
* BBVectorize: Check the input types of shuffles for legalityHal Finkel2012-11-121-3/+6
| | | | | | | | | | This fixes a bug where shuffles were being fused such that the resulting input types were not legal on the target. This would occur only when both inputs and dependencies were also foldable operations (such as other shuffles) and there were other connected pairs in the same block. llvm-svn: 167731
* [ASan] fixup for r167725: Don't fetch name of StructType if it is literalAlexey Samsonov2012-11-121-2/+3
| | | | llvm-svn: 167729
* Fixup for r167558: Store raw pointer (instead of reference) to RelocMap in ↵Alexey Samsonov2012-11-123-20/+28
| | | | | | DIContext. This is needed to prevent crashes because of dangling reference if the clients don't provide RelocMap to DIContext constructor. llvm-svn: 167728
* Normalize memcmp constant folding results.Meador Inge2012-11-121-1/+8
| | | | | | | | | | | | | | | | | | | The library call simplifier folds memcmp calls with all constant arguments to a constant. For example: memcmp("foo", "foo", 3) -> 0 memcmp("hel", "foo", 3) -> 1 memcmp("foo", "hel", 3) -> -1 The folding is implemented in terms of the system memcmp that LLVM gets linked with. It currently just blindly uses the value returned from the system memcmp as the folded constant. This patch normalizes the values returned from the system memcmp to (-1, 0, 1) so that we get consistent results across multiple platforms. The test cases were adjusted accordingly. llvm-svn: 167726
* [ASan]: Add minimalistic support for turning off initialization-order ↵Alexey Samsonov2012-11-122-2/+16
| | | | | | checking for globals of specified types. Tests for this behavior will go to ASan test suite in compiler-rt. llvm-svn: 167725
* Remove unused field.Eric Christopher2012-11-121-1/+0
| | | | llvm-svn: 167719
* Fix PR14314Michael Liao2012-11-121-2/+2
| | | | | | | - Fix operand order for atomic sub, where the minuend is the value loaded from memory and the subtrahend is the parameter specified. llvm-svn: 167718
* [NVPTX] Add more precise PTX/SM target attributesJustin Holewinski2012-11-124-11/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each SM and PTX version is modeled as a subtarget feature/CPU. Additionally, PTX 3.1 is added as the default PTX version to be out-of-the-box compatible with CUDA 5.0. Available CPUs for this target: sm_10 - Select the sm_10 processor. sm_11 - Select the sm_11 processor. sm_12 - Select the sm_12 processor. sm_13 - Select the sm_13 processor. sm_20 - Select the sm_20 processor. sm_21 - Select the sm_21 processor. sm_30 - Select the sm_30 processor. sm_35 - Select the sm_35 processor. Available features for this target: ptx30 - Use PTX version 3.0. ptx31 - Use PTX version 3.1. sm_10 - Target SM 1.0. sm_11 - Target SM 1.1. sm_12 - Target SM 1.2. sm_13 - Target SM 1.3. sm_20 - Target SM 2.0. sm_21 - Target SM 2.1. sm_30 - Target SM 3.0. sm_35 - Target SM 3.5. llvm-svn: 167699
* Delete a stale comment. No functional change.Meador Inge2012-11-121-4/+0
| | | | llvm-svn: 167698
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