summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Collapse)AuthorAgeFilesLines
* R600/SI: Update instruction conversions for VIMarek Olsak2014-12-073-1/+48
| | | | | | | | | There are 3 changes: - Convert 32-bit S_LSHL/LSHR/ASHR to their V_*REV variants for VI - Lower RSQ_CLAMP for VI - Don't generate MIN/MAX_LEGACY on VI llvm-svn: 223604
* R600/SI: Add VI instructionsMarek Olsak2014-12-0712-651/+1439
| | | | llvm-svn: 223603
* R600/SI: Add SCC Defs/Uses to SOP1 and SOP2 opcodesMarek Olsak2014-12-071-28/+49
| | | | llvm-svn: 223602
* Turn some DenseMaps that are only used for set operations into DenseSets.Benjamin Kramer2014-12-063-17/+14
| | | | | | DenseSet has better memory efficiency now. llvm-svn: 223589
* Make the DenseMap bucket type configurable and use a smaller bucket for ↵Benjamin Kramer2014-12-061-1/+1
| | | | | | | | | | | | | | DenseSet. DenseSet used to be implemented as DenseMap<Key, char>, which usually doubled the memory footprint of the map. Now we use a compressed set so the second element uses no memory at all. This required some surgery on DenseMap as all accesses to the bucket now have to go through methods; this should have no impact on the behavior of DenseMap though. The new default bucket type for DenseMap is a slightly extended std::pair as we expose it through DenseMap's iterator and don't want to break any existing users. llvm-svn: 223588
* Reapply "LLVMContext: Store APInt/APFloat directly into the ConstantInt/FP ↵Benjamin Kramer2014-12-062-49/+30
| | | | | | | | DenseMaps." This reapplies r223478 with a fix for 32 bit targets. llvm-svn: 223586
* ConstantFold: Don't optimize comparisons with weak linkage objectsDavid Majnemer2014-12-061-1/+4
| | | | | | | | | | | | Consider: void f() {} void __attribute__((weak)) g() {} bool b = &f != &g; It's possble for g to resolve to f if --defsym=g=f is passed on to the linker. llvm-svn: 223585
* I didn't intend to commit this change.David Majnemer2014-12-061-1/+1
| | | | llvm-svn: 223584
* InstSimplify: Optimize away useless unsigned comparisonsDavid Majnemer2014-12-062-1/+50
| | | | | | Code like X < Y && Y == 0 should always be folded away to false. llvm-svn: 223583
* Reformat.NAKAMURA Takumi2014-12-062-29/+21
| | | | llvm-svn: 223580
* R600/SI: Restore PrivateGlobalPrefix to the default ELF value of ".L"Tom Stellard2014-12-061-1/+0
| | | | | | This was changed in r223323. llvm-svn: 223579
* IR: Disallow function-local metadata attachmentsDuncan P. N. Exon Smith2014-12-063-2/+12
| | | | | | | | Metadata attachments to instructions cannot be function-local. This is part of PR21532. llvm-svn: 223574
* LLVMInstrumentation requires MC since r223532.NAKAMURA Takumi2014-12-061-1/+1
| | | | llvm-svn: 223573
* [X86] Refactor PMOV[SZ]Xrm to add missing AVX2 patterns.Ahmed Bougacha2014-12-062-531/+226
| | | | | | | | Most patterns will go away once the extload legalization changes land. Differential Revision: http://reviews.llvm.org/D6125 llvm-svn: 223567
* SelectionDAG switch lowering: Replace unreachable default with most popular ↵Hans Wennborg2014-12-061-17/+40
| | | | | | | | | | | | | | | | | | case. This can significantly reduce the size of the switch, allowing for more efficient lowering. I also worked with the idea of exploiting unreachable defaults by omitting the range check for jump tables, but always ended up with a non-neglible binary size increase. It might be worth looking into some more. SimplifyCFG currently does this transformation, but I'm working towards changing that so we can optimize harder based on unreachable defaults. Differential Revision: http://reviews.llvm.org/D6510 llvm-svn: 223566
* IR: Disallow complicated function-local metadataDuncan P. N. Exon Smith2014-12-063-54/+70
| | | | | | | | | | Disallow complex types of function-local metadata. The only valid function-local metadata is an `MDNode` whose sole argument is a non-metadata function-local value. Part of PR21532. llvm-svn: 223564
* Utils: Style cleanups, NFCDuncan P. N. Exon Smith2014-12-061-7/+7
| | | | llvm-svn: 223556
* Utils: Avoid RAUW on metadata in CloneFunction()Duncan P. N. Exon Smith2014-12-061-4/+4
| | | | llvm-svn: 223555
* Canonicalize multiplies by looking at whether the operands have any ↵Nick Lewycky2014-12-061-5/+26
| | | | | | constants themselves. Patch by Tim Murray! llvm-svn: 223554
* AArch64: use explicit MVT::i64 when creating EXTRACT_SUBVECTOR nodes.Tim Northover2014-12-061-10/+12
| | | | | | | | | All our patterns use MVT::i64, but the ISelLowering nodes were inconsistent in their choice. No functional change. llvm-svn: 223551
* Revert "LLVMContext: Store APInt/APFloat directly into the ConstantInt/FP ↵Benjamin Kramer2014-12-062-24/+56
| | | | | | | | | DenseMaps." Somehow made DenseMap probe on forever on 32 bit machines. This reverts commit r223478. llvm-svn: 223546
* [X86] Cleanup FCOPYSIGN lowering. NFC intended.Ahmed Bougacha2014-12-051-29/+15
| | | | llvm-svn: 223542
* Recommit of r223513 and r223514.Kuba Brecka2014-12-051-34/+48
| | | | | | Reviewed at http://reviews.llvm.org/D6488 llvm-svn: 223532
* [Hexagon] Relocating logical instructions and templates later in the td file.Colin LeMahieu2014-12-051-116/+115
| | | | llvm-svn: 223523
* [Hexagon] Adding sub/and/or reg, imm formsColin LeMahieu2014-12-051-29/+56
| | | | llvm-svn: 223522
* Remove dead code. We are only lazy about functions with bodies.Rafael Espindola2014-12-051-7/+1
| | | | llvm-svn: 223521
* Reverting r223513 and r223514.Kuba Brecka2014-12-051-48/+34
| | | | llvm-svn: 223520
* Optimize merging of scalar loads for 32-byte vectors [X86, AVX]Sanjay Patel2014-12-051-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the poor codegen seen in PR21710 ( http://llvm.org/bugs/show_bug.cgi?id=21710 ). Before we crack 32-byte build vectors into smaller chunks (and then subsequently glue them back together), we should look for the easy case where we can just load all elements in a single op. An example of the codegen change is: From: vmovss 16(%rdi), %xmm1 vmovups (%rdi), %xmm0 vinsertps $16, 20(%rdi), %xmm1, %xmm1 vinsertps $32, 24(%rdi), %xmm1, %xmm1 vinsertps $48, 28(%rdi), %xmm1, %xmm1 vinsertf128 $1, %xmm1, %ymm0, %ymm0 retq To: vmovups (%rdi), %ymm0 retq Differential Revision: http://reviews.llvm.org/D6536 llvm-svn: 223518
* [DFSAN][MIPS][LLVM] Defining ShadowPtrMask variable for MIPS64Peter Collingbourne2014-12-051-1/+12
| | | | | | | | | | | Patch by Kumar Sukhani! corresponding compiler-rt patch: http://reviews.llvm.org/D6437 clang patch: http://reviews.llvm.org/D6147 Differential Revision: http://reviews.llvm.org/D6459 llvm-svn: 223516
* [Hexagon] Updating mux_ir/ri/ii/rr with encoding bitsColin LeMahieu2014-12-054-46/+78
| | | | llvm-svn: 223515
* AddressSanitizer - Don't instrument globals from cstring_literals sections. ↵Kuba Brecka2014-12-051-34/+48
| | | | | | | | (llvm part) Reviewed at http://reviews.llvm.org/D6488 llvm-svn: 223513
* Simplify the loop linking function bodies. NFC.Rafael Espindola2014-12-051-37/+21
| | | | llvm-svn: 223512
* Use 32-bit ebp for NaCl64 in a limited case: llvm.frameaddress.Jan Wen Voung2014-12-054-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Follow up to [x32] "Use ebp/esp as frame and stack pointer": http://reviews.llvm.org/D4617 In that earlier patch, NaCl64 was made to always use rbp. That's needed for most cases because rbp should hold a full 64-bit address within the NaCl sandbox so that load/stores off of rbp don't require sandbox adjustment (zeroing the top 32-bits, then filling those by adding r15). However, llvm.frameaddress returns a pointer and pointers are 32-bit for NaCl64. In this case, use ebp instead, which will make the register copy type check. A similar mechanism may be needed for llvm.eh.return, but is not added in this change. Test Plan: test/CodeGen/X86/frameaddr.ll Reviewers: dschuff, nadav Subscribers: jfb, llvm-commits Differential Revision: http://reviews.llvm.org/D6514 llvm-svn: 223510
* [PowerPC]Add VSX loads/stores to fastisel for PPC targetBill Seurer2014-12-051-4/+36
| | | | | | | | | | This patch adds VSX floating point loads and stores to fastisel. Along with the change to tablegen (D6220), VSX instructions are now fully supported in fastisel. http://reviews.llvm.org/D6274 llvm-svn: 223507
* [Hexagon] Adding tfrih/l instructions.Colin LeMahieu2014-12-051-0/+22
| | | | llvm-svn: 223506
* [X86] Improved lowering of packed vector shifts to vpsllq/vpsrlq.Andrea Di Biagio2014-12-051-10/+17
| | | | | | | | | | | | | | SSE2/AVX non-constant packed shift instructions only use the lower 64-bit of the shift count. This patch teaches function 'getTargetVShiftNode' how to deal with shifts where the shift count node is of type MVT::i64. Before this patch, function 'getTargetVShiftNode' only knew how to deal with shift count nodes of type MVT::i32. This forced the backend to wrongly truncate the shift count to MVT::i32, and then zero-extend it back to MVT::i64. llvm-svn: 223505
* [Hexagon] Adding add reg, imm form with encoding bits and test.Colin LeMahieu2014-12-051-42/+80
| | | | llvm-svn: 223504
* Remove unused arguments. NFC.Rafael Espindola2014-12-051-9/+7
| | | | llvm-svn: 223503
* These two calls were grabbing the same register info. Unify them.Eric Christopher2014-12-051-3/+2
| | | | llvm-svn: 223502
* BFI: Saturate when combining edges to a successorDuncan P. N. Exon Smith2014-12-051-4/+17
| | | | | | | | | | | | When a loop gets bundled up, its outgoing edges are quite large, and can just barely overflow 64-bits. If one successor has multiple incoming edges -- and that successor is getting all the incoming mass -- combining just its edges can overflow. Handle that by saturating rather than asserting. This fixes PR21622. llvm-svn: 223500
* [Hexagon] Adding DoubleRegs decoder. Moving C2_mux and A2_nop. Adding ↵Colin LeMahieu2014-12-053-10/+60
| | | | | | combine imm-imm form. llvm-svn: 223494
* Fix a bug when pretty-printing DW_OP_deref.Adrian Prantl2014-12-051-0/+3
| | | | llvm-svn: 223493
* [CodeGenPrepare] Use variables for reused values. NFC.Ahmed Bougacha2014-12-051-4/+6
| | | | llvm-svn: 223491
* [Hexagon] [NFC] Rearranging patterns and mux instruction.Colin LeMahieu2014-12-051-38/+38
| | | | llvm-svn: 223488
* [Hexagon] [NFC] Rearranging def order.Colin LeMahieu2014-12-051-28/+27
| | | | llvm-svn: 223487
* Refactor duplicated code. NFC.Rafael Espindola2014-12-051-26/+16
| | | | llvm-svn: 223486
* [Hexagon] Adding combine reg-reg forms.Colin LeMahieu2014-12-051-1/+14
| | | | llvm-svn: 223485
* [Hexagon] Marking several instructions as isCodeGenOnly=0 and adding direct ↵Colin LeMahieu2014-12-051-2/+3
| | | | | | disassembly tests for many instructions. llvm-svn: 223482
* LLVMContext: Store APInt/APFloat directly into the ConstantInt/FP DenseMaps.Benjamin Kramer2014-12-052-56/+24
| | | | | | | | Required some APInt massaging to get proper empty/tombstone values. Apart from making the code a bit simpler this also reduces the bucket size of the ConstantInt map from 32 to 24 bytes. llvm-svn: 223478
* Small cleanup on how we clear constant variables. NFC.Rafael Espindola2014-12-051-14/+9
| | | | llvm-svn: 223474
OpenPOWER on IntegriCloud