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* [LICM] Report successful hoist/sink/promotionAdam Nemet2017-01-111-19/+45
| | | | | | Differential Revision: https://reviews.llvm.org/D27938 llvm-svn: 291646
* [DAGCombiner] Teach DAG combiner to fold (vselect (N0 xor AllOnes), N1, N2) ↵Craig Topper2017-01-111-0/+9
| | | | | | -> (vselect N0, N2, N1). Only do this if the target indicates its vector boolean type is ZeroOrNegativeOneBooleanContent. llvm-svn: 291645
* DAGCombiner: Add hasOneUse checks to fadd/fma combineMatt Arsenault2017-01-111-3/+6
| | | | | | | | Even with aggressive fusion enabled, this requires duplicating the fmul, or increases an fadd to another fma which is not an improvement. llvm-svn: 291642
* [Target] Fix some Clang-tidy modernize and Include What You Use warnings; ↵Eugene Zelenko2017-01-112-14/+46
| | | | | | other minor fixes (NFC). llvm-svn: 291641
* Re-commit r289955: [X86] Fold (setcc (cmp (atomic_load_add x, -C) C), COND) ↵Hans Wennborg2017-01-111-10/+22
| | | | | | | | | | | | | to (setcc (LADD x, -C), COND) (PR31367) This was reverted because it would miscompile code where the cmp had multiple uses. That was due to a deficiency in the existing code, which was fixed in r291630 (see the PR for details). This re-commit includes an extra test for the kind of code that got miscompiled: @test_sub_1_setcc_jcc. llvm-svn: 291640
* InstSimplify: Refactor function to use more switchesMatt Arsenault2017-01-111-38/+51
| | | | llvm-svn: 291634
* [X86] Dont run combineSetCCAtomicArith() when the cmp has multiple usesHans Wennborg2017-01-111-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We would miscompile the following: void g(int); int f(volatile long long *p) { bool b = __atomic_fetch_add(p, 1, __ATOMIC_SEQ_CST) < 0; g(b ? 12 : 34); return b ? 56 : 78; } into pushq %rax lock incq (%rdi) movl $12, %eax movl $34, %edi cmovlel %eax, %edi callq g(int) testq %rax, %rax <---- Bad. movl $56, %ecx movl $78, %eax cmovsl %ecx, %eax popq %rcx retq because the code failed to take into account that the cmp has multiple uses, replaced one of them, and left the other one comparing garbage. llvm-svn: 291630
* [RegBankSelect] Improve the output of the debug messages.Quentin Colombet2017-01-111-7/+32
| | | | | | Add more information about mapping cost and chosen solution. llvm-svn: 291629
* [CodeView/PDB] Rename a bunch of files.Zachary Turner2017-01-114-11/+8
| | | | | | | | | | | We were starting to get some name clashes between llvm-pdbdump and the common CodeView framework, so I took this opportunity to rename a bunch of files to more accurately describe their usage. This also helps in llvm-pdbdump to distinguish between different files and whether they are used for pretty dump mode or raw dump mode. llvm-svn: 291627
* [CodeView] Add TypeDatabase class.Zachary Turner2017-01-115-226/+442
| | | | | | | | | | | | | | This creates a centralized class in which to store type records. It stores types as an array of entries, which matches the notion of a type stream being a topologically sorted DAG. Logic to build up such a database was already being used in CVTypeDumper, so CVTypeDumper is now updated to to read from a TypeDatabase which is filled out by an earlier visitor in the pipeline. Differential Revision: https://reviews.llvm.org/D28486 llvm-svn: 291626
* InstSimplify: Eliminate fabs on known positiveMatt Arsenault2017-01-112-22/+64
| | | | llvm-svn: 291624
* AMDGPU/EG,CM: Add fp16 conversion instructionsJan Vesely2017-01-111-1/+3
| | | | | | Differential Revision: https://reviews.llvm.org/D28164 llvm-svn: 291622
* Revert "[PGO] Turn off comdat renaming in IR PGO by default"Rong Xu2017-01-103-60/+15
| | | | | | | This patch reverts r291588: [PGO] Turn off comdat renaming in IR PGO by default, as we are seeing some hash mismatches in our internal tests. llvm-svn: 291621
* [InstCombine] add a wrapper for a common pair of transforms; NFCISanjay Patel2017-01-106-75/+44
| | | | | | | Some of the callers are artificially limiting this transform to integer types; this should make it easier to incrementally remove that restriction. llvm-svn: 291620
* [loop-unroll] Properly populate LoopInfo for loops cloned in LoopUnrollRuntime.Florian Hahn2017-01-101-3/+5
| | | | | | | | | | | | | | | | Summary: This fixes Transforms/LoopUnroll/runtime-loop3.ll which failed with EXTENSIVE_DEBUG, because the cloned basic blocks were not added to the correct sub-loops in LoopUnrollRuntime.cpp. Reviewers: dexonsmith, mzolotukhin Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D28482 llvm-svn: 291619
* [TM] Restore default TargetOptions in TargetMachine::resetTargetOptions.Justin Lebar2017-01-101-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Previously if you had * a function with the fast-math-enabled attr, followed by * a function without the fast-math attr, the second function would inherit the first function's fast-math-ness. This means that mixing fast-math and non-fast-math functions in a module was completely broken unless you explicitly annotated every non-fast-math function with "unsafe-fp-math"="false". This appears to have been broken since r176986 (March 2013), when the resetTargetOptions function was introduced. This patch tests the correct behavior as best we can. I don't think I can test FPDenormalMode and NoTrappingFPMath, because they aren't used in any backends during function lowering. Surprisingly, I also can't find any uses at all of LessPreciseFPMAD affecting generated code. The NVPTX/fast-math.ll test changes are an expected result of fixing this bug. When FMA is disabled, we emit add as "add.rn.f32", which prevents fma combining. Before this patch, fast-math was enabled in all functions following the one which explicitly enabled it on itself, so we were emitting plain "add.f32" where we should have generated "add.rn.f32". Reviewers: mkuper Subscribers: hfinkel, majnemer, jholewinski, nemanjai, llvm-commits Differential Revision: https://reviews.llvm.org/D28507 llvm-svn: 291618
* [AArch64] Consider all vector types for FeatureSlowMisaligned128StoreEvandro Menezes2017-01-101-12/+11
| | | | | | | | | | | | The original code considered only v2i64 as slow for this feature. This patch consider all 128-bit long vector types as slow candidates. In internal tests, extending this feature to all 128-bit vector types resulted in an overall improvement of 1% on Exynos M1. Differential revision: https://reviews.llvm.org/D27998 llvm-svn: 291616
* AMDGPU: Constant fold when immediate is materializedMatt Arsenault2017-01-101-141/+228
| | | | | | In future commits these patterns will appear after moveToVALU changes. llvm-svn: 291615
* [loop-unroll] Factor out code to update LoopInfo (NFC).Florian Hahn2017-01-101-17/+33
| | | | | | | | Move the code to update LoopInfo for cloned basic blocks to addClonedBlockToLoopInfo, as suggested in https://reviews.llvm.org/D28482. llvm-svn: 291614
* Move the section name from GlobalObject to the LLVMContextReid Kleckner2017-01-102-4/+29
| | | | | | | | | | | | | | | | | | | | | | | Summary: Convention wisdom says that bytes in Function are precious, and the vast, vast majority of globals do not live in special sections. Even when they do, they tend to live in the same section. Store the section name on the LLVMContext in a StringSet, and maintain a map from GlobalObject* to section name like we do for metadata, prefix data, etc. The fact that we've survived this long wasting at least three pointers of space in Function suggests that Function bytes are perhaps not as precious as we once thought. Given that most functions have metadata attachments when debug info is enabled, we might consider adding a pointer here to make that access more efficient. Reviewers: jlebar, dexonsmith, mehdi_amini Subscribers: mehdi_amini, aprantl, llvm-commits Differential Revision: https://reviews.llvm.org/D28150 llvm-svn: 291613
* InstCombine: Set operands instead of creating new callMatt Arsenault2017-01-101-10/+6
| | | | llvm-svn: 291612
* InstCombine: fdiv -x, -y -> fdiv x, yMatt Arsenault2017-01-101-0/+10
| | | | llvm-svn: 291611
* CodeGen: Allow small copyable blocks to "break" the CFG.Kyle Butt2017-01-101-7/+52
| | | | | | | | | | | When choosing the best successor for a block, ordinarily we would have preferred a block that preserves the CFG unless there is a strong probability the other direction. For small blocks that can be duplicated we now skip that requirement as well. Differential revision: https://reviews.llvm.org/D27742 llvm-svn: 291609
* Remove unused CONVERT_RNDSAT intrinsicsMatt Arsenault2017-01-106-213/+2
| | | | llvm-svn: 291607
* DAG: Avoid OOB when legalizing vector indexingMatt Arsenault2017-01-105-52/+57
| | | | | | | | | If a vector index is out of bounds, the result is supposed to be undefined but is not undefined behavior. Change the legalization for indexing the vector on the stack so that an out of bounds index does not create an out of bounds memory access. llvm-svn: 291604
* [WebAssembly] Only RAUW a constant once in FixFunctionBitcastsDerek Schuff2017-01-101-5/+12
| | | | | | | | | | | | When we collect 2 uses of a function in FindUses and then RAUW when we visit the first, we end up visiting the wrapper (because the second was RAUW'd). We still want to use RAUW instead of just Use->set() because it has special handling for Constants, so this patch just ensures that only one use of each constant is added to the work list. Differential Revision: https://reviews.llvm.org/D28504 llvm-svn: 291603
* DebugInfo: support for DW_FORM_implicit_constVictor Leschuk2017-01-105-10/+49
| | | | | | | | | | | | Support for DW_FORM_implicit_const DWARFv5 feature. When this form is used attribute value goes to .debug_abbrev section (as SLEB). As this form would break any debug tool which doesn't support DWARFv5 it is guarded by dwarf version check. Attempt to use this form with dwarf version <= 4 is considered a fatal error. Differential Revision: https://reviews.llvm.org/D28456 llvm-svn: 291599
* [LV] Don't panic when encountering the IV of an outer loop.Michael Kuperstein2017-01-101-2/+7
| | | | | | | | | | | | | | | | | | Bail out instead of asserting when we encounter this situation, which can actually happen. The reason the test uses the new PM is that the "bad" phi, incidentally, gets cleaned up by LoopSimplify. But LICM can create this kind of phi and preserve loop simplify form, so the cleanup has no chance to run. This fixes PR31190. We may want to solve this in a less conservative manner, since this phi is actually uniform within the inner loop (or we may want LICM to output a cleaner promotion to begin with). Differential Revision: https://reviews.llvm.org/D28490 llvm-svn: 291589
* [PGO] Turn off comdat renaming in IR PGO by defaultRong Xu2017-01-103-15/+60
| | | | | | | | | | | | | | | | | | | | | | | Summary: In IR PGO we append the function hash to comdat functions to avoid the potential hash mismatch. This turns out not legal in some cases: if the comdat function is address-taken and used in comparison. Renaming changes the semantic. This patch turns off comdat renaming by default. To alleviate the hash mismatch issue, we now rename the profile variable for comdat functions. Profile allows co-existing multiple versions of profiles with different hash value. The inlined copy will always has the correct profile counter. The out-of-line copy might not have the correct count. But we will not have the bogus mismatch warning. Reviewers: davidxl Subscribers: llvm-commits, xur Differential Revision: https://reviews.llvm.org/D28416 llvm-svn: 291588
* [ARM] Remove rbit intrinsics and autoupgrade to generic bitreverse.Chad Rosier2017-01-102-6/+1
| | | | | | Testing already covered by CodeGen/ARM/rbit.ll llvm-svn: 291587
* AMDGPU: Add tests for HasMultipleConditionRegistersMatt Arsenault2017-01-101-0/+7
| | | | | | This was enabled without many specific tests or the comment. llvm-svn: 291586
* [X86][AVX512]Improving shuffle lowering by using AVX-512 EXPAND* instructions Michael Zuckerman2017-01-101-6/+115
| | | | | | | | | | | | | | | | | This patch fix PR31351: https://llvm.org/bugs/show_bug.cgi?id=31351 1. This patch adds new type of shuffle lowering 2. We can use the expand instruction, When the shuffle pattern is as following: { 0*a[0]0*a[1]...0*a[n] , n >=0 where a[] elements in a ascending order}. Reviewers: 1. igorb 2. guyblank 3. craig.topper 4. RKSimon Differential Revision: https://reviews.llvm.org/D28352 llvm-svn: 291584
* [SimplifyLibCalls] Propagate fast math flags while optimizing pow().Davide Italiano2017-01-101-1/+4
| | | | llvm-svn: 291577
* [AArch64] Add support for lowering bitreverse to the rbit instruction.Chad Rosier2017-01-103-4/+13
| | | | | | Differential Revision: https://reviews.llvm.org/D28379 llvm-svn: 291575
* [mips] Fix Mips MSA instrinsicsSimon Dardis2017-01-102-19/+139
| | | | | | | | | | | | | | | | The usage of some MIPS MSA instrinsics that took immediates could crash LLVM during lowering. This patch addresses that behaviour. Crucially this patch also makes the use of intrinsics with out of range immediates as producing an internal error. The ld,st instrinsics would trigger an assertion failure for MIPS64 as their lowering would attempt to add an i32 offset to a i64 pointer. Reviewers: vkalintiris, slthakur Differential Revision: https://reviews.llvm.org/D25438 llvm-svn: 291571
* [mips] Honour -mno-odd-spreg for vector splat (again)Simon Dardis2017-01-101-2/+6
| | | | | | | | | | | | | | | | | | | | Previous the lowering of FILL_FW would use the MSA128W register class when performing a vector splat. Instead it should be honouring -mno-odd-spreg and only use the even registers when performing a splat from word to vector register. Logical follow-on from r230235. This fixes PR/31369. A previous commit was missing the test case and had another differential in it. Reviewers: slthakur Differential Revision: https://reviews.llvm.org/D28373 llvm-svn: 291566
* Revert "[mips] Honour -mno-odd-spreg for vector splat"Simon Dardis2017-01-102-18/+2
| | | | | | | This reverts commit r291556. It was a mixture of two differentials and was missing a test. llvm-svn: 291562
* RuntimeDyldELF: implement R_AARCH64_PREL64 relocEugene Leviant2017-01-101-0/+3
| | | | | | Differential revision: https://reviews.llvm.org/D28122 llvm-svn: 291558
* [mips] Honour -mno-odd-spreg for vector splatSimon Dardis2017-01-102-2/+18
| | | | | | | | | | | | | | | | | Previous the lowering of FILL_FW would use the MSA128W register class when performing a vector splat. Instead it should be honouring -mno-odd-spreg and only use the even registers when performing a splat from word to vector register. Logical follow-on from r230235. This fixes PR/31369. Reviewers: slthakur Differential Revision: https://reviews.llvm.org/D28373 llvm-svn: 291556
* [DAGCombiner] Merge together duplicate checks for folding fold (select C, 1, ↵Craig Topper2017-01-101-10/+4
| | | | | | | | X) -> (or C, X) and folding (select C, X, 0) -> (and C, X). Also be consistent about checking that both the condition and the result type are i1. NFC I guess previously we just assumed if the result type was i1, then the condition type must also be i1? llvm-svn: 291548
* [ObjectYAML] Support for DWARF line tablesChris Bieneman2017-01-101-10/+57
| | | | | | | | | | | | | | One more try... relanding r291541 with a fix to properly gate MaxOpsPerInst on DWARF version. Description from r291541: This patch re-lands r291470, which failed on Linux bots. The issue (I believe) was undefined behavior because the size of llvm::dwarf::LineNumberOps was not explcitly specified or consistently respected. The updated patch adds an explcit underlying type to the enum and preserves the size more correctly. Original description: This patch adds support for the DWARF debug_lines section. The line table state machine opcodes are preserved, so this can be used to test the state machine evaluation directly. llvm-svn: 291546
* AMD family 17h (znver1) enablementCraig Topper2017-01-102-0/+55
| | | | | | | | | | | | | | | | | | | | | | | Summary: This patch enables the following 1. AMD family 17h architecture using "znver1" tune flag (-march, -mcpu). 2. ISAs that are enabled for "znver1" architecture. 3. Checks ADX isa from cpuid to identify "znver1" flag when -march=native is used. 4. ISAs FMA4, XOP are disabled as they are dropped from amdfam17. 5. For the time being, it uses the btver2 scheduler model. 6. Test file is updated to check this flag. This item is linked to clang review item https://reviews.llvm.org/D28018 Patch by Ganesh Gopalasubramanian Reviewers: RKSimon, craig.topper Subscribers: vprasad, RKSimon, ashutosh.nema, llvm-commits Differential Revision: https://reviews.llvm.org/D28017 llvm-svn: 291543
* Revert "[ObjectYAML] Support for DWARF line tables"Chris Bieneman2017-01-101-56/+10
| | | | | | | | | | This reverts commit r291541. Still failing on a bot: http://bb.pgr.jp/builders/cmake-llvm-x86_64-linux/builds/47224/steps/test_llvm/logs/stdio llvm-svn: 291542
* [ObjectYAML] Support for DWARF line tablesChris Bieneman2017-01-101-10/+56
| | | | | | | | | | This patch re-lands r291470, which failed on Linux bots. The issue (I believe) was undefined behavior because the size of llvm::dwarf::LineNumberOps was not explcitly specified or consistently respected. The updated patch adds an explcit underlying type to the enum and preserves the size more correctly. Original description: This patch adds support for the DWARF debug_lines section. The line table state machine opcodes are preserved, so this can be used to test the state machine evaluation directly. llvm-svn: 291541
* [X86] When lowering uniform shifts, use X86ISD::VZEXT instead of using a ↵Craig Topper2017-01-101-4/+4
| | | | | | | | ZERO_EXTEND_VECTOR_INREG. If we emit the ZERO_EXTEND_VECTOR_INREG too late it doesn't get lowered properly and makes it through to isel and fails. Fixes PR31593. llvm-svn: 291535
* [DAGCombiner] Remove code for optimizing select (xor Cond, 0), X, Y -> ↵Craig Topper2017-01-101-4/+0
| | | | | | select Cond, X, Y. Just let combine on the xor itself take care of it. llvm-svn: 291534
* Fix a typo and also test a new machine for commit. NFC.Xin Tong2017-01-101-1/+1
| | | | llvm-svn: 291532
* [StructurizeCfg] Update dominator info.Serge Pavlov2017-01-101-0/+1
| | | | | | | | | | | | | | In some cases StructurizeCfg updates root node, but dominator info remains unchanges, it causes crash when expensive checks are enabled. To cope with this problem a new method was added to DominatorTreeBase that allows adding new root nodes, it is called in StructurizeCfg to put dominator tree in sync. This change fixes PR27488. Differential Revision: https://reviews.llvm.org/D28114 llvm-svn: 291530
* [CodeGen] Implement the SUnit::print() methodEvandro Menezes2017-01-101-9/+9
| | | | | | | | | | This method seems to have had a troubled life. This patch proposes that it replaces the recently added helper function dumpSUIdentifier. This way, the method can be used in other files using the SUnit class. Differential revision: https://reviews.llvm.org/D28488 llvm-svn: 291520
* [ThinLTO] Hash more part of the config to build cache entriesMehdi Amini2017-01-101-2/+34
| | | | | | | This has been fixed in the "new" LTO API used by Gold/LLD, this is fixing the same issue in the libLTO API used by ld64 (amongst other) llvm-svn: 291518
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