summaryrefslogtreecommitdiffstats
path: root/llvm/lib
Commit message (Collapse)AuthorAgeFilesLines
* [SimplifyCFG] allow speculation of exactly one expensive instruction (PR24818)Sanjay Patel2015-12-151-4/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This is the last general step to allow more IR-level speculation with a safety harness in place in CodeGenPrepare. The intent is to restore the behavior enabled by: http://reviews.llvm.org/rL228826 but prevent bad performance such as: https://llvm.org/bugs/show_bug.cgi?id=24818 Earlier patches in this sequence: D12882 (disable SimplifyCFG speculation for expensive instructions) D13297 (have CGP despeculate expensive ops) D14630 (have CGP despeculate special versions of cttz/ctlz) As shown in the test cases, we only have two instructions currently affected: ctz for some x86 and fdiv generally. Allowing exactly one expensive instruction is a bit of a hack, but it lines up with what is currently implemented in CGP. If we make the despeculation more general in CGP, we can make the speculation here more liberal. A follow-up patch will adjust the cost for sqrt and possibly other typically expensive math intrinsics (currently everything is cheap by default). GPU targets would likely want to override those expensive default costs (just as they probably should already override the cost of div/rem) because just about any math is cheaper than control-flow on those targets. Differential Revision: http://reviews.llvm.org/D15213 llvm-svn: 255660
* [llvm-profdata] Add support for weighted merge of profile data (2nd try)Nathan Slingerland2015-12-151-2/+12
| | | | | | | | | | | | | | | | | | | | Summary: This change adds support for specifying a weight when merging profile data with the llvm-profdata tool. Weights are specified by using the --weighted-input=<weight>,<filename> option. Input files not specified with this option (normal positional list after options) are given a default weight of 1. Adding support for arbitrary weighting of input profile data allows for relative importance to be placed on the input data from multiple training runs. Both sampled and instrumented profiles are supported. Reviewers: davidxl, dnovillo, bogner, silvas Subscribers: silvas, davidxl, llvm-commits Differential Revision: http://reviews.llvm.org/D15306 llvm-svn: 255659
* AMDGPU: mark ldexp LibCalls as unavailableNicolai Hahnle2015-12-151-0/+7
| | | | | | | | | | | | | | | | | | Summary: The LibCallSimplifier will turn llvm.exp2.* intrinsics into ldexp* libcalls which do not make sense with the AMDGPU backend. In the long run, we'll want an llvm.ldexp.* intrinsic to properly make use of this optimization, but this works around the problem for now. See also: http://reviews.llvm.org/D14327 (suggested llvm.ldexp.* implementation) Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92709 Reviewers: arsenm, tstellarAMD Differential Revision: http://reviews.llvm.org/D14990 llvm-svn: 255658
* AMDGPU/SI: Fix bitcast between v2f32 and f64Tom Stellard2015-12-151-0/+4
| | | | | | | | | | The radeonsi fp64 support can hit these now that some redundant bitcasts are folded. Patch by: Michel Dänzer Signed-off-by: Michel Dänzer <michel.daenzer@amd.com> llvm-svn: 255657
* [X86] Smaller code for materializing 32-bit 1 and -1 constantsHans Wennborg2015-12-152-5/+59
| | | | | | | | | "movl $-1, %eax" is 5 bytes, "xorl %eax, %eax; decl %eax" is 3 bytes. This commit makes LLVM use the latter when optimizing for size. Differential Revision: http://reviews.llvm.org/D14971 llvm-svn: 255656
* WebAssembly: update expected torture test failuresJF Bastien2015-12-151-33/+0
| | | | | | We now have 252 expected failures. llvm-svn: 255654
* [Hexagon] Preprocess mapped instructions before lowering to MCKrzysztof Parzyszek2015-12-153-3/+391
| | | | llvm-svn: 255653
* AMDGPU/SI: Add llvm.amdgcn.mbcnt.* intrinsicsTom Stellard2015-12-151-2/+2
| | | | | | | | | | | | | | Summary: These are meant to be used instead of the llvm.SI.tid intrinsic which will be deprecated at some point. Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D15475 llvm-svn: 255652
* AMDGPU/SI: Add llvm.amdgcn.v.interp.p[12] intrinsicsTom Stellard2015-12-151-0/+13
| | | | | | | | | | | | | | Summary: These are meant to be used instead of the llvm.SI.fs.interp intrinsic which will be deprecated at some point. Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D15474 llvm-svn: 255651
* AMDGPU/SI: Add getShaderType() function to Utils/Tom Stellard2015-12-155-17/+26
| | | | | | | | | | Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D15424 llvm-svn: 255650
* Bitcasts between FP and INT values using direct movesNemanja Ivanovic2015-12-153-4/+41
| | | | | | | | | | | | | | | This patch corresponds to review: http://reviews.llvm.org/D15286 This patch was meant to land in revision 255246, but I accidentally uploaded the patch that corresponds to http://reviews.llvm.org/D15372 in that revision accidentally. Thereby, this patch is the actual Bitcasts using direct moves patch, whereas http://reviews.llvm.org/rL255246 actually corresponds to http://reviews.llvm.org/D15372. llvm-svn: 255649
* [x86] adding PKU feature flagAsaf Badouh2015-12-155-0/+11
| | | | | | | | | the feature flag is essential for RDPKRU and WRPKRU instruction more about the instruction can be found in the SDM rev 56, vol 2 from http://www.intel.com/sdm Differential Revision: http://reviews.llvm.org/D15491 llvm-svn: 255644
* Do not try to use i8 and i16 versions of FP_TO_U/SINT soft float library callsMichael Kuperstein2015-12-153-39/+27
| | | | | | | | | | | It appears that neither compiler-rt nor the gnu soft-float libraries actually implement these conversions. Instead of emitting calls to library functions that don't exist, handle it similarly to the way we handle i8 -> float and i16 -> float conversions: call the i32 library function, and adjust the type. Differential Revision: http://reviews.llvm.org/D15151 llvm-svn: 255643
* Define a feature for __float128 support in the PPC back endNemanja Ivanovic2015-12-153-0/+7
| | | | | | | | | | | | | | This patch corresponds to review: http://reviews.llvm.org/D15117 In preparation for supporting IEEE Quad precision floating point, this patch simply defines a feature to specify the target supports this. For now, nothing is done with the target feature, we just don't want warnings from the Clang FE when a user specifies -mfloat128. Calling convention and other related work will add to this patch in the near future. llvm-svn: 255642
* Improve the successor list update in TailDuplication.cpp.Cong Hou2015-12-151-6/+6
| | | | | | | This patch improves a temporary fix in r255530 so that we can normalize successor list without trigger assertion failures in tail duplication pass. llvm-svn: 255638
* InstCombineLoadStoreAlloca.cpp: Avoid instantiating Twine.NAKAMURA Takumi2015-12-151-4/+9
| | | | llvm-svn: 255637
* [PassManagerBuilder] Add a few more scalar optimization passesJames Molloy2015-12-151-0/+13
| | | | | | | | | | | | | | | | | | | | This patch does two things: 1. mem2reg is now run immediately after globalopt. Now that globalopt can localize variables more aggressively, it makes sense to lower them to SSA form earlier rather than later so they can benefit from the full set of optimization passes. 2. More scalar optimizations are run after the loop optimizations in LTO mode. The loop optimizations (especially indvars) can clean up scalar code sufficiently to make it worthwhile running more scalar passes. I've particularly added SCCP here as it isn't run anywhere else in the LTO pass pipeline. Mem2reg is super cheap and shouldn't affect compilation time at all. The rest of the added passes are in the LTO pipeline only so doesn't affect the vast majority of compilations, just the link step. llvm-svn: 255634
* Type legalizer for masked gather and scatter intrinsics.Elena Demikhovsky2015-12-156-117/+436
| | | | | | | | | | | | Full type legalizer that works with all vectors length - from 2 to 16, (i32, i64, float, double). This intrinsic, for example void @llvm.masked.scatter.v2f32(<2 x float>%data , <2 x float*>%ptrs , i32 align , <2 x i1>%mask ) requires type widening for data and type promotion for mask. Differential Revision: http://reviews.llvm.org/D13633 llvm-svn: 255629
* [IR] Add classof for GetElementPtrConstantExpr, CompareConstantExpr, ↵Craig Topper2015-12-152-2/+30
| | | | | | | | InsertValueConstantExpr, and ExtractValueConstantExpr. All but CompareConstantExpr were being used in casts that were erroneously using ConstantExpr::classof due to inheritance. While there use cast<CompareConstantExpr> to simplify code slightly. I believe in one place we were always casting to ExtractValueConstantExpr when we were trying to choose between ExtractValueConstantExpr and InsertValueConstantExpr because of this. But since they have identical layouts this didn't cause any observable problems. llvm-svn: 255624
* Use CmpInst::Predicate instead of 'unsigned short' in some places. NFCCraig Topper2015-12-153-20/+20
| | | | llvm-svn: 255623
* Fix MSVC build with LLVM_ENABLE_THREADS=OFFMehdi Amini2015-12-151-1/+10
| | | | | | | Follow-up to the ThreadPool implementation. From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 255621
* [ShrinkWrapping] Do not choose restore point inside loops.Quentin Colombet2015-12-151-5/+21
| | | | | | | | | | | | | | | | | | | | The post-dominance property is not sufficient to guarantee that a restore point inside a loop is safe. E.g., while(1) { Save Restore if (...) break; use/def CSRs } All the uses/defs of CSRs are dominated by Save and post-dominated by Restore. However, the CSRs uses are still reachable after Restore and before Save are executed. This fixes PR25824 llvm-svn: 255613
* [WebAssembly] Use an immediate OperandType for offset operands.Dan Gohman2015-12-151-23/+23
| | | | llvm-svn: 255612
* [WebAssembly] Remove .import printing.Dan Gohman2015-12-151-58/+0
| | | | | | | For now, LLVM doesn't know about wasm module imports, so it shouldn't emit .import directives. llvm-svn: 255602
* Instcombine: destructor loads of structs that do not contains paddingMehdi Amini2015-12-153-7/+66
| | | | | | | | | | | | | | | | | | | | For non padded structs, we can just proceed and deaggregate them. We don't want ot do this when there is padding in the struct as to not lose information about this padding (the subsequents passes would then try hard to preserve the padding, which is undesirable). Also update extractvalue.ll and cast.ll so that they use structs with padding. Remove the FIXME in the extractvalue of laod case as the non padded case is handled when processing the load, and we don't want to do it on the padded case. Patch by: Amaury SECHET <deadalnix@gmail.com> Differential Revision: http://reviews.llvm.org/D14483 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 255600
* Add a C++11 ThreadPool implementation in LLVMMehdi Amini2015-12-152-0/+147
| | | | | | | | | | | | | | | | | | | | | | | | | This is a very simple implementation of a thread pool using C++11 thread. It accepts any std::function<void()> for asynchronous execution. Individual task can be synchronize using the returned future, or the client can block on the full queue completion. In case LLVM is configured with Threading disabled, it falls back to sequential execution using std::async with launch:deferred. This is intended to support parallelism for ThinLTO processing in linker plugin, but is generic enough for any other uses. This is a recommit of r255444 ; trying to workaround a bug in the MSVC 2013 standard library. I think I was hit by: http://connect.microsoft.com/VisualStudio/feedbackdetail/view/791185/std-packaged-task-t-where-t-is-void-or-a-reference-class-are-not-movable Recommit of r255589, trying to please g++ as well. Differential Revision: http://reviews.llvm.org/D15464 From: mehdi_amini <mehdi_amini@91177308-0d34-0410-b5e6-96231b3b80d8> llvm-svn: 255593
* Revert "Add a C++11 ThreadPool implementation in LLVM"Mehdi Amini2015-12-152-147/+0
| | | | | | | This reverts commit r255589. Breaks g++ From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 255591
* Add a C++11 ThreadPool implementation in LLVMMehdi Amini2015-12-152-0/+147
| | | | | | | | | | | | | | | | | | | | | | | This is a very simple implementation of a thread pool using C++11 thread. It accepts any std::function<void()> for asynchronous execution. Individual task can be synchronize using the returned future, or the client can block on the full queue completion. In case LLVM is configured with Threading disabled, it falls back to sequential execution using std::async with launch:deferred. This is intended to support parallelism for ThinLTO processing in linker plugin, but is generic enough for any other uses. This is a recommit of r255444 ; trying to workaround a bug in the MSVC 2013 standard library. I think I was hit by: http://connect.microsoft.com/VisualStudio/feedbackdetail/view/791185/std-packaged-task-t-where-t-is-void-or-a-reference-class-are-not-movable Differential Revision: http://reviews.llvm.org/D15464 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 255589
* [X86] Add relaxtion logic for SBB instructions.Quentin Colombet2015-12-151-0/+8
| | | | | | | | | Prior to this patch, we would wrongly stick to the variant with imm8 encoding even when the relocation could not fit that size. rdar://problem/23785506 llvm-svn: 255583
* A better attempt to add a missing includeRafael Espindola2015-12-141-1/+0
| | | | llvm-svn: 255578
* Trying to fix the build in a bot.Rafael Espindola2015-12-141-0/+1
| | | | llvm-svn: 255577
* LoopRotate: Convert the methods of LoopRotate to utility functions. NFCJustin Bogner2015-12-141-79/+82
| | | | | | | | | | This moves the actual work to do loop rotation into standalone functions with the analysis results they need passed in as arguments, leaving the class itself as a relatively simple shim. This will make the functions easy to reuse when we're ready to port this transformation to the new pass manager. llvm-svn: 255574
* LoopRotate: Reorder some method implementations. NFCJustin Bogner2015-12-141-159/+159
| | | | | | | | | | This just moves some callers after their callees. My next patch will convert some of these methods to stand alone functions, and that diff is more obviously NFC if I move these first. That change, in turn, will make it much easier to port this pass to the new pass manager once the loop pass manager is in place. llvm-svn: 255573
* Use diagnostic handler in the LLVMContextRafael Espindola2015-12-148-119/+112
| | | | | | | | | | | | | | | | This patch converts code that has access to a LLVMContext to not take a diagnostic handler. This has a few advantages * It is easier to use a consistent diagnostic handler in a single program. * Less clutter since we are not passing a handler around. It does make it a bit awkward to implement some C APIs that return a diagnostic string. I will propose new versions of these APIs and deprecate the current ones. llvm-svn: 255571
* [X86] Add relaxtion logic for ADC instructions.Quentin Colombet2015-12-141-0/+8
| | | | | | | | | Prior to this patch, we would wrongly stick to the variant with imm8 encoding even when the relocation could not fit that size. rdar://problem/23785506 llvm-svn: 255570
* [WebAssembly] Add type prefixes to call instructionsDan Gohman2015-12-141-7/+7
| | | | | | | | | Add return type information to call and call_indirect instructions. This allows them to be disambiguated without knowledge of the callee. Differential Revision: http://reviews.llvm.org/D15484 llvm-svn: 255565
* [WebAssembly] Implement a new algorithm for placing BLOCK markersDan Gohman2015-12-141-67/+144
| | | | | | | | | Implement a new BLOCK scope placement algorithm which better handles early-return blocks and early exists from nested scopes. Differential Revision: http://reviews.llvm.org/D15368 llvm-svn: 255564
* [WebAssembly] Avoid adding redundant EXPR_STACK uses.Dan Gohman2015-12-141-3/+4
| | | | llvm-svn: 255563
* Revert "Don't create unnecessary PHIs"Reid Kleckner2015-12-141-5/+0
| | | | | | | | | This reverts commit r255489. It causes test failures in Chromium and does not appear to respect the AlternativeV parameter. llvm-svn: 255562
* [X86] Part 2 to fix x86-64 fp128 calling convention.Chih-Hung Hsieh2015-12-147-21/+118
| | | | | | | | | | | | | | | | | | | | | | Part 1 was submitted in http://reviews.llvm.org/D15134. Changes in this part: * X86RegisterInfo.td, X86RecognizableInstr.cpp: Add FR128 register class. * X86CallingConv.td: Pass f128 values in XMM registers or on stack. * X86InstrCompiler.td, X86InstrInfo.td, X86InstrSSE.td: Add instruction selection patterns for f128. * X86ISelLowering.cpp: When target has MMX registers, configure MVT::f128 in FR128RegClass, with TypeSoftenFloat action, and custom actions for some opcodes. Add missed cases of MVT::f128 in places that handle f32, f64, or vector types. Add TODO comment to support f128 type in inline assembly code. * SelectionDAGBuilder.cpp: Fix infinite loop when f128 type can have VT == TLI.getTypeToTransformTo(Ctx, VT). * Add unit tests for x86-64 fp128 type. Differential Revision: http://reviews.llvm.org/D11438 llvm-svn: 255558
* add fast-math-flags to 'call' instructions (PR21290)Sanjay Patel2015-12-143-14/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds optional fast-math-flags (the same that apply to fmul/fadd/fsub/fdiv/frem/fcmp) to call instructions in IR. Follow-up patches would use these flags in LibCallSimplifier, add support to clang, and extend FMF to the DAG for calls. Motivating example: %y = fmul fast float %x, %x %z = tail call float @sqrtf(float %y) We'd like to be able to optimize sqrt(x*x) into fabs(x). We do this today using a function-wide attribute for unsafe-math, but we really want to trigger on the instructions themselves: %z = tail call fast float @sqrtf(float %y) because in an LTO build it's possible that calls with fast semantics have been inlined into a function with non-fast semantics. The code changes and tests are based on the recent commits that added "notail": http://reviews.llvm.org/rL252368 and added FMF to fcmp: http://reviews.llvm.org/rL241901 Differential Revision: http://reviews.llvm.org/D14707 llvm-svn: 255555
* Reordering fields to reduce padding in LLVM. NFCBen Craig2015-12-141-4/+4
| | | | llvm-svn: 255554
* [WebAssembly] Add an assert to sanity-check dead flags.Dan Gohman2015-12-141-0/+3
| | | | | | | The WebAssemblyStoreResults pass runs before LiveVariables, so it doesn't expect to have to keep dead flags up to date; check this with an assert. llvm-svn: 255551
* [Hexagon] Add "const" to function parameters in HexagonInstrInfoKrzysztof Parzyszek2015-12-142-35/+37
| | | | llvm-svn: 255544
* [Packetizer] Add AliasAnalysis as a parameter to the packetizerKrzysztof Parzyszek2015-12-143-9/+14
| | | | | | | | This will make the depedence graph more accurate if an alias analysis is provided. If nullptr is specified in its place, the behavior will remain as it is currently. llvm-svn: 255540
* Add missing vtable anchor's.Pete Cooper2015-12-141-0/+6
| | | | | | | | | | | | | | The following description is from http://reviews.llvm.org/D15481: ICmpInst, GetElementPtrInst and PHINode have no anchor functions. This causes the vtable and the type info (if RTTI is enabled in user code) to be emitted in multiple translation units. Before 3.7, the destructors were the key functions for these nodes, but they have been removed. There have been discussions about this here: http://lists.llvm.org/pipermail/llvm-dev/2015-August/089010.html and here: http://lists.llvm.org/pipermail/llvm-dev/2015-December/092921.html. Patch by Visoiu Mistrih Francis llvm-svn: 255538
* [ConstantFold] Fix bitcast to gep constant folding transform.David Majnemer2015-12-141-1/+1
| | | | | | | | | | | | Make sure to check that the destination type is sized. A check was present but was incorrectly checking the source type instead. Patch by Amaury SECHET! Differential Revision: http://reviews.llvm.org/D15264 llvm-svn: 255536
* Save several std::string constructions using llvm::Twine.Yaron Keren2015-12-141-9/+6
| | | | llvm-svn: 255535
* Remove the successor probabilities normalization in tail duplication pass.Cong Hou2015-12-141-1/+0
| | | | | | | | | | | | The normalization may cause assertion failures on SystemZ and some out-of-tree tests. The root cause is that unknown probabilities are materialized into known ones by calling getSuccProbability(), which is then used to add another successor to the same MBB which results in mixed known and unknown probabilities. But currently those mixed probabilities cannot be normalized. I will compose another patch to fix the root issue. llvm-svn: 255530
* [MergeFunctions] Use II instead of CI for InvokeInst; NFCSanjoy Das2015-12-141-5/+5
| | | | | | Using `CI` is slightly misleading. llvm-svn: 255529
OpenPOWER on IntegriCloud