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* Invert the logic of reachesChainWithoutSideEffects(). What we want to check ↵Owen Anderson2010-09-181-7/+7
| | | | | | | | | | is that there is NO path to the destination containing side effects, not that SOME path contains no side effects. In practice, this only manifests with CombinerAA enabled, because otherwise the chain has little to no branching, so "any" is effectively equivalent to "all". llvm-svn: 114268
* Thumb opcodes for thumb calls.Eric Christopher2010-09-181-1/+5
| | | | llvm-svn: 114263
* Add addrmode5 fp load support. Swap float/thumb operand adding to handleEric Christopher2010-09-181-5/+21
| | | | | | thumb with floating point. llvm-svn: 114256
* Floating point stores have a 3rd addressing mode type.Eric Christopher2010-09-181-1/+9
| | | | llvm-svn: 114254
* factor out a simple helper function to create a label for PC-relativeJim Grosbach2010-09-181-19/+17
| | | | | | instructions (PICADD, PICLDR, et.al.) llvm-svn: 114243
* PC-relative pseudo instructions are lowered and printed directly. Any encounterJim Grosbach2010-09-181-3/+2
| | | | | | with one in the generic printing code is an error. llvm-svn: 114242
* Fix vmov.f64 disassembly on targets where sizeof(long) != 8.Benjamin Kramer2010-09-171-2/+2
| | | | llvm-svn: 114240
* Add MC-inst handling for tPICADDJim Grosbach2010-09-171-0/+26
| | | | llvm-svn: 114237
* Add target-specific DAG combiner for BUILD_VECTOR and VMOVRRD. An i64Bob Wilson2010-09-171-0/+27
| | | | | | | | value should be in GPRs when it's going to be used as a scalar, and we use VMOVRRD to make that happen, but if the value is converted back to a vector we need to fold to a simple bit_convert. Radar 8407927. llvm-svn: 114233
* Teach the (non-MC) instruction printer to use the cannonical names for push/pop,Jim Grosbach2010-09-172-4/+72
| | | | | | and shift instructions on ARM. Update the tests to match. llvm-svn: 114230
* Avoid relocations in a common case.Rafael Espindola2010-09-171-1/+10
| | | | llvm-svn: 114229
* Teach machine sink toEvan Cheng2010-09-171-68/+218
| | | | | | | | | | 1) Do forward copy propagation. This makes it easier to estimate the cost of the instruction being sunk. 2) Break critical edges on demand, including cases where the value is used by PHI nodes. Critical edge splitting is not yet enabled by default. llvm-svn: 114227
* Rework arm fast isel branch and compare code.Eric Christopher2010-09-171-8/+70
| | | | llvm-svn: 114226
* Machine CSE was forgetting to clear some data structures.Evan Cheng2010-09-171-0/+7
| | | | llvm-svn: 114222
* Fix a potential bug that can cause miscomparison with and without debug info.Evan Cheng2010-09-171-1/+1
| | | | llvm-svn: 114220
* Don't include <fenv.h> now that we have llvm/System/FEnv.h.Jakob Stoklund Olesen2010-09-171-1/+0
| | | | llvm-svn: 114219
* Hook up verbose asm comment printing for SOImm operands in MC printerJim Grosbach2010-09-173-8/+6
| | | | llvm-svn: 114215
* trailing whitespaceJim Grosbach2010-09-171-8/+8
| | | | llvm-svn: 114212
* Avoid emitting a PIC base register if no PIC addresses are needed.Dan Gohman2010-09-171-2/+8
| | | | | | This fixes rdar://8396318. llvm-svn: 114201
* Attempt to support platforms which don't have fenv.h.Dan Gohman2010-09-171-12/+7
| | | | llvm-svn: 114196
* Add skeleton infrastructure for the ARMMCCodeEmitter class. Patch by Jason Kim!Jim Grosbach2010-09-173-0/+120
| | | | llvm-svn: 114195
* handle the upper16/lower16 target operand flags on symbol references for MCJim Grosbach2010-09-175-23/+60
| | | | | | instruction lowering. llvm-svn: 114191
* fix rdar://8444631 - encoder crash on 'enter'Chris Lattner2010-09-174-4/+18
| | | | | | What a weird instruction. llvm-svn: 114190
* Fix an MSVC warning.Daniel Dunbar2010-09-171-0/+3
| | | | llvm-svn: 114184
* expand PICLDR MC lowering to handle other PICLDR and PICSTR versions.Jim Grosbach2010-09-171-11/+31
| | | | llvm-svn: 114183
* MC/Mach-O/i386: Fix a crash in relocation handling.Daniel Dunbar2010-09-171-1/+2
| | | | llvm-svn: 114176
* Move the declaration SetInformationJobObject() outside of namespace.NAKAMURA Takumi2010-09-171-9/+9
| | | | | | It is also workaround for PR7927. llvm-svn: 114175
* AlphaSchedule.td: 7bit-ize.NAKAMURA Takumi2010-09-171-1/+1
| | | | llvm-svn: 114173
* System: Don't reexport ___eprintf when building with Clang; this symbol isn'tDaniel Dunbar2010-09-171-0/+7
| | | | | | | used on Darwin anymore, and Clang might not always link with the library it is currently found in. llvm-svn: 114165
* MC/AsmParser: Add support for 'a + 4@GOTPCREL' and friends, by reconsing theDaniel Dunbar2010-09-171-2/+81
| | | | | | | | | expression to include the modifier. - Gross, but this a corner case we don't expect to see often in practice, but it is worth accepting. - Also improves diagnostics on invalid modifiers. llvm-svn: 114154
* Fix the folding of floating-point math library calls, like sin(infinity),Dan Gohman2010-09-171-2/+9
| | | | | | | so that it detects errors on platforms where libm doesn't set errno. It's still subject to host libm details though. llvm-svn: 114148
* Add an #include of raw_ostream.h. Previously, this only compiledDan Gohman2010-09-171-0/+1
| | | | | | because it was using Twine.h's declaration of operator<<(const Twine &). llvm-svn: 114141
* Allow the PassRegistry mutex to be lazily initialized, and clean up the ↵Owen Anderson2010-09-161-10/+10
| | | | | | global namespace at the same time. llvm-svn: 114131
* Do not expose the locking for the PassRegistry in the header. Be careful toOwen Anderson2010-09-161-1/+8
| | | | | | synchronize any method that might lazily initialize the pImpl. llvm-svn: 114130
* Update CMake build.Benjamin Kramer2010-09-161-0/+1
| | | | llvm-svn: 114128
* Rename a variable to avoid a declaration conflict.Dan Gohman2010-09-161-3/+3
| | | | llvm-svn: 114126
* Add a pass which prints out all the memdep dependencies.Dan Gohman2010-09-161-0/+153
| | | | llvm-svn: 114121
* If FE forgot to provide a file name (usually it uses "stdin" as name in such ↵Devang Patel2010-09-161-0/+4
| | | | | | situation) then make one up to ensure that debug info is not malformed. llvm-svn: 114119
* Revert r114097, adding back in the assertion against replacing an ↵Owen Anderson2010-09-161-24/+11
| | | | | | | | | Instruction by itself. Now that CorrelatedValuePropagation is more careful not to call SimplifyInstructionsInBlock() on an unreachable block, the issue has been fixed at a higher level. Add a big warning to SimplifyInstructionsInBlock() to hopefully prevent this in the future. llvm-svn: 114117
* fix rdar://8438816 - unrecognized 'fildq' instructionChris Lattner2010-09-161-1/+2
| | | | llvm-svn: 114116
* Print the address of sections as 0 and create the metadata sections in theRafael Espindola2010-09-161-33/+24
| | | | | | same order as gnu as. llvm-svn: 114109
* Use a depth-first iteratation in CorrelatedValuePropagation to avoid wasting ↵Owen Anderson2010-09-161-2/+6
| | | | | | | | time trying to optimize unreachable blocks. llvm-svn: 114105
* When substituting sunkaddrs into indirect arguments an asm, we wereDale Johannesen2010-09-161-2/+4
| | | | | | | | | walking the asm arguments once and stashing their Values. This is wrong because the same memory location can be in the list twice, and if the first one has a sunkaddr substituted, the stashed value for the second one will be wrong (use-after-free). PR 8154. llvm-svn: 114104
* It is possible, under specific circumstances involving ptrtoint ↵Owen Anderson2010-09-161-3/+7
| | | | | | | | | | | | ConstantExpr's, for LVI to end up trying to merge a Constant into a ConstantRange. Handle this conservatively for now, rather than asserting. The testcase is more complex that I would like, but the manifestation of the problem is sensitive to iteration orders and the state of the LVI cache, and I have not been able to reproduce it with manually constructed or simplified cases. Fixes PR8162. llvm-svn: 114103
* MC-ization of the PICLDR pseudo. Next up, adding the other variantsJim Grosbach2010-09-162-1/+33
| | | | | | (PICLDRB, et. al.) and PICSTR* llvm-svn: 114098
* Fix PR8161, in which an unreachable loop causes recursive instruction ↵Owen Anderson2010-09-161-11/+24
| | | | | | | | simplification to try to replace an instruction with itself. Add a predicate to the simplifier to prevent this case. llvm-svn: 114097
* Make sure to promote single precision floats to double before extracting themJim Grosbach2010-09-161-2/+4
| | | | | | from the APFloat. llvm-svn: 114096
* Make sure that names like .note.GNU-stack are accepted as valid section names.Rafael Espindola2010-09-161-2/+37
| | | | llvm-svn: 114091
* Add support for the .zero directive.Rafael Espindola2010-09-161-0/+22
| | | | llvm-svn: 114077
* Change SPU register re-interpretations from OR to COPY_TO_REGCLASS instruction.Kalle Raiskila2010-09-163-238/+177
| | | | | | | | | | | | | This cleans up after the mess r108567 left in the CellSPU backend. ORCvt-instruction were used to reinterpret registers, and the ORs were then removed by isMoveInstr(). This patch now removes 350 instrucions of format: or $3, $3, $3 (from the 52 testcases in CodeGen/CellSPU). One case of a nonexistant or is checked for. Some moves of the form 'ori $., $., 0' and 'ai $., $., 0' still remain. llvm-svn: 114074
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