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* Fix line endings and strip trailing whitespace.Simon Pilgrim2017-01-081-71/+71
| | | | llvm-svn: 291393
* [x86] fix usage of stale operands when lowering selectSanjay Patel2017-01-081-2/+9
| | | | | | | | | | | | | | | | | | | | | I noticed this problem as part of the ongoing attempt to canonicalize min/max ops in IR. The debug output shows nodes like this: t4: i32 = xor t2, Constant:i32<-1> t21: i8 = setcc t4, Constant:i32<0>, setlt:ch t14: i32 = select t21, t4, Constant:i32<-1> And because the select is holding onto the t4 (xor) node while EmitTest creates a new x86-specific xor node, the lowering results in: t4: i32 = xor t2, Constant:i32<-1> t25: i32,i32 = X86ISD::XOR t2, Constant:i32<-1> t28: i32,glue = X86ISD::CMOV Constant:i32<-1>, t4, Constant:i8<15>, t25:1 Differential Revision: https://reviews.llvm.org/D28374 llvm-svn: 291392
* [CostModel][X86] Fixed vXi8 uniform shift costs.Simon Pilgrim2017-01-081-6/+16
| | | | | | | | | | The 'fast' costs should only work for shifts by uniform constants (uniform non-constant are lowered using the slow default implementation). Logical shifts were not taking into account that we must mask the psrlw result, so the costs needed to be doubled. Added missing AVX2/AVX512BW costs as well. llvm-svn: 291391
* [CostModel][X86] Moved legal uniform shift costs earlier.Simon Pilgrim2017-01-081-24/+39
| | | | | | XOP was prematurely matching, doubling the cost of ashr/lshr uniform shifts. llvm-svn: 291390
* [AVX-512] Remove redundant patterns that select unaligned moves with zero ↵Craig Topper2017-01-081-1/+1
| | | | | | masking for patterns that already use the aligned form. NFC llvm-svn: 291383
* [ThinLTO] Fix lazy-loading of Metadata attachment, which left some Fwd ref ↵Mehdi Amini2017-01-081-1/+2
| | | | | | | | | | | behind The change in r291362 was too agressive. We still need to flush at the end of the block because function local metadata can introduce fwd ref as well. (Bootstrap with ThinLTO was broken) llvm-svn: 291379
* [ThinLTO] Expected<> return values need to be handled to avoid an assertionMehdi Amini2017-01-081-1/+8
| | | | llvm-svn: 291377
* [AVR] Implement TargetLoweing::getRegisterByNameDylan McKay2017-01-072-0/+44
| | | | | | | This allows the use of the 'read_register' intrinsics used by clang's named register globals features. llvm-svn: 291375
* [CostModel][X86] Update SSE41/AVX1 vXi32 SHL costsSimon Pilgrim2017-01-071-0/+2
| | | | | | SSE41 provides pmulld which allows the simpler pslld/paddd/cvttps2dq/pmulld pattern than SSE2's use of pmuludq. llvm-svn: 291372
* [AVX-512] Remove patterns from the other VBLENDM instructions. They are all ↵Craig Topper2017-01-071-12/+5
| | | | | | | | redundant with masked move instructions. We should probably teach the two address instruction pass to turn masked moves into BLENDM when its beneficial to the register allocator. llvm-svn: 291371
* [AVX-512] Remove patterns from masked broadcast versions of BLENDM instructions.Craig Topper2017-01-071-6/+3
| | | | | | | | All but (v2f64 broadcast f64) are handled with VBROADCAST instructions. The v2f64 version can be handled with VMOVDDUP. We may want to consider converting to BLENDM instructions in the two address instruction pass if its beneficial to register allocation. llvm-svn: 291369
* [AVX-512] Add masked forms of the alternate MOVDDUP patterns.Craig Topper2017-01-071-0/+22
| | | | | | I'm not too sure how to get isel to select even all of the unmasked forms, but at least we have a consistent set now. llvm-svn: 291368
* [CostModel][X86] Fix AVX2 v16i16 shift 'splat' costs.Simon Pilgrim2017-01-071-2/+15
| | | | llvm-svn: 291366
* [CostModel][X86] Match 256-bit vector shift 'splat' costs for AVX2 and aboveSimon Pilgrim2017-01-071-45/+44
| | | | | | We were matching against general vector shift costs before the uniform splat costs llvm-svn: 291365
* [CostModel][X86] Generalized cost calculation of SHL by constant -> MUL ↵Simon Pilgrim2017-01-071-21/+10
| | | | | | conversion. llvm-svn: 291364
* [ThinLTO] Fix assertions on lazy-loading of Metadata TBAA attachmentsMehdi Amini2017-01-071-4/+4
| | | | | | | | | | | | | | | | | | | | | Summary: The issue happens with: %0 = ....., !tbaa !0 %1 = ....., !tbaa !1 With !0 that references !1. In this case when loading !0 we generates a temporary for the operand !1. We now flush it immediately and trigger the load of !1 before moving on. If we don't we get the temporary when attaching to %1. This is usually not an issue except that we eagerly try to update TBAA MDNodes, which is obviously not possible if we only have a temporary. Differential Revision: https://reviews.llvm.org/D28423 llvm-svn: 291362
* SimplifyLibCalls: Remove incorrect optimization of fabsMatt Arsenault2017-01-071-10/+2
| | | | | | | | fabs(x * x) is not generally safe to assume x is positive if x is a NaN. This is also less general than it could be, so this will be replaced with a transformation on the intrinsic. llvm-svn: 291359
* [Bitcode] Remove unused PlaceHolder parameter to lazyLoadModuleMetadataBlock()Mehdi Amini2017-01-071-4/+4
| | | | llvm-svn: 291356
* [CostModel][X86] Merge separate AVX1 cost LUTs. NFCI.Simon Pilgrim2017-01-071-38/+30
| | | | llvm-svn: 291355
* [CostModel][AVX512BW] Add v32i16 vector shift costs for avx512bw targets.Simon Pilgrim2017-01-071-0/+4
| | | | llvm-svn: 291354
* [CostModel][X86] Added missing AVX2 arithmetic costs.Simon Pilgrim2017-01-071-23/+33
| | | | | | Allows us to correctly fall through to the lower AVX1 costs if look up failed. llvm-svn: 291353
* [CostModel][X86] Reordered AVX1 arithmetic cost LUT into descending target ↵Simon Pilgrim2017-01-071-27/+27
| | | | | | order. NFCI. llvm-svn: 291352
* NewGVN: Make sure we properly lookup operand leaders while creatingDaniel Berlin2017-01-071-13/+48
| | | | | | | congruence classes for stores, and then keep them up to date. Add testcases. llvm-svn: 291351
* [X86][AVX512] Use lowerShuffleAsRepeatedMaskAndLanePermute for non-VBMI ↵Simon Pilgrim2017-01-072-2/+7
| | | | | | v64i8 shuffles (PR31470) llvm-svn: 291347
* TarWriter: Use fitsInUstar function.Rui Ueyama2017-01-071-2/+2
| | | | | | This change should have been commit as part of r291340. llvm-svn: 291341
* TarWriter: Use Ustar header's "prefix" field to store long filenames.Rui Ueyama2017-01-071-1/+27
| | | | | | | | | | | | Tar's Ustar header has the "prefix" field to store a directory part of a filename. It is not as flexible as the PAX-extended filename because there's still a limitation on the maximum filename size, but it mitigates the situation. This patch should unbreak some Windows buildbots that uses very old tar command. llvm-svn: 291340
* [X86] Disable load unfolding for 128-bit MOVDDUP instructions since the load ↵Craig Topper2017-01-071-2/+2
| | | | | | size is smaller than the register size so unfolding would increase the load size. llvm-svn: 291338
* Fix a typo. NFCXin Tong2017-01-071-1/+1
| | | | llvm-svn: 291335
* NewGVN: Reformat and fix a few newlinesDaniel Berlin2017-01-071-2/+3
| | | | llvm-svn: 291334
* [NewGVN] Prefer auto over explicit type. NFCI.Davide Italiano2017-01-071-1/+1
| | | | llvm-svn: 291328
* [WebAssembly] Don't abort on code with UB.Dan Gohman2017-01-071-6/+17
| | | | | | | | Gracefully leave code that performs function-pointer bitcasts implying non-trivial pointer conversions alone, rather than aborting, since it's just undefined behavior. llvm-svn: 291326
* [WebAssembly] Move a SmallVector to a more specific scope. NFC.Dan Gohman2017-01-071-2/+2
| | | | llvm-svn: 291324
* LowerTypeTests: Thread summary and action from the API and command line into ↵Peter Collingbourne2017-01-072-37/+75
| | | | | | | | | | | the pass. Also move command line handling out of the pass constructor and into a separate function. Differential Revision: https://reviews.llvm.org/D28422 llvm-svn: 291323
* [AVR] Parenthesize a boolean expressionDylan McKay2017-01-071-2/+2
| | | | | | | Without the parentheses, clang would emit warnings while compiling the code. llvm-svn: 291320
* [WebAssembly] Add a pass to create wrappers for function bitcasts.Dan Gohman2017-01-074-0/+154
| | | | | | | | | | | | WebAssembly requires caller and callee signatures to match exactly. In LLVM, there are a variety of circumstances where signatures may be mismatched in practice, and one can bitcast a function address to another type to call it as that type. This patch adds a pass which replaces bitcasted function addresses with wrappers to replace the bitcasts. This doesn't catch everything, but it does match many common cases. llvm-svn: 291315
* NewGVN: Fix PR 31501.Daniel Berlin2017-01-071-38/+50
| | | | | | | | | | | | Summary: LLVM's non-standard notion of phi nodes means we can't both try to substitute for undef in phi nodes *and* use phi nodes as leaders all the time. This changes NewGVN to use the same semantics as SimplifyPHINode to decide which phi nodes are equivalent. Reviewers: davide Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D28312 llvm-svn: 291308
* [ThinLTO] Handle conflicting local names gracefullyTeresa Johnson2017-01-061-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: r285871 introduced an assert that was overly aggressive in the case of a same-named local in different same-named files (in different directories), where the source name and therefore the GUID ended up the same because the files were compiled in their own directory without any leading path. Change the handling in the promotion logic to get the summary for the version in that module. This also exposed an issue where we are not always importing the right copy, which is a performance not correctness issue (because the renaming is based on the module hash which must be different, see the bug report for details). I will fix that as a follow-on. Fixes PR31561. Reviewers: mehdi_amini Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D28411 llvm-svn: 291304
* [ThinLTO] Optionally ignore empty index fileTeresa Johnson2017-01-061-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: In order to simplify distributed build system integration, where actions may be scheduled before the Thin Link which determines the list of objects selected by the linker. The gold plugin currently will emit 0-sized index files for objects not selected by the link, to enable checking for expected output files by the build system. If the build system then schedules a backend action for these bitcode files, we want to be able to fall back to normal compilation instead of failing. This is the LLVM side support for optionally enabling fallback instead of issuing an error. Return a null CombinedIndex from llvm::getModuleSummaryIndexForFile under the option when the file is empty. Clang can then ignore the index when it is null. Clang patch is D28362. Reviewers: mehdi_amini Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D28410 llvm-svn: 291302
* [BPF] Fix some Clang-tidy modernize and Include What You Use warnings; other ↵Eugene Zelenko2017-01-066-45/+42
| | | | | | minor fixes (NFC). llvm-svn: 291297
* [InstSimplify] Optimize away udivs in the presence of range metadataDavid Majnemer2017-01-061-0/+10
| | | | | | We know that udiv %V, C can be optimized away to 0 if %V is ult C. llvm-svn: 291296
* [asan] Change the visibility of ___asan_globals_registered to hiddenKuba Mracek2017-01-061-0/+1
| | | | | | | | This flag is used to track global registration in Mach-O and it doesn't need to be exported and visible. Differential Revision: https://reviews.llvm.org/D28250 llvm-svn: 291289
* Fix use after freeXin Tong2017-01-061-1/+1
| | | | | | | | | | | | Summary: Fix use after free in LoopUnswitch Reviewers: chenli, atrick, hfinkel, mzolotukhin Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D28412 llvm-svn: 291288
* [InstSimplify] Optimize away urems in the presence of range metadataDavid Majnemer2017-01-061-0/+10
| | | | | | We know that urem %V, C can be optimized away to %V if %V is ult C. llvm-svn: 291282
* Fix LoopLoadElimination to keep original alignment on the inital hoisted storeMehdi Amini2017-01-061-1/+3
| | | | | | | | | | | This is fixing a bug where Loop Vectorization is widening a load but with a lower alignment. Hoisting the load without propagating the alignment will allow inst-combine to later deduce a higher alignment that what the pointer actually is. Differential Revision: https://reviews.llvm.org/D28408 llvm-svn: 291281
* AMDGPU/R600: Don't use REGISTER_{LOAD,STORE} ISD nodesJan Vesely2017-01-065-159/+159
| | | | | | | | This will make transition to SCRATCH_MEMORY easier Differential Revision: https://reviews.llvm.org/D24746 llvm-svn: 291279
* AArch64CollectLOH: Rewrite as block-local analysis.Matthias Braun2017-01-061-842/+281
| | | | | | | | | | | | | | | | | | | | | Re-apply r288561: This time with a fix where the ADDs that are part of a 3 instruction LOH would not invalidate the "LastAdrp" state. This fixes http://llvm.org/PR31361 Previously this pass was using up to 5% compile time in some cases which is a bit much for what it is doing. The pass featured a full blown data-flow analysis which in the default configuration was restricted to a single block. This rewrites the pass under the assumption that we only ever work on a single block. This is done in a single pass maintaining a state machine per general purpose register to catch LOH patterns. Differential Revision: https://reviews.llvm.org/D27329 This reverts commit 9e6cedb0a4f14364d6511597a9160305e7d34493. llvm-svn: 291266
* [DWARF] Null out the debug locs of (loop invariant) instructions hoisted by ↵Wolfgang Pieb2017-01-061-0/+8
| | | | | | | | | | LICM in order to avoid jumpy line tables. Calls are left alone because they may be inlined. Differential Revision: https://reviews.llvm.org/D28390 llvm-svn: 291258
* Use %z for size_t and avoid deprecated string functionsReid Kleckner2017-01-061-4/+4
| | | | | | | | This usage of strcpy and snprintf was certainly safe, but using them sets off various deprecation and lint warnings. Easier to just write the belt and suspenders version. llvm-svn: 291256
* [AArch64] Reduce vector insert/extract cost for Falkor.Chad Rosier2017-01-061-0/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D28403 llvm-svn: 291254
* [X86][SSE] Pass float domain flag to shuffle combine match functions. NFCI.Simon Pilgrim2017-01-061-13/+13
| | | | | | Early step towards ignoring domain above a certain shuffle depth. llvm-svn: 291248
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