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* Add a RegisterClassInfo class that lazily caches information aboutJakob Stoklund Olesen2011-06-025-11/+215
| | | | | | | | | | | | | | | | | | | | | | | | | register classes. It provides information for each register class that cannot be determined statically, like: - The number of allocatable registers in a class after filtering out the reserved and invalid registers. - The preferred allocation order with registers that overlap callee-saved registers last. - The last callee-saved register that overlaps a given physical register. This information usually doesn't change between functions, so it is reused for compiling multiple functions when possible. The many possible combinations of reserved and callee saves registers makes it unfeasible to compute this information statically in TableGen. Use RegisterClassInfo to count available registers in various heuristics in SimpleRegisterCoalescing, making the pass run 4% faster. llvm-svn: 132450
* Detect FI|cst pattern in MipsDAGToDAGISel::SelectAddr. Patch by Sasa Stankovic.Akira Hatanaka2011-06-021-16/+17
| | | | llvm-svn: 132448
* Custom-lower FRAMEADDR. Patch by Sasa Stankovic.Akira Hatanaka2011-06-023-1/+17
| | | | llvm-svn: 132444
* When marking a block as being unanalyzable, use "Clobber" on the terminator ↵Eli Friedman2011-06-021-2/+2
| | | | | | | | | | | | instead of the first instruction in the block. This is a bit of a hack; "Clobber" isn't really the right marking in the first place. memdep doesn't really have any way of properly expressing "unanalyzable" at the moment. Using it on the terminator is much less ambiguous than using it on an arbitrary instruction, though. In the given testcase, the "Clobber" was pointing to a load, and GVN was incorrectly assuming that meant that the "Clobber" load overlapped the load being analyzed (when they are actually unrelated). The included testcase tests both this commit and r132434. Part two of rdar://9429882. (r132434 was mislabeled.) llvm-svn: 132442
* In MemoryDependenceAnalysis::getNonLocalPointerDepFromBB, if a given block ↵Eli Friedman2011-06-011-20/+58
| | | | | | | | is is deemed unanalyzable (and we execute one of the "goto PredTranslationFailure" statements), make sure we don't put information about the predecessors of that block into the returned data structures; this can lead to, among other things, extraneous results (which will confuse passes using memdep). Fixes an assert in GVN compiling ruby. Part of rdar://problem/9521954 . Testcase coming up soon. llvm-svn: 132434
* A DBG_VALUE that truncates a range does not start another dbg value range.Devang Patel2011-06-011-0/+5
| | | | llvm-svn: 132433
* Do not drop constant values when a variable's content is described using ↵Devang Patel2011-06-012-14/+47
| | | | | | .debug_loc entries. llvm-svn: 132427
* Recommit 132404 with fixes. rdar://problem/5993888Stuart Hastings2011-06-016-10/+127
| | | | llvm-svn: 132424
* Allow bitcasts between valid types of the same size and vectorEric Christopher2011-06-011-0/+6
| | | | | | | | types if the vector type is legal. Fixes rdar://9306086 llvm-svn: 132420
* Revert 132404 to appease a buildbot. rdar://problem/5993888Stuart Hastings2011-06-015-122/+6
| | | | llvm-svn: 132419
* Refactor LegalizeTypes: Erase LegalizeAction and make the type legalizer useNadav Rotem2011-06-015-96/+71
| | | | | | the TargetLowering enum. llvm-svn: 132418
* SCEV: missing null check fix for r132360, dragonegg crash.Andrew Trick2011-06-011-3/+3
| | | | llvm-svn: 132416
* Revert r132358 "Simplify the eviction policy by making the failsafe explicit."Jakob Stoklund Olesen2011-06-011-97/+44
| | | | | | | This commit caused regressions in i386 flops-[568], matrix, salsa20, 256.bzip2, and enc-md5. llvm-svn: 132413
* Fix double FGETSIGN to work on x86_32; followup to 132396.Stuart Hastings2011-06-011-3/+6
| | | | | | rdar://problem/5660695 llvm-svn: 132411
* Add support for x86 CMPEQSS and friends. These instructions do aStuart Hastings2011-06-015-6/+122
| | | | | | | | floating-point comparison, generate a mask of 0s or 1s, and generally DTRT with NaNs. Only profitable when the user wants a materialized 0 or 1 at runtime. rdar://problem/5993888 llvm-svn: 132404
* Reapply 132348 with fixes. rdar://problem/6501862Stuart Hastings2011-06-011-9/+15
| | | | llvm-svn: 132402
* Fix PR10059 and future variations by handling all register subclasses.Jakob Stoklund Olesen2011-06-011-48/+34
| | | | | | | | Add TargetRegisterInfo::hasSubClassEq and use it to check for compatible register classes instead of trying to list all register classes in X86's getLoadStoreRegOpcode. llvm-svn: 132398
* Turn on FGETSIGN for x86. Followup to 132388. rdar://problem/5660695Stuart Hastings2011-06-011-6/+2
| | | | llvm-svn: 132396
* Add new -d option to tblgen. It writes a make(1)-style dependency file.Joerg Sonnenberger2011-06-012-5/+8
| | | | llvm-svn: 132395
* This patch is another step in the direction of adding vector select. In thisNadav Rotem2011-06-011-1/+28
| | | | | | | | | patch we add a flag to enable a new type legalization decision - to promote integer elements in vectors. Currently, the rest of the codegen does not support this kind of legalization. This flag will be removed when the transition is complete. llvm-svn: 132394
* FGETSIGN support for x86, using movmskps/pd. Will be enabled with aStuart Hastings2011-06-014-5/+40
| | | | | | patch to TargetLowering.cpp. rdar://problem/5660695 llvm-svn: 132388
* Add an issue width check to the postRA scheduler. Patch by Max Kazakov!Andrew Trick2011-06-011-0/+6
| | | | | | | | | | For targets with no itinerary (x86) it is a nop by default. For targets with issue width already expressed in the itinerary (ARM) it bypasses a scoreboard check but otherwise does not affect the schedule. It does make the code more consistent and complete and allows new targets to specify their issue width in an arbitrary way. llvm-svn: 132385
* First, do no harm -- even if we can't find a selector for an enclosingJohn McCall2011-06-011-4/+18
| | | | | | | landing pad, forward llvm.eh.resume calls to it instead of turning them invalidly into invokes. llvm-svn: 132382
* The ARM stuff already calls the Resume function, not the Resume_or_Rethrow. ItBill Wendling2011-06-011-4/+1
| | | | | | | | | | | | | turns out that it could cause an infinite loop in some situations. If this code is triggered and it converts a cleanup into a catchall, but that cleanup was in already in a cleanup, then the _Unwind_SjLj_Resume could infinite loop. I.e., the code doesn't consume the exception object and passes it on to _Unwind_SjLj_Resume. But _USjLjR expects it to be consumed (since it's landing at a catchall instead of a cleanup). So it uses the values that are presently there, which are the values that tell it to jump to the fake landing pad. <rdar://problem/9508402> llvm-svn: 132381
* Incomplete type may not have corresponding DIE, so do not check DIEEntry ↵Devang Patel2011-06-012-5/+6
| | | | | | eagerly. llvm-svn: 132377
* Refactor.Devang Patel2011-05-312-10/+9
| | | | llvm-svn: 132373
* Include global types, that are referenced through local variables, in ↵Devang Patel2011-05-312-7/+8
| | | | | | debug_pubtypes list. llvm-svn: 132371
* scev: Better sign-extend removal. Normalize postincrement recurrencesAndrew Trick2011-05-311-31/+102
| | | | | | so that their sign extended forms are congruent when no overflow occurs. llvm-svn: 132360
* Simplify the eviction policy by making the failsafe explicit.Jakob Stoklund Olesen2011-05-311-44/+97
| | | | | | | | | | | | | | | | When assigned ranges are evicted, they are put in the RS_Evicted stage and are not allowed to evict anything else. That prevents looping automatically. When evicting ranges just to get a cheaper register, use only spill weights to find the possible candidates. Avoid breaking hints for this purpose, it is not worth it. Start implementing more complex eviction heuristics, guarded by the temporary -complex-eviction flag. The initial version permits a heavier range to be evicted if it doesn't have any uses where the evicting range is live. This makes it a good candidate for live ranfge splitting. llvm-svn: 132358
* llvm.memcpy.* has two distinct associated address spaces; the source address ↵Eli Friedman2011-05-311-4/+6
| | | | | | space, and the destination address space. Fix up the interface on MemIntrinsic and MemTransferInst to make this clear, and fix InstructionDereferencesPointer in LazyValueInfo.cpp to use the interface properly. llvm-svn: 132356
* Fix uninitialized variables and silence warningsBruno Cardoso Lopes2011-05-311-2/+3
| | | | llvm-svn: 132355
* Add a minor missing -verify check. Found by inspection.Eli Friedman2011-05-311-0/+3
| | | | llvm-svn: 132353
* Revert to pacify a buildbot. rdar://problem/6501862Stuart Hastings2011-05-311-16/+9
| | | | llvm-svn: 132351
* Followup to 132316; accept arbitrary constants, add with a constant,Stuart Hastings2011-05-311-9/+16
| | | | | | | sub with a non-constant. Fix comments, enlarge test case. rdar://problem/6501862 llvm-svn: 132348
* Fix 80 column violations.Richard Osborne2011-05-311-2/+5
| | | | llvm-svn: 132341
* Add XCore intrinsic for crc8.Richard Osborne2011-05-312-0/+16
| | | | llvm-svn: 132340
* Add XCore intrinsic for crc32.Richard Osborne2011-05-311-1/+7
| | | | llvm-svn: 132336
* Fix ssat and ssat16 encodings for ARM and Thumb. The bit position valueBruno Cardoso Lopes2011-05-314-8/+26
| | | | | | | must be encoded decremented by one. Only add encoding tests for ssat16 because ssat can't be parsed yet. llvm-svn: 132324
* This patch implements atomic intrinsics atomic.load.add (sub,and,or,xor,Bruno Cardoso Lopes2011-05-314-6/+664
| | | | | | | | | | nand), atomic.swap and atomic.cmp.swap, all in i8, i16 and i32 versions. The intrinsics are implemented by creating pseudo-instructions, which are then expanded in the method MipsTargetLowering::EmitInstrWithCustomInserter. Patch by Sasa Stankovic. llvm-svn: 132323
* This patch implements the thread local storage. Implemented are GeneralBruno Cardoso Lopes2011-05-317-3/+144
| | | | | | | | Dynamic, Initial Exec and Local Exec TLS models. Patch by Sasa Stankovic llvm-svn: 132322
* Use the dwarf->llvm mapping to print register names in the cfiRafael Espindola2011-05-3033-15/+137
| | | | | | | | directives. Fixes PR9826. llvm-svn: 132317
* (1 - X) * (-2) -> (x - 1) * 2, for all positive nonzero powers of 2Stuart Hastings2011-05-301-0/+17
| | | | | | rdar://problem/6501862 llvm-svn: 132316
* Split ppc dwarf regnums into ppc64 and ppc32 flavours.Rafael Espindola2011-05-302-141/+152
| | | | llvm-svn: 132315
* Introduce the DwarfRegAlias class for declaring that two registers have theRafael Espindola2011-05-301-16/+16
| | | | | | | | | | same dwarf number. This will be used for creating a dwarf number to register mapping. The only case that needs this so far is the XMM/YMM registers that unfortunately do have the same numbers. llvm-svn: 132314
* Mark the 32 bit registers as invalid in 64 bit mode. In 64 bit mode they areRafael Espindola2011-05-301-9/+9
| | | | | | subregisters of the 64 bit ones. llvm-svn: 132313
* Remove the DwarfNumbers from the subregisters. They should use DW_OP_bit_pieceRafael Espindola2011-05-301-48/+48
| | | | | | | and for now the generic dwarf emission will automatically use the superregister numbers. llvm-svn: 132312
* Reapply r132245 with a fix for the bug that broke the darwin9/i386 build.Jakob Stoklund Olesen2011-05-303-55/+72
| | | | llvm-svn: 132309
* Emit the handler's data area. For GCC-style exceptions under Win64, theCharles Davis2011-05-301-0/+21
| | | | | | | handler's data area starts with a 4-byte reference to the personality function, followed by the DWARF LSDA. llvm-svn: 132302
* Revert r132245, "Create two BlockInfo entries when a live range is ↵Jakob Stoklund Olesen2011-05-293-71/+55
| | | | | | | | discontinuous through a block." This commit seems to have broken a darwin 9 tester. llvm-svn: 132299
* Fix PR10046 by updating LiveVariables kill info when splitting live ranges.Jakob Stoklund Olesen2011-05-291-2/+39
| | | | | | | | | | | | | This only affects targets like Mips where branch instructions may kill virtual registers. Most other targets branch on flag values, so virtual registers are not involved. The problem is that MachineBasicBlock::updateTerminator deletes branches and inserts new ones while LiveVariables keeps a list of pointers to instructions that kill virtual registers. That list wasn't properly updated in MBB::SplitCriticalEdge. llvm-svn: 132298
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