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* loop-rotate shouldn't hoist alloca instructions out of a loop. Patch by ↵Eli Friedman2012-02-161-1/+2
| | | | | | Patrik Hägglund, with slightly modified test. Issue reported by Patrik Hägglund on llvmdev. llvm-svn: 150642
* Enable register mask operands for x86 calls.Jakob Stoklund Olesen2012-02-163-40/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Call instructions no longer have a list of 43 call-clobbered registers. Instead, they get a single register mask operand with a bit vector of call-preserved registers. This saves a lot of memory, 42 x 32 bytes = 1344 bytes per call instruction, and it speeds up building call instructions because those 43 imp-def operands no longer need to be added to use-def lists. (And removed and shifted and re-added for every explicit call operand). Passes like LiveVariables, LiveIntervals, RAGreedy, PEI, and BranchFolding are significantly faster because they can deal with call clobbers in bulk. Overall, clang -O2 is between 0% and 8% faster, uniformly distributed depending on call density in the compiled code. Debug builds using clang -O0 are 0% - 3% faster. I have verified that this patch doesn't change the assembly generated for the LLVM nightly test suite when building with -disable-copyprop and -disable-branch-fold. Branch folding behaves slightly differently in a few cases because call instructions have different hash values now. Copy propagation flushes its data structures when it crosses a register mask operand. This causes it to leave a few dead copies behind, on the order of 20 instruction across the entire nightly test suite, including SPEC. Fixing this properly would require the pass to use different data structures. llvm-svn: 150638
* Handle register masks in branch folding.Jakob Stoklund Olesen2012-02-151-0/+8
| | | | | | | Don't attempt to move instructions with regmask operands. They are most likely calls anyway. llvm-svn: 150634
* Fix library visibility problems with VLIWPacketizer.Andrew Trick2012-02-151-6/+19
| | | | | | The existing framework for postra scheduling is library local. We want to keep it that way. Soon we will have a more general MachineScheduler interface. At that time, various bits will be exposed to targets. In the meantime, the VLIWPacketizer wants to use ScheduleDAGInstrs directly, so it needs to wrapped in a PIMPL to avoid exposing it to the target interface. llvm-svn: 150633
* Use the enum instead of 'unsigned'.Bill Wendling2012-02-151-1/+2
| | | | llvm-svn: 150632
* Make LiveIntervals::handleMove() bundle aware.Lang Hames2012-02-152-4/+16
| | | | llvm-svn: 150630
* Use 'getDataNoRel' for the section kind.Bill Wendling2012-02-151-5/+4
| | | | llvm-svn: 150628
* Fix assertion condition.Lang Hames2012-02-151-1/+1
| | | | llvm-svn: 150627
* Modify the code that emits the module flags to use the new module flags accessorBill Wendling2012-02-152-38/+38
| | | | | | | | | method. This allows the target lowering code to not have to deal with MDNodes. Also, avoid leaking memory like a sieve by not creating a global variable for the image info section, but just emitting the code directly. llvm-svn: 150624
* Add a module flags accessor method which returns the flags in a vector.Bill Wendling2012-02-151-0/+15
| | | | llvm-svn: 150623
* Add function for computing the edit distance of two arrays.Kaelyn Uhrain2012-02-151-51/+5
| | | | | | | | Accomplished by moving the body of StringRef::edit_distance into a separate function that accepts two ArrayRefs, and making StringRef::edit_distance a wrapper around the new function. llvm-svn: 150621
* Don't expose DefaultVLIWSchedulerAndrew Trick2012-02-151-1/+1
| | | | llvm-svn: 150619
* Remove overly conservative assert.Lang Hames2012-02-151-1/+0
| | | | llvm-svn: 150608
* Generic "VLIW" packetizer based on a DFA generated from target itinerary.Andrew Trick2012-02-151-0/+147
| | | | | | Patch by Sundeep! llvm-svn: 150607
* Optimize redundant sign extends and negation of predicates.Sirish Pande2012-02-1515-209/+1037
| | | | llvm-svn: 150606
* Revert "Replacing HexagonOptimizeSZExtends with HexagonPeephole."Eric Christopher2012-02-152-292/+129
| | | | | | This reverts commit 1656806a944bbd23e98c6e578810fe02495ab741. llvm-svn: 150605
* Revert "Optimize redundant sign extends and negation of predicates"Eric Christopher2012-02-1513-745/+80
| | | | | | | | as it's breaking the build. This reverts commit 11241abca5e2a313412fed594bb9d9fa2a2057fb. llvm-svn: 150604
* Replacing HexagonOptimizeSZExtends with HexagonPeephole.Sirish Pande2012-02-152-129/+292
| | | | llvm-svn: 150603
* Optimize redundant sign extends and negation of predicatesSirish Pande2012-02-1513-80/+745
| | | | llvm-svn: 150601
* Add braces to if clause to make symmetric with associate else clause.Chad Rosier2012-02-151-18/+19
| | | | llvm-svn: 150591
* For ELF, also call fixSymbolsInTLSFixups() on expressions passed to ↵David Meyer2012-02-151-0/+9
| | | | | | EmitValue (literal values). Previously only called on expressions in instructions. New test cases added to tls.s, tls-i386.s. Resolves PR11981. llvm-svn: 150582
* Strip the pointer casts from the constants here.Bill Wendling2012-02-151-1/+1
| | | | | | | | | The c'tor list is stored as a list of 'void ()*'s, so all of the functions are bitcast to that. However, the dyn_cast doesn't automagically look through bitcasts. Do that for it. <rdar://problem/10813350> llvm-svn: 150572
* Add a way to replace a field inside a metadata node. This can beEric Christopher2012-02-151-0/+5
| | | | | | | used to incrementally update a created node without needing a temporary node and RAUW. llvm-svn: 150571
* Revert r150565 again. Appears to be a stage2 failure with dragonegg.Andrew Trick2012-02-151-6/+8
| | | | | | I'll put MachineLICM back before PEI. All my arm/x86 benchmarks look good, but buildbots don't like it. llvm-svn: 150568
* Reapply r150565 with the typo fix properly merged.Andrew Trick2012-02-151-8/+6
| | | | llvm-svn: 150567
* reverting r150565. Premature push.Andrew Trick2012-02-151-6/+8
| | | | llvm-svn: 150566
* Move PostRAMachineLICM into MachineLateOptimization. It now runs after PEI!Andrew Trick2012-02-151-8/+6
| | | | llvm-svn: 150565
* Allow CodeGen (llc) command line options to work as expected.Andrew Trick2012-02-151-52/+114
| | | | | | | | | | | | | | | | | | | | | | | | The llc command line options for enabling/disabling passes are local to CodeGen/Passes.cpp. This patch associates those options with standard pass IDs so they work regardless of how the target configures the passes. A target has two ways of overriding standard passes: 1) Redefine the pass pipeline (override TargetPassConfig::add%Stage) 2) Replace or suppress individiual passes with TargetPassConfig::substitutePass. In both cases, the command line options associated with the pass override the target default. For example, say a target wants to disable machine instruction scheduling by default: - The target calls disablePass(MachineSchedulerID) but otherwise does not override any TargetPassConfig methods. - Without any llc options, no scheduler is run. - With -enable-misched, the standard machine scheduler is run and honors the -misched=... flag to select the scheduler variant, which may be used for performance evaluation or testing. Sorry overridePass is ugly. I haven't thought of a better way without replacing the cl::opt framework. I hope to do that one day... I haven't figured out why CodeGen uses char& for pass IDs. AnalysisID is much easier to use and less bug prone. I'm using it wherever I can for internal implementation. Maybe later we can change the global pass ID definitions as well. llvm-svn: 150563
* Added TargetPassConfig::disablePass/substitutePass as a general mechanism to ↵Andrew Trick2012-02-153-12/+48
| | | | | | override specific passes. llvm-svn: 150562
* Don't emit live ranges for physregs live-ins that are dead.Lang Hames2012-02-151-2/+3
| | | | llvm-svn: 150553
* Disentangle moving a machine instr from updating LiveIntervals.Lang Hames2012-02-152-13/+9
| | | | llvm-svn: 150552
* Added hook to let targets custom lower splitting of illegal vectorsPete Cooper2012-02-151-0/+4
| | | | llvm-svn: 150550
* Use a temporary variable, rather then a series of redundant calls.Chad Rosier2012-02-151-4/+5
| | | | llvm-svn: 150538
* Stop custom lowering forr x86 DEC64m from happening if the load in the ↵Pete Cooper2012-02-151-0/+1
| | | | | | lowered sequence has more than 1 user llvm-svn: 150537
* Use a temporary variable, rather then a series of redundant calls.Chad Rosier2012-02-151-4/+5
| | | | llvm-svn: 150536
* Fix global live range splitting regmask accuracy.Jakob Stoklund Olesen2012-02-141-1/+2
| | | | | | | | Pretend that regmask interference ends at the 'dead' slot, even when there is other interference ending at the 'reg' slot of the same instruction. llvm-svn: 150531
* Fix details in local live range splitting with regmasks.Jakob Stoklund Olesen2012-02-141-6/+16
| | | | | | | Perform all comparisons at instruction granularity, and make sure register masks on uses count in both gaps. llvm-svn: 150530
* Handle regmasks in findRegisterDefOperandIdx().Jakob Stoklund Olesen2012-02-141-0/+4
| | | | | | | | | | | Only accept register masks when looking for an 'overlapping' def. When Overlap is not set, the function searches for a proper definition of Reg. This means MI->modifiesRegister() considers register masks, but MI->definesRegister() doesn't. llvm-svn: 150529
* Use the proper clobber check in handleLiveInRegister().Jakob Stoklund Olesen2012-02-141-1/+1
| | | | | | | | | | | | When a physreg is live in to a basic block, look for any instruction in the block that clobbers the physreg. The instruction doesn't have to properly redefine the register, any overlapping clobber is OK. This slightly changes live ranges when compiling with register masks. llvm-svn: 150528
* Dump live intervals in numerical order.Jakob Stoklund Olesen2012-02-141-4/+15
| | | | | | The old DenseMap hashed order was very confusing. llvm-svn: 150527
* Don't create a new copy of reserved regs - we already have one handy.Lang Hames2012-02-141-4/+2
| | | | llvm-svn: 150525
* Remove unnecessary assignment to temporary, ResultReg.Chad Rosier2012-02-141-8/+4
| | | | llvm-svn: 150520
* Using the new external-linkage warning recently added instead of disabling ↵Aaron Ballman2012-02-141-1/+1
| | | | | | all return type warnings. llvm-svn: 150512
* Fixing warning due to the new "UTD return type in extern 'C'".Aaron Ballman2012-02-141-2/+9
| | | | | | Patch by Matt Johnson llvm-svn: 150508
* Add code to the target lowering object file module to handle module flags.Bill Wendling2012-02-142-0/+64
| | | | | | | | The MachO back-end needs to emit the garbage collection flags specified in the module flags. This is a WIP, so the front-end hasn't been modified to emit these flags just yet. Documentation and front-end switching to occur soon. llvm-svn: 150507
* Update MachineVerifier to check the new physreg live-in rules.Lang Hames2012-02-141-0/+22
| | | | llvm-svn: 150496
* Tighten physical register invariants: Allocatable physical registers canLang Hames2012-02-141-9/+43
| | | | | | only be live in to a block if it is the function entry point or a landing pad. llvm-svn: 150494
* Fix PR12000. Some vector operations may use scalar operands with typesNadav Rotem2012-02-141-1/+5
| | | | | | | | that are greater than the vector element type. For example BUILD_VECTOR of type <1 x i1> with a constant i8 operand. This patch fixes the assertion. llvm-svn: 150477
* Turn push_back loops into append/insert.Benjamin Kramer2012-02-141-4/+2
| | | | llvm-svn: 150471
* Capitalize messages so that they appear nicely with the linker's error messages.Bill Wendling2012-02-141-9/+9
| | | | llvm-svn: 150466
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