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* Add SourceMgr to MCContext for backend diagnostics.Jim Grosbach2012-01-261-2/+2
| | | | llvm-svn: 149090
* Handle call-clobbered ymm registers on Win64.Jakob Stoklund Olesen2012-01-262-1/+8
| | | | | | | | | | | | | | The Win64 calling convention has xmm6-15 as callee-saved while still clobbering all ymm registers. Add a YMM_HI_6_15 pseudo-register that aliases the clobbered part of the ymm registers, and mark that as call-clobbered. This allows live xmm registers across calls. This hack wouldn't be necessary with RegisterMask operands representing the call clobbers, but they are not quite operational yet. llvm-svn: 149088
* progress making the world safe to ConstantDataVector. WhileChris Lattner2012-01-263-56/+64
| | | | | | | | we're at it, allow PatternMatch's "neg" pattern to match integer vector negations, and enhance ComputeNumSigned bits to handle shl of vectors. llvm-svn: 149082
* tidy up forward declarations.Chris Lattner2012-01-261-0/+2
| | | | llvm-svn: 149078
* smallvectorize and ArrayRef'ize some stuff.Chris Lattner2012-01-262-5/+5
| | | | llvm-svn: 149077
* Reduce a lot of code duplication by implementing Chris Lattner2012-01-261-138/+16
| | | | | | | | | ConstantExpr::getWithOperandReplaced and ConstantExpr::replaceUsesOfWithOnConstant in terms of ConstantExpr::getWithOperands. While we're at it, make sure that ConstantExpr::getWithOperands covers all instructions: it was missing insert/extractvalue. llvm-svn: 149076
* Update comment for r149070.Chad Rosier2012-01-261-3/+1
| | | | llvm-svn: 149075
* Replace the use of isPredicable() with isPredicated() inChad Rosier2012-01-261-3/+2
| | | | | | | | | MachineBasicBlock::canFallThrough(). We're interested in the state of the instruction (i.e., is this a barrier or not?), not if the instruction is predicable or not. rdar://10501092 llvm-svn: 149070
* Clear kill flags before propagating a copy.Jakob Stoklund Olesen2012-01-262-1/+20
| | | | | | | | | | The live range of the source register may be extended when a redundant copy is eliminated. Make sure any kill flags between the two copies are cleared. This fixes PR11765. llvm-svn: 149069
* Tidy up. Fix mismatched return types for error handling.Jim Grosbach2012-01-261-8/+4
| | | | llvm-svn: 149062
* Add support for the R_ARM_TARGET1 relocation, which should be given to ↵James Molloy2012-01-265-3/+25
| | | | | | | | relocations applied to all C++ constructors and destructors. This enables the linker to match concrete relocation types (absolute or relative) with whatever library or C++ support code is being linked against. llvm-svn: 149057
* Fix for the following bug in AVX codegen for double-to-int conversions:Victor Umansky2012-01-261-2/+2
| | | | | | | | | | | | | . "fptosi" and "fptoui" IR instructions are defined with round-to-zero rounding mode. . Currently for AVX mode for <4xdouble> and <8xdouble> the "VCVTPD2DQ.128" and "VCVTPD2DQ.256" instructions are selected (for .fp_to_sint. DAG node operation ) by AVX codegen. However they use round-to-nearest-even rounding mode. . Consequently, the conversion produces incorrect numbers. The fix is to replace selection of VCVTPD2DQ instructions with VCVTTPD2DQ instructions. The latter use truncate (i.e. round-to-zero) rounding mode. As .fp_to_sint. DAG node operation is used only for lowering of "fptosi" and "fptoui" IR instructions, the fix in X86InstrSSE.td definition file doesn.t have an impact on other LLVM flows. The patch includes changes in the .td file, LIT test for the changes and a fix in a legacy LIT test (which produced asm code conflicting with LLVN IR spec). llvm-svn: 149056
* Add HasXOP predicate check covering a bunch of XOP intrinsic patterns.Craig Topper2012-01-261-0/+2
| | | | llvm-svn: 149054
* Fix AVX vs SSE patterns ordering issue for VPCMPESTRM and VPCMPISTRM.Craig Topper2012-01-261-2/+4
| | | | llvm-svn: 149053
* Remove some more patterns by custom lowering intrinsics to target specific ↵Craig Topper2012-01-262-25/+14
| | | | | | nodes. llvm-svn: 149052
* unbreak test/Bitcode/shuffle.ll.Chris Lattner2012-01-261-0/+3
| | | | llvm-svn: 149033
* simplify by using ShuffleVectorInst::getMaskValue.Chris Lattner2012-01-261-10/+8
| | | | llvm-svn: 149029
* eliminate the Constant::getVectorElements method. There are better (andChris Lattner2012-01-264-61/+22
| | | | | | | more robust) ways to do what it was doing now. Also, add static methods for decoding a ShuffleVector mask. llvm-svn: 149028
* Continue improving support for ConstantDataAggregate, and use theChris Lattner2012-01-265-419/+149
| | | | | | new methods recently added to (sometimes greatly!) simplify code. llvm-svn: 149024
* Add a ConstantDataVector::getSplatValue() method, for parity withChris Lattner2012-01-261-39/+87
| | | | | | | | | | ConstantVector. Fix some outright bugs in the implementation of ConstantArray and Constant struct, which would cause us to not make one big UndefValue when asking for an array/struct with all undef elements. Enhance Constant::isAllOnesValue to work with ConstantDataVector. llvm-svn: 149021
* some general cleanup, using new methods and tidying up old code.Chris Lattner2012-01-262-95/+47
| | | | llvm-svn: 149006
* fix pasto in the new (and still unused) ShuffleVectorInst::getShuffleMask ↵Chris Lattner2012-01-261-1/+1
| | | | | | method. llvm-svn: 149005
* add StructType helpers too.Chris Lattner2012-01-261-0/+14
| | | | llvm-svn: 149000
* Ok, break down and add some cast<>'ing helper methods to the Type classChris Lattner2012-01-261-0/+39
| | | | | | | | | | | | to reduce the number of cast<>'s we have. This allows someone to use things like Ty->getVectorNumElements() instead of cast<VectorType>(Ty)->getNumElements() when you know that a type is a vector. It would be a great general cleanup to move the codebase to use these, I will do so in the code I'm touching. llvm-svn: 148999
* add some helper methods to ShuffleVectorInst and enhance itsChris Lattner2012-01-251-28/+55
| | | | | | | "isValidOperands" and "getMaskValue" methods to allow ConstantDataSequential. llvm-svn: 148998
* Improve sub-register def handling in ProcessImplicitDefs.Jakob Stoklund Olesen2012-01-251-9/+10
| | | | | | | | | This boils down to using MachineOperand::readsReg() more. This fixes PR11829 where a use ended up after the first def when lowering REG_SEQUENCE instructions involving IMPLICIT_DEFs. llvm-svn: 148996
* Properly emit ctors / dtors with priorities into desired sectionsAnton Korobeynikov2012-01-255-31/+81
| | | | | | | | and let linker handle the rest. This finally fixes PR5329 llvm-svn: 148990
* Don't add live ranges for aliases of physregs that are live in to theLang Hames2012-01-251-5/+0
| | | | | | | | function. They don't appear to be used, and are inconsistent with handling of other physreg intervals (i.e. intervals that are not live-in) where ranges are not inserted for aliases. llvm-svn: 148986
* Tidy up. s/Low Level Virtual Machine/LLVM/.Jim Grosbach2012-01-251-1/+1
| | | | | | LLVM isn't an acronym anymore. llvm-svn: 148985
* Always break upon finding a vreg operand (in Release as well as +Asserts). ↵Lang Hames2012-01-251-6/+1
| | | | | | Remove assertion which can no longer trigger. llvm-svn: 148984
* ARM assemly parsing and validation of IT instruction.Jim Grosbach2012-01-252-3/+14
| | | | | | | | | | "Although a Thumb2 instruction, the IT mnemonic shall be permitted in ARM mode, and the condition verified to match the condition code(s) on the following instruction(s)." PR11853 llvm-svn: 148969
* Use precomputed BB size instead of BB->size().Nick Lewycky2012-01-251-1/+1
| | | | llvm-svn: 148964
* fix a bug I introduced in r148929, this is not a splat!Chris Lattner2012-01-251-1/+5
| | | | | | Thanks to Eli for noticing. llvm-svn: 148947
* Gracefully degrade precision in branch probability numbers.Nick Lewycky2012-01-251-17/+72
| | | | llvm-svn: 148946
* Support pointer comparisons against constants, when looking at the inline-costNick Lewycky2012-01-251-1/+55
| | | | | | | | | savings from a pointer argument becoming an alloca. Sometimes callees will even compare a pointer to null and then branch to an otherwise unreachable block! Detect these cases and compute the number of saved instructions, instead of bailing out and reporting no savings. llvm-svn: 148941
* use Constant::getAggregateElement to simplify a bunch of code.Chris Lattner2012-01-255-179/+58
| | | | llvm-svn: 148934
* Custom lower PSIGN and PSHUFB intrinsics to their corresponding target ↵Craig Topper2012-01-254-74/+49
| | | | | | specific nodes so we can remove the isel patterns. llvm-svn: 148933
* constify some methods and add a new Constant::getAggregateElementChris Lattner2012-01-251-8/+41
| | | | | | | helper method for the common operation of extracting an element out of a constant aggregate. llvm-svn: 148931
* use ConstantVector::getSplat in a few places.Chris Lattner2012-01-256-53/+23
| | | | llvm-svn: 148929
* Custom lower phadd and phsub intrinsics to target specific nodes. Remove the ↵Craig Topper2012-01-253-63/+70
| | | | | | patterns that are no longer necessary. llvm-svn: 148927
* reapply r148901 with a crucial fix.Chris Lattner2012-01-251-31/+59
| | | | | | | "Introduce a new ConstantVector::getSplat constructor function to simplify a really common case." llvm-svn: 148924
* Remove AVX 256-bit unaligned load intrinsics. 128-bit versions had been ↵Craig Topper2012-01-251-4/+0
| | | | | | removed a while ago. llvm-svn: 148922
* Mark 64-bit register RA_64 unused too.Akira Hatanaka2012-01-251-4/+5
| | | | llvm-svn: 148918
* Modify MipsFrameLowering::emitPrologue and emitEpilogue.Akira Hatanaka2012-01-251-78/+68
| | | | | | | | | | | - Use MipsAnalyzeImmediate to expand immediates that do not fit in 16-bit. - Change the types of variables so that they are sufficiently large to handle 64-bit pointers. - Emit instructions to set register $28 in a function prologue after instructions which store callee-saved registers have been emitted. llvm-svn: 148917
* Modify MipsRegisterInfo::eliminateFrameIndex to use MipsAnalyzeImmediate toAkira Hatanaka2012-01-251-12/+34
| | | | | | | | expand offsets that do not fit in the 16-bit immediate field of load and store instructions. Also change the types of variables so that they are sufficiently large to handle 64-bit pointers. llvm-svn: 148916
* Merge intrinsic pattern and no pattern versions of VCVTSD2SI intruction ↵Craig Topper2012-01-251-24/+5
| | | | | | definitions. Matches non-AVX version of same instructions. llvm-svn: 148914
* MipsAnalyzeImmediate.h: Fix to add DataTypes.h for msvc.NAKAMURA Takumi2012-01-251-0/+1
| | | | | | inttypes.h is not supplied in msvc. llvm-svn: 148912
* Fix assert("msg"). Fix unused-variable warnings complaining about VT used onlyNick Lewycky2012-01-251-5/+8
| | | | | | in asserts. llvm-svn: 148910
* Target/Mips: Unbreak CMake build.NAKAMURA Takumi2012-01-251-0/+1
| | | | llvm-svn: 148909
* Lower 64-bit immediates using MipsAnalyzeImmediate that has just been added. Akira Hatanaka2012-01-252-31/+42
| | | | | | | Add a test case to show fewer instructions are needed to load an immediate with the new way of loading immediates. llvm-svn: 148908
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