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* Pass target triple string in to TargetMachine constructor.Daniel Dunbar2009-08-033-34/+70
| | | | | | | | | | | | | | | | | | | | | | | | | | This is not just a matter of passing in the target triple from the module; currently backends are making decisions based on the build and host architecture. The goal is to migrate to making these decisions based off of the triple (in conjunction with the feature string). Thus most clients pass in the target triple, or the host triple if that is empty. This has one important change in the way behavior of the JIT and llc. For the JIT, it was previously selecting the Target based on the host (naturally), but it was setting the target machine features based on the triple from the module. Now it is setting the target machine features based on the triple of the host. For LLC, -march was previously only used to select the target, the target machine features were initialized from the module's triple (which may have been empty). Now the target triple is taken from the module, or the host's triple is used if that is empty. Then the triple is adjusted to match -march. The take away is that -march for llc is now used in conjunction with the host triple to initialize the subtarget. If users want more deterministic behavior from llc, they should use -mtriple, or set the triple in the input module. llvm-svn: 77946
* Fix the instruction encoding.Rafael Espindola2009-08-031-2/+2
| | | | llvm-svn: 77944
* Remove a bitcast that was a no-op.Rafael Espindola2009-08-031-3/+1
| | | | | | Thanks to Eli Friedman for noticing it. llvm-svn: 77942
* Use movq to move 64 bits in and out of mmx registers.Rafael Espindola2009-08-032-3/+12
| | | | | | Fixes PR4669 llvm-svn: 77940
* Use the i12 variant of load / store opcodes if offset is zero. Now we pass ↵Evan Cheng2009-08-031-1/+5
| | | | | | all of multisource as well. llvm-svn: 77939
* Remove -disable-mips-abicall and -enable-mips-absolute-call command-line Eli Friedman2009-08-036-50/+26
| | | | | | | | | | | | | options, which don't appear to be useful. -enable-mips-absolute-call is completely unused (and unless I'm mistaken, is supposed to have the same effect that -relocation-model=dynamic-no-pic should have), and -disable-mips-abicall appears to be effectively a synonym for -relocation-model=static. Adjust the few users of hasABICall to checks which seem more appropriate. Update MipsSubtarget, MipsTargetMachine, and MipselTargetMachine to synchronize with recent changes. llvm-svn: 77938
* Restrict LDA to affine subscripts.Andreas Bolka2009-08-031-0/+18
| | | | llvm-svn: 77932
* Fix some comments referring to std::cerr.Daniel Dunbar2009-08-031-2/+2
| | | | llvm-svn: 77931
* - s/DOUT/DEBUG(errs()/gBill Wendling2009-08-035-41/+43
| | | | | | - Tidy up some headers. llvm-svn: 77929
* Move most targets TargetMachine constructor to only taking a target triple.Daniel Dunbar2009-08-0229-126/+83
| | | | | | - The C, C++, MSIL, and Mips backends still need the module. llvm-svn: 77927
* Add extra SEXT pattern.Richard Osborne2009-08-021-0/+16
| | | | llvm-svn: 77920
* The x86 jit doesn't generate a def_cfa_offset unwind instruction after theBill Wendling2009-08-021-1/+1
| | | | | | | | | | | | | pushes in the function prolog if the function doesn't have any stack space, i.e. for a prolog like: 0x40011870: push %r15 0x40011872: push %r14 0x40011874: push %rbx Patch by Zoltan! llvm-svn: 77919
* Normalize Subtarget constructors to take a target triple string instead ofDaniel Dunbar2009-08-0237-98/+59
| | | | | | | | | | Module*. Also, dropped uses of TargetMachine where unnecessary. The only target which still takes a TargetMachine& is Mips, I would appreciate it if someone would normalize this to match other targets. llvm-svn: 77918
* Remove unneeded intrinsics from Blackfin backend.Jakob Stoklund Olesen2009-08-021-7/+1
| | | | | | | | | | __builtin_bfin_ones does the same as ctpop, so it can be implemented in the front-end. __builtin_bfin_loadbytes loads from an unaligned pointer with the disalignexcpt instruction. It does the same as loading from a pointer with the low bits masked. It is better if the front-end creates a masked load. We can always instruction select the masked to disalignexcpt+load. We keep csync/ssync/idle. These intrinsics represent instructions that need workarounds for some silicon revisions. We may even want to convert inline assembler to intrinsics to enable the workarounds. llvm-svn: 77917
* Fix the build for people with oprofile installed.Nick Lewycky2009-08-021-3/+4
| | | | llvm-svn: 77914
* Empty arguments need to be quoted on Win32.Daniel Dunbar2009-08-021-3/+9
| | | | llvm-svn: 77913
* Fix issue in regscavenger when scavenging a callee-saved register that has ↵Jakob Stoklund Olesen2009-08-021-1/+8
| | | | | | not been spilled. llvm-svn: 77912
* One two many newlines at end of file LLVMContextImpl.cppEdward O'Callaghan2009-08-021-1/+0
| | | | llvm-svn: 77911
* Fix no newline at end of LLVMContextImpl.cppEdward O'Callaghan2009-08-021-1/+2
| | | | llvm-svn: 77907
* Never add a kill flag to a constrained physical register in a two-addr ↵Jakob Stoklund Olesen2009-08-021-0/+3
| | | | | | instruction. llvm-svn: 77906
* Scavenger asserts.Jakob Stoklund Olesen2009-08-021-2/+11
| | | | | | | Allow imp-def and imp-use of anything in the scavenger asserts, just like the machine code verifier. Allow redefinition of a sub-register of a live register. llvm-svn: 77904
* Add some basic blackfin intrinsics.Jakob Stoklund Olesen2009-08-021-1/+42
| | | | llvm-svn: 77903
* Add support for CPU features (i.e., bugs) and workarounds.Jakob Stoklund Olesen2009-08-024-8/+250
| | | | | | This is just the framework to identify the needed workarounds. They are not actually implemented. llvm-svn: 77902
* Inline assembly support for Blackfin.Jakob Stoklund Olesen2009-08-023-12/+137
| | | | | | We use the same constraints as GCC, including those that are slightly insane for inline assembler. llvm-svn: 77899
* Analog Devices Blackfin back-end.Jakob Stoklund Olesen2009-08-0229-0/+3790
| | | | | | | | | | | | | | Generate code for the Blackfin family of DSPs from Analog Devices: http://www.analog.com/en/embedded-processing-dsp/blackfin/processors/index.html We aim to be compatible with the exsisting GNU toolchain found at: http://blackfin.uclinux.org/gf/project/toolchain The back-end is experimental. llvm-svn: 77897
* Avoid forming a SELECT_CC in a type that the target doesn'tDan Gohman2009-08-021-1/+2
| | | | | | | | | | | | | | | | | | | support. This isn't immediately interesting, because Legalize ends up lowering SELECT_CC if the target doesn't support it, but this simplifies the process. Also, if the SELECT_CC would be expanded in Legalize, it can potentially end up with two copies of the condition expression. By leaving it as SELECT+SETCC, the SELECT can be expanded into two SELECTs that use a single SETCC. The two comparisons are usually CSE'd, but depending on when various expressions get legalized, the comparison expression could involve calls to library functions, such that the comparison expression may not be able to be CSE'd. This will be needed by a future patch. llvm-svn: 77896
* Fix indentation.Dan Gohman2009-08-021-301/+301
| | | | llvm-svn: 77895
* Add a comment.Dan Gohman2009-08-021-0/+1
| | | | llvm-svn: 77894
* Resync lea32addr and lea64addr.Dan Gohman2009-08-022-2/+3
| | | | llvm-svn: 77893
* Remove duplicated colons and spaces.Benjamin Kramer2009-08-021-15/+15
| | | | llvm-svn: 77892
* Handle <undef> flag in machine code verifier.Jakob Stoklund Olesen2009-08-021-1/+2
| | | | | | Use of an <undef> register is treated like an <imp-use>. It is not an error to use a dead <undef> register. llvm-svn: 77890
* move dwarf debug info section selection stuff from TAI toChris Lattner2009-08-0210-116/+143
| | | | | | TLOF, unifying all the dwarf targets at the same time. llvm-svn: 77889
* convert EHFrameSection to be managed by TLOF instead of TAI.Chris Lattner2009-08-025-9/+8
| | | | llvm-svn: 77888
* I need Triple information, 10.6 shouldn't set this, it bloats Chris Lattner2009-08-021-1/+2
| | | | | | object files. llvm-svn: 77887
* ARM TAI no longer needs a TM, but createTargetAsmInfo() still does.Chris Lattner2009-08-023-22/+11
| | | | llvm-svn: 77878
* Move the getInlineAsmLength virtual method from TAI to TII, whereChris Lattner2009-08-0212-213/+225
| | | | | | | | | | the only real caller (GetFunctionSizeInBytes) uses it. The custom ARM implementation of this is basically reimplementing an assembler poorly for negligible gain. It should be removed IMNSHO, but I'll leave that to ARMish folks to decide. llvm-svn: 77877
* move a virtual method body to its .cpp file to avoid a #include Chris Lattner2009-08-021-2/+9
| | | | | | in a header. llvm-svn: 77874
* turn some templated inline functions into static functions.Chris Lattner2009-08-022-14/+11
| | | | llvm-svn: 77873
* alpha TAI doesn't need TM.Chris Lattner2009-08-023-8/+3
| | | | llvm-svn: 77872
* MSP430 TAI doesn't need TM.Chris Lattner2009-08-023-4/+3
| | | | llvm-svn: 77871
* simplify SPULinuxTargetAsmInfo, remove use of TM.Chris Lattner2009-08-023-44/+16
| | | | llvm-svn: 77869
* xcore TAI doesn't need TM.Chris Lattner2009-08-023-4/+3
| | | | llvm-svn: 77868
* PIC16 TAI doesn't need TMChris Lattner2009-08-023-12/+7
| | | | llvm-svn: 77867
* remove the dead ELFTargetAsmInfo.h/cpp file. TargetAsmInfoChris Lattner2009-08-026-22/+1
| | | | | | defaults to being ELF. llvm-svn: 77866
* eliminate the TM argument to the TAI class, remove comment about supportingChris Lattner2009-08-023-8/+4
| | | | | | solaris :) llvm-svn: 77865
* eliminate TargetMAchine argument to sparc TAIChris Lattner2009-08-023-7/+4
| | | | llvm-svn: 77864
* remove TargetAsmInfo::TM, which is now dead. The basic TAI class now Chris Lattner2009-08-0224-61/+33
| | | | | | no longer depends on TM! llvm-svn: 77863
* remove the x86/ppc impls of getEHGlobalPrefix, which is already dead.Chris Lattner2009-08-024-17/+0
| | | | llvm-svn: 77861
* Add missing flush().Daniel Dunbar2009-08-021-0/+3
| | | | llvm-svn: 77859
* clean up #includes of TargetAsmInfo.cppChris Lattner2009-08-021-11/+0
| | | | llvm-svn: 77858
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