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* MC: Share the MCAsmLayout object, although its still not used for anything ↵Daniel Dunbar2010-03-221-15/+10
| | | | | | important. llvm-svn: 99202
* Rename one more NEON instruction that I missed earlier.Bob Wilson2010-03-221-1/+1
| | | | llvm-svn: 99201
* Fix a memory leak from DIE::addSiblingOffset() by adding the DIEValueJeffrey Yasskin2010-03-223-5/+9
| | | | | | it allocates to DwarfDebug::DIEValues. llvm-svn: 99196
* 80 col violation.Evan Cheng2010-03-221-1/+2
| | | | llvm-svn: 99195
* Regroup some instructions. No functional change.Bob Wilson2010-03-221-43/+43
| | | | llvm-svn: 99192
* Rename some VLD1/VST1 instructions to match the implementation, i.e., theBob Wilson2010-03-223-16/+16
| | | | | | | corresponding NEON instructions, instead of operation they are currently used for. llvm-svn: 99189
* Remove some redundant instruction classes.Bob Wilson2010-03-221-63/+16
| | | | llvm-svn: 99187
* Refactor instruction encoding arguments for VLDnLN/VSTnLN classes toBob Wilson2010-03-221-96/+96
| | | | | | specify encoding bits in arguments instead of "let" expressions. llvm-svn: 99185
* Completely remove Blackfin patterns that thought JustCC was i1.Jakob Stoklund Olesen2010-03-221-14/+1
| | | | | | Thanks, Chris! llvm-svn: 99183
* Don't leak a MachineInstruction from ↵Jeffrey Yasskin2010-03-221-0/+2
| | | | | | Thumb1InstrInfo::restoreCalleeSavedRegisters. llvm-svn: 99182
* backing out r99170 because it still fails on clang-x86_64-darwin10-fntGabor Greif2010-03-229-27/+19
| | | | llvm-svn: 99171
* Now that hopefully all direct accesses to InvokeInst operands are fixedGabor Greif2010-03-229-19/+27
| | | | | | we can reapply the InvokeInst operand reordering patch. (see r98957). llvm-svn: 99170
* Free all Constants in ~LLVMConstantImpl. We avoid assertion failuresJeffrey Yasskin2010-03-222-6/+27
| | | | | | | | | by dropping all references from all constants that can use other constants before trying to destroy any of them. I also had to free bugpoint's Module in ~BugDriver(). llvm-svn: 99160
* Re-add the Metadata.h include to LLVMContextImpl.h so that MDNode is completeJeffrey Yasskin2010-03-212-3/+1
| | | | | | | where FoldingSet<MDNode> is instantiated. Clang and MSVC complain; gcc doesn't. llvm-svn: 99147
* Move the LLVMContextImpl implementation into a .cpp file.Jeffrey Yasskin2010-03-213-69/+87
| | | | llvm-svn: 99146
* Memoize InlineAsms into the LLVMContext and delete them on shutdown.Jeffrey Yasskin2010-03-213-11/+68
| | | | | | Fixes PR803. llvm-svn: 99143
* Free SavedLI even if SimpleRegisterCoalescing::JoinCopy() returns early.Jeffrey Yasskin2010-03-211-4/+5
| | | | llvm-svn: 99113
* MC/X86: Fix an MCOperand link, when we parsing shrld $1,%eax and friends; I ↵Daniel Dunbar2010-03-201-1/+3
| | | | | | believe this fixes the last memory leaks under test/MC. llvm-svn: 99102
* TargetRegistry: Fix create{AsmInfo,MCDisassembler} to return non-const objects.Daniel Dunbar2010-03-204-5/+5
| | | | llvm-svn: 99097
* pr6652: Use LDM to restore PC to the return address on ARMv4.Bob Wilson2010-03-201-6/+11
| | | | | | Patch by John Tytgat! llvm-svn: 99096
* Re-commit r98683 ("remove redundant writeback flag from ARM address mode 6")Bob Wilson2010-03-209-165/+145
| | | | | | | with changes to add a separate optional register update argument. Change all the NEON instructions with address register writeback to use it. llvm-svn: 99095
* Add instruction variants for VST2, VST3, and VST4 "store-lane" operations withBob Wilson2010-03-201-0/+47
| | | | | | address register writeback. llvm-svn: 99094
* Add variants of VST2, VST3 and VST4 with address register writeback, andBob Wilson2010-03-201-30/+80
| | | | | | | rewrite the existing VST3 and VST4 instructions to use the same classes as the others. llvm-svn: 99093
* Add instructions for double-spaced VST3 and VST4 without address registerBob Wilson2010-03-201-27/+32
| | | | | | | | writeback, and refactor the existing double-spaced VST2 instructions. These are only for the disassembler since codegen doesn't use them, at least for now. llvm-svn: 99090
* Add a setCalledFunction member to InvokeInst (like in CallInst)Gabor Greif2010-03-202-3/+3
| | | | | | | and use this (as well as getCalledValue) to access the callee, instead of {g|s}etOperand(0). llvm-svn: 99084
* Add VST1 instructions with address register writeback.Bob Wilson2010-03-201-1/+47
| | | | llvm-svn: 99083
* Add instruction variants for VLD2, VLD3, and VLD4 "load-lane" operations withBob Wilson2010-03-201-0/+51
| | | | | | address register writeback. llvm-svn: 99082
* Tidy some more comments and whitespace.Bob Wilson2010-03-201-35/+29
| | | | llvm-svn: 99081
* Add variants of VLD2, VLD3 and VLD4 with address register writeback, andBob Wilson2010-03-201-32/+82
| | | | | | | rewrite the existing VLD3 and VLD4 instructions to use the same classes as the others. llvm-svn: 99080
* Tidy some comments and whitespace for consistency.Bob Wilson2010-03-201-8/+7
| | | | llvm-svn: 99078
* Rename some instructions for consistency and sanity: use "_UPD" suffix forBob Wilson2010-03-203-116/+132
| | | | | | | | load/stores with address register writeback, and use "odd" suffix to distinguish instructions to access odd numbered registers (instead of "a" and "b"). No functional changes. llvm-svn: 99066
* Add instructions for double-spaced VLD3 and VLD4 without address registerBob Wilson2010-03-201-25/+30
| | | | | | | | writeback, and refactor the existing double-spaced VLD2 instructions. These are only for the disassembler since codegen doesn't use them, at least for now. llvm-svn: 99065
* Add VLD1 instructions with address register writeback.Bob Wilson2010-03-201-1/+48
| | | | llvm-svn: 99062
* PIC16: Simplify code by using a std::set<std::string> instead of a sorted & ↵Benjamin Kramer2010-03-202-20/+6
| | | | | | uniqued std::list of leaked char*. llvm-svn: 99061
* Revert the rest of 98679.Bob Wilson2010-03-201-4/+0
| | | | | | | --- Reverse-merging r98679 into 'lib/Target/ARM/ARMInstrVFP.td': U lib/Target/ARM/ARMInstrVFP.td llvm-svn: 99049
* Fix a very bad typo. Since the register number was off by one, the ARMBob Wilson2010-03-201-1/+1
| | | | | | | | load/store optimizer would incorrectly think that registers D26 and D28 were consecutive and would generate a VLDM instruction to load them. The assembler was not convinced. llvm-svn: 99043
* Clear the SCEVExpander's insertion point after making deletions,Dan Gohman2010-03-201-0/+4
| | | | | | | | | | | | | | so that the SCEVExpander doesn't retain a dangling pointer as its insert position. The dangling pointer in this case wasn't ever used to insert new instructions, but it was causing trouble with SCEVExpander's code for automatically advancing its insert position past debug intrinsics. This fixes use-after-free errors that valgrind noticed in test/Transforms/IndVarSimplify/2007-06-06-DeleteDanglesPtr.ll and test/Transforms/IndVarSimplify/exit_value_tests.ll. llvm-svn: 99036
* If call result is in ST0 and it is not being passed to the caller'sEvan Cheng2010-03-201-0/+22
| | | | | | | caller, then it is not safe to optimize the call into a sibcall since the call result has to be popped off the x87 stack. llvm-svn: 99032
* Better fix for r98994, MachObjectWriterImpl wasn't intended to be virtual.Daniel Dunbar2010-03-201-8/+5
| | | | llvm-svn: 99031
* Add NLdStFrm Format.Johnny Chen2010-03-201-6/+9
| | | | llvm-svn: 99014
* Revert r98679. The disassembler will be updated to depend on the existence ofJohnny Chen2010-03-191-6/+2
| | | | | | | IndexModeUpd and then populates the Inst{21}=1 while populating the instructions for disassembly. llvm-svn: 99013
* Revert this change, since it was causing ARM performance regressions.Bob Wilson2010-03-196-69/+79
| | | | | | | | | | | | --- Reverse-merging r98889 into '.': U lib/Target/ARM/ARMInstrNEON.td U lib/Target/ARM/ARMISelLowering.h U lib/Target/ARM/ARMInstrInfo.td U lib/Target/ARM/ARMInstrVFP.td U lib/Target/ARM/ARMISelLowering.cpp U lib/Target/ARM/ARMInstrFormats.td llvm-svn: 99010
* Fix more places to more thoroughly ignore debug intrinsics. This fixesDan Gohman2010-03-191-5/+13
| | | | | | | | use-before-def errors in SCEVExpander-produced code in sqlite3 when debug info with optimization is enabled, though the testcases for this are dependent on use-list order. llvm-svn: 99001
* remove the patterns that I commented out in r98930, Dan verified Chris Lattner2010-03-192-324/+0
| | | | | | that they are dead. llvm-svn: 99000
* Fix -Wnon-virtual-dtor warning.Rafael Espindola2010-03-191-0/+2
| | | | llvm-svn: 98994
* call void @llvm.dbg.declare(metadata !{i32* null}, metadata !1)Devang Patel2010-03-191-4/+0
| | | | | | is valid, but not useful, when variable identified by !1 is optimized away by the optimizer. llvm-svn: 98986
* Fixed the encoding problems of the crc32 instructions. All had the Operand sizeKevin Enderby2010-03-191-20/+31
| | | | | | | | | override prefix and only the r/m16 forms should have had that. Also for variant one, the AT&T syntax, added suffixes to all forms. Also added the missing 64-bit form for 'CRC32 r64, r/m8'. Plus added test cases for all forms and tweaked one test case to add the needed suffixes. llvm-svn: 98980
* Stop trying to merge identical jump tables. This had been inadvertentlyBob Wilson2010-03-192-39/+6
| | | | | | | | | | | disabled for several months (since svn r88806) and no one noticed. My fix for pr6543 yesterday reenabled it, but broke the ARM port's code for using TBB/TBH. Rather than adding a target hook to disable merging for Thumb2 only, I'm just taking this out. It is not common to have identical jump tables, the code we used to merge them was O(N^2), and it only helps code size, not performance. llvm-svn: 98977
* MC/Mach-O/x86_64: Add relocation support.Daniel Dunbar2010-03-191-0/+213
| | | | | | | | - This is "extraordinarily" Darwin 'as' compatible. See the litany of FIXMEs littered about for more information. - There are a few cases which seem to clearly be 'as' bugs which I have left unsupported, and there is one cases where we diverge but should fix if it blocks diffing .o files (Darwin 'as' ends up widening a jump unnecessarily). - 403.gcc build, runs, and diffs equivalently to the 'as' built version now (using llvm-mc). However, it builds so slowly that I wouldn't recommend trying it quite yet. :) llvm-svn: 98974
* MC/X86: Rename alternate spellings of {ADD64,CMP64} and mark as "code gen ↵Daniel Dunbar2010-03-191-8/+16
| | | | | | only" so they don't get selected by the asm matcher. llvm-svn: 98972
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