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* 64-bit atomic cmpxchg for ARM.Eli Friedman2011-08-314-37/+93
| | | | llvm-svn: 138868
* Fix typo. Patch by Liu.Akira Hatanaka2011-08-311-1/+1
| | | | llvm-svn: 138866
* Compress Repeated Byte OutputDavid Greene2011-08-311-3/+59
| | | | | | | Emit a repeated sequence of bytes using .zero. This saves an enormous amount of asm file space for certain programs. llvm-svn: 138864
* Tweak Thumb1 ADD encoding selection a bit.Jim Grosbach2011-08-311-2/+5
| | | | | | | | When the destination register of an add immediate instruction is explicitly specified, encoding T1 is preferred, else encoding T2 is preferred. llvm-svn: 138862
* Put VMOVS widening under a command line option, off by default.Jakob Stoklund Olesen2011-08-311-1/+6
| | | | | | | | | | | It appears that our use of the imp-use and imp-def flags with sub-registers is not yet robust enough to support this. The failing test case is complicated, I am working on a reduction. <rdar://problem/10044201> llvm-svn: 138861
* Spelling and grammar fixes to problems found by Duncan.Rafael Espindola2011-08-312-6/+6
| | | | llvm-svn: 138858
* Make sure we don't crash when -miphoneos-version-min is specified on x86. ↵Eli Friedman2011-08-311-1/+2
| | | | | | Hopefully this will fix gcc testsuite failures. llvm-svn: 138856
* Rework this conditional a bit.Eric Christopher2011-08-311-6/+10
| | | | | | Patch by Sanjoy Das llvm-svn: 138853
* - Move all MOVSS and MOVSD patterns close to their definitionsBruno Cardoso Lopes2011-08-312-144/+239
| | | | | | | | - Duplicate some store patterns to their AVX forms! - Catched a bug while restricting the patterns subtarget, fix it and update a testcase to check it properly llvm-svn: 138851
* Remove unnecessary AVX checksBruno Cardoso Lopes2011-08-311-3/+3
| | | | llvm-svn: 138850
* Teach more places to use VMOVAPS,VMOVUPS instead of MOVAPS,MOVUPS,Bruno Cardoso Lopes2011-08-312-6/+16
| | | | | | whenever AVX is enabled. llvm-svn: 138849
* Fix (movhps load) lowering / pattern to match more cases. rdar://10050549Evan Cheng2011-08-312-3/+7
| | | | llvm-svn: 138848
* Some minor cleanups for r138845.Eli Friedman2011-08-311-22/+0
| | | | llvm-svn: 138846
* Some 64-bit atomic operations on ARM. 64-bit cmpxchg coming next.Eli Friedman2011-08-314-1/+277
| | | | llvm-svn: 138845
* Remove the old tail duplication pass. It is not used and is unable to updateRafael Espindola2011-08-303-375/+0
| | | | | | | ssa, so it has to be run really early in the pipeline. Any replacement should probably use the SSAUpdater. llvm-svn: 138841
* Fix issues with disassembly of IT instructions involving condition codes ↵Owen Anderson2011-08-302-30/+32
| | | | | | other the EQ/NE. Discovered by roundtrip testing. llvm-svn: 138840
* Fix encoding of CBZ/CBNZ Thumb2 instructions with immediate offsets rather ↵Owen Anderson2011-08-301-1/+4
| | | | | | than labels. llvm-svn: 138837
* Teach macho-dump to dump the uleb128s referred to by linkedit_data segments.Benjamin Kramer2011-08-301-0/+26
| | | | llvm-svn: 138836
* Fix encoding of PC-relative Thumb1 LDR's when using immediate offsets ↵Owen Anderson2011-08-301-1/+4
| | | | | | instead of labels. llvm-svn: 138835
* Fix encoding of Thumb1 B instructions with immediate offsets, which is ↵Owen Anderson2011-08-301-1/+4
| | | | | | necessary for round-tripping. llvm-svn: 138834
* Clean up whitespace.Owen Anderson2011-08-301-8/+8
| | | | llvm-svn: 138833
* Fix off-by-one error Benjamin noticed.Bill Wendling2011-08-301-1/+1
| | | | llvm-svn: 138832
* Speculatively revert r138809 in an attempt to fix DragonEgg.Owen Anderson2011-08-301-2/+1
| | | | llvm-svn: 138829
* Enable compact unwind info by default. This only applies to Darwin when CFI isBill Wendling2011-08-301-9/+1
| | | | | | disabled. llvm-svn: 138826
* Fix C++0x narrowing errors when char is unsigned.Jeffrey Yasskin2011-08-304-5/+5
| | | | | | | In the case of EDInstInfo, this would actually cause a bug when -1 became 255 and was then compared >=0 in llvm-mc/Disassembler.cpp. llvm-svn: 138825
* Adds support for variable sized allocas. For a variable sized alloca,Rafael Espindola2011-08-302-15/+166
| | | | | | | | | | | | code is inserted to first check if the current stacklet has enough space. If so, space is allocated by simply decrementing the stack pointer. Otherwise a runtime routine (__morestack_allocate_stack_space in libgcc) is called which allocates the required memory from the heap. Patch by Sanjoy Das. llvm-svn: 138818
* Adds a SelectionDAG node X86SegAlloca which will be custom loweredRafael Espindola2011-08-304-0/+31
| | | | | | | | | | | | from DYNAMIC_STACKALLOC. Two new pseudo instructions (SEG_ALLOCA_32 and SEG_ALLOCA_64) which will match X86SegAlloca (based on word size) are also added. They will be custom emitted to inject the actual stack handling code. Patch by Sanjoy Das. llvm-svn: 138814
* Emit segmented-stack specific code into function prologues forRafael Espindola2011-08-305-3/+182
| | | | | | | | | | | | X86. Modify the pass added in the previous patch to call this new code. This new prologues generated will call a libgcc routine (__morestack) to allocate more stack space from the heap when required Patch by Sanjoy Das. llvm-svn: 138812
* Command line option to enable support for segmented stacks:Rafael Espindola2011-08-301-0/+7
| | | | | | | -segmented-stacks. Patch by Sanjoy Das! llvm-svn: 138811
* Follow up to r138791.Evan Cheng2011-08-306-2/+44
| | | | | | | | | | | | Add a instruction flag: hasPostISelHook which tells the pre-RA scheduler to call a target hook to adjust the instruction. For ARM, this is used to adjust instructions which may be setting the 's' flag. ADC, SBC, RSB, and RSC instructions have implicit def of CPSR (required since it now uses CPSR physical register dependency rather than "glue"). If the carry flag is used, then the target hook will *fill in* the optional operand with CPSR. Otherwise, the hook will remove the CPSR implicit def from the MachineInstr. llvm-svn: 138810
* When walking backwards to eliminate final stores to allocas at the end of a ↵Owen Anderson2011-08-301-1/+2
| | | | | | function, encountering an unrelated store should not cause us to give up like encountering a load does. llvm-svn: 138809
* Teach macho-dump how to dump linkedit_data load commands.Benjamin Kramer2011-08-301-0/+12
| | | | llvm-svn: 138807
* Set CR1EQ only when lowering vararg floating arguments (not any varargRoman Divacky2011-08-302-2/+10
| | | | | | arguments as before), unset CR1EQ otherwise. llvm-svn: 138802
* Fix typos in SPUMCTargetDesc.hJames Molloy2011-08-301-2/+2
| | | | | | Patch supplied by Liu (projlc@gmail.com) llvm-svn: 138799
* Fix typo in BlackfinFrameLowering.hJames Molloy2011-08-301-2/+2
| | | | | | Patch supplied by Liu (projlc@gmail.com) llvm-svn: 138798
* Fix typo in MSP430MCTargetDesc.h.James Molloy2011-08-301-2/+2
| | | | | | Patch supplied by Liu (projlc@gmail.com) llvm-svn: 138797
* Fix typo in MipsMCTargetDesc.h; Patch supplied by Liu (proljc@gmail.com)James Molloy2011-08-301-4/+4
| | | | llvm-svn: 138796
* Do not try to rematerialize a value from a partial definition.Bob Wilson2011-08-301-1/+22
| | | | | | | I don't currently have a good testcase for this; will try to get one tomorrow. <rdar://problem/10032939> llvm-svn: 138794
* Change ARM / Thumb2 addc / adde and subc / sube modeling to use physicalEvan Cheng2011-08-307-346/+358
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | register dependency (rather than glue them together). This is general goodness as it gives scheduler more freedom. However it is motivated by a nasty bug in isel. When a i64 sub is expanded to subc + sube. libcall #1 \ \ subc \ / \ \ / \ \ / libcall #2 sube If the libcalls are not serialized (i.e. both have chains which are dag entry), legalizer can serialize them in arbitrary orders. If it's unlucky, it can force libcall #2 before libcall #1 in the above case. subc | libcall #2 | libcall #1 | sube However since subc and sube are "glued" together, this ends up being a cycle when the scheduler combine subc and sube as a single scheduling unit. The right solution is to fix LegalizeType too chains the libcalls together. However, LegalizeType is not processing nodes in order so that's harder than it should be. For now, the move to physical register dependency will do. rdar://10019576 llvm-svn: 138791
* Revert 138781. It's not playing nicely with the immediate forms for ADC.Jim Grosbach2011-08-291-20/+0
| | | | llvm-svn: 138782
* Thumb2 assembler aliases for ADC/SBC w/o the .w suffix.Jim Grosbach2011-08-291-0/+20
| | | | llvm-svn: 138781
* Add missing encoding information for some of the GPR<->FP register moves.Owen Anderson2011-08-291-2/+23
| | | | llvm-svn: 138780
* Thumb2 parsing and encoding for IT blocks.Jim Grosbach2011-08-292-23/+108
| | | | llvm-svn: 138773
* Explicitly zero out parts of a vector which are required to be zero by the ↵Eli Friedman2011-08-291-0/+3
| | | | | | algorithm in LowerUINT_TO_FP_i32. This only has a substantial effect on the generated code when the input is extracted from a vector register; other ways of loading an i32 do the appropriate zeroing implicitly. Fixes PR10802. llvm-svn: 138768
* Apply the same fix for the change in LDR_PRE_IMM/LDRB_PRE_IMM operand ↵Owen Anderson2011-08-291-1/+2
| | | | | | encodings to the load-store optimizer that I applied to the instruction selector in r138758. Fixes ary3 from the nightly test suite. llvm-svn: 138766
* Fix grammar, noticed by Duncan.Bill Wendling2011-08-291-1/+1
| | | | llvm-svn: 138764
* Specify an additional fixed bit in the PLD/PLDW/PLI register-register encoding.Owen Anderson2011-08-291-0/+1
| | | | llvm-svn: 138760
* addrmode_imm12 and addrmode2_offset encode their immediate values ↵Owen Anderson2011-08-291-4/+28
| | | | | | differently. Update the manual instruction selection code that was encoding them the addrmode2 way even though LDR_PRE_IMM/LDRB_PRE_IMM had switched to addrmode_imm12. Should fix a number of nightly test failures. llvm-svn: 138758
* Fixes following the CR by Chris and Duncan:Nadav Rotem2011-08-293-19/+11
| | | | | | | Optimize chained bitcasts of the form A->B->A. Undo r138722 and change isEliminableCastPair to allow this case. llvm-svn: 138756
* Improve handling of #-0 offsets for many more pre-indexed addressing modes.Owen Anderson2011-08-293-6/+15
| | | | llvm-svn: 138754
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