| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Use names instead of numbers for some of the magic | Dale Johannesen | 2009-10-09 | 2 | -9/+10 |
| | | | | | | | | constants used in inlining heuristics (especially those used in more than one file). No functional change. llvm-svn: 83675 | ||||
| * | Added another bit of the ARM target assembler to llvm-mc to parse register | Kevin Enderby | 2009-10-09 | 1 | -21/+104 |
| | | | | | | | | | | | | lists. Changed ARMAsmParser::MatchRegisterName to return -1 instead of 0 on errors so 0-15 values could be returned as register numbers. Also added the rest of the arm register names to the currently hacked up version to allow more testing. Some changes to ARMAsmParser::ParseOperand to give different errors for things not yet supported and some additions to the hacked ARMAsmParser::MatchInstruction to allow more testing for now. llvm-svn: 83673 | ||||
| * | isTriviallyReMaterializable checks the | Dan Gohman | 2009-10-09 | 4 | -7/+4 |
| | | | | | | | | TargetInstrDesc::isRematerializable flag, so it isn't necessary to do this check in its callers. llvm-svn: 83671 | ||||
| * | Fix the x86 test-shrink optimization so that it doesn't shrink comparisons | Dan Gohman | 2009-10-09 | 1 | -4/+74 |
| | | | | | | | | | when one of the bits being tested would end up being the sign bit in the narrower type, and a signed comparison is being performed, since this would change the result of the signed comparison. This fixes PR5132. llvm-svn: 83670 | ||||
| * | Add basic infrastructure and x86 support for preserving MachineMemOperand | Dan Gohman | 2009-10-09 | 3 | -3/+99 |
| | | | | | | | information when unfolding memory references. llvm-svn: 83656 | ||||
| * | Check invalid debug info for enums. This may happen when underlyng enum is ↵ | Devang Patel | 2009-10-09 | 1 | -2/+4 |
| | | | | | | | optimized away. Eventually DwarfChecker will clean this up during llvm verification stage. llvm-svn: 83655 | ||||
| * | when previous scratch register is killed, flag the value as no longer tracking | Jim Grosbach | 2009-10-09 | 1 | -1/+4 |
| | | | | | llvm-svn: 83653 | ||||
| * | Revert r83606 and add comments explaining why it isn't safe. | Dan Gohman | 2009-10-09 | 1 | -12/+10 |
| | | | | | llvm-svn: 83649 | ||||
| * | Give Dan and my recent changes, machine LICM is now code size neutral. | Evan Cheng | 2009-10-09 | 1 | -4/+0 |
| | | | | | llvm-svn: 83624 | ||||
| * | Fix a logic error that caused non-rematable loop invariants loads to be ↵ | Evan Cheng | 2009-10-09 | 1 | -2/+1 |
| | | | | | | | licm'ed out of loop. llvm-svn: 83622 | ||||
| * | Reset kill markers after live interval is reconstructed. | Evan Cheng | 2009-10-09 | 1 | -6/+22 |
| | | | | | llvm-svn: 83608 | ||||
| * | Preserve HasNSW and HasNUW when constructing SCEVs for Add and Mul | Dan Gohman | 2009-10-09 | 1 | -4/+12 |
| | | | | | | | instructions. llvm-svn: 83606 | ||||
| * | When considering whether to inline Callee into Caller, | Dale Johannesen | 2009-10-09 | 1 | -6/+70 |
| | | | | | | | | | | and that will make Caller too big to inline, see if it might be better to inline Caller into its callers instead. This situation is described in PR 2973, although I haven't tried the specific case in SPASS. llvm-svn: 83602 | ||||
| * | Add the ability to track HasNSW and HasNUW on more kinds of SCEV expressions. | Dan Gohman | 2009-10-09 | 1 | -12/+22 |
| | | | | | llvm-svn: 83601 | ||||
| * | Add codegen support for NEON vst4lane intrinsics with 128-bit vectors. | Bob Wilson | 2009-10-09 | 3 | -14/+81 |
| | | | | | llvm-svn: 83600 | ||||
| * | Add codegen support for NEON vst3lane intrinsics with 128-bit vectors. | Bob Wilson | 2009-10-08 | 3 | -13/+77 |
| | | | | | llvm-svn: 83598 | ||||
| * | Add codegen support for NEON vst2lane intrinsics with 128-bit vectors. | Bob Wilson | 2009-10-08 | 3 | -13/+75 |
| | | | | | llvm-svn: 83596 | ||||
| * | Add codegen support for NEON vld4lane intrinsics with 128-bit vectors. | Bob Wilson | 2009-10-08 | 3 | -19/+105 |
| | | | | | | | Also fix some copy-and-paste errors in previous changes. llvm-svn: 83590 | ||||
| * | Remove code that makes no sense. | Evan Cheng | 2009-10-08 | 1 | -2/+0 |
| | | | | | llvm-svn: 83589 | ||||
| * | Add codegen support for NEON vld3lane intrinsics with 128-bit vectors. | Bob Wilson | 2009-10-08 | 3 | -20/+99 |
| | | | | | llvm-svn: 83585 | ||||
| * | Update CMake build yet again after a source file was removed | Douglas Gregor | 2009-10-08 | 1 | -1/+0 |
| | | | | | llvm-svn: 83575 | ||||
| * | It's possible for a global variable to be optimized out of a metadata object. So | Bill Wendling | 2009-10-08 | 1 | -1/+1 |
| | | | | | | | we should allow a "null" with this dyn_cast. llvm-svn: 83573 | ||||
| * | Use lower16 / upper16 imm modifiers to asmprint 32-bit imms splitted via ↵ | Anton Korobeynikov | 2009-10-08 | 1 | -3/+4 |
| | | | | | | | movt/movw pair. llvm-svn: 83572 | ||||
| * | Clear variable debug info map at the end of the function. | Devang Patel | 2009-10-08 | 1 | -0/+3 |
| | | | | | llvm-svn: 83571 | ||||
| * | Add codegen support for NEON vld2lane intrinsics with 128-bit vectors. | Bob Wilson | 2009-10-08 | 3 | -12/+85 |
| | | | | | llvm-svn: 83568 | ||||
| * | Clean up some unnecessary initializations. | Bob Wilson | 2009-10-08 | 1 | -2/+2 |
| | | | | | llvm-svn: 83566 | ||||
| * | Clean up a comment (indentation was wrong). | Bob Wilson | 2009-10-08 | 1 | -1/+2 |
| | | | | | llvm-svn: 83565 | ||||
| * | Add a SelectionDAG getTargetInsertSubreg convenience function, | Bob Wilson | 2009-10-08 | 1 | -0/+11 |
| | | | | | | | similar to getTargetExtractSubreg. llvm-svn: 83564 | ||||
| * | Do not record line number to implicitly mark start of function if function ↵ | Devang Patel | 2009-10-08 | 2 | -12/+23 |
| | | | | | | | has arguments. Extra line number entries trip gdb in some cases. llvm-svn: 83563 | ||||
| * | Add missing names for the XCore specific LADD and LSUB nodes. | Richard Osborne | 2009-10-08 | 1 | -0/+2 |
| | | | | | llvm-svn: 83556 | ||||
| * | Add a form of addPreserved which takes a string argument, to allow passes | Dan Gohman | 2009-10-08 | 3 | -16/+30 |
| | | | | | | | | | to declare that they preserve other passes without needing to pull in additional header file or library dependencies. Convert MachineFunctionPass and CodeGenLICM to make use of this. llvm-svn: 83555 | ||||
| * | Add some peepholes for signed comparisons using ashr X, X, 32. | Richard Osborne | 2009-10-08 | 1 | -0/+16 |
| | | | | | llvm-svn: 83549 | ||||
| * | remove LoopVR pass. According to Nick: | Chris Lattner | 2009-10-08 | 1 | -297/+0 |
| | | | | | | | | "LoopVR's logic was copied into ScalarEvolution::getUnsignedRange and ::getSignedRange. Please delete LoopVR." llvm-svn: 83531 | ||||
| * | Add codegen support for NEON vst4 intrinsics with <1 x i64> vectors. | Bob Wilson | 2009-10-08 | 3 | -0/+6 |
| | | | | | llvm-svn: 83526 | ||||
| * | Cleanup up unused R3LiveIn tracking. | Jim Grosbach | 2009-10-08 | 2 | -19/+2 |
| | | | | | llvm-svn: 83522 | ||||
| * | Re-enable register scavenging in Thumb1 by default. | Jim Grosbach | 2009-10-08 | 4 | -74/+16 |
| | | | | | llvm-svn: 83521 | ||||
| * | bugfix. The target may use virtual registers that aren't tracked for re-use ↵ | Jim Grosbach | 2009-10-08 | 2 | -20/+27 |
| | | | | | | | but are allocated by the scavenger. The re-use algorithm needs to watch for that. llvm-svn: 83519 | ||||
| * | Add codegen support for NEON vst3 intrinsics with <1 x i64> vectors. | Bob Wilson | 2009-10-08 | 3 | -0/+6 |
| | | | | | llvm-svn: 83518 | ||||
| * | Add codegen support for NEON vst2 intrinsics with <1 x i64> vectors. | Bob Wilson | 2009-10-08 | 3 | -0/+5 |
| | | | | | llvm-svn: 83513 | ||||
| * | In instcombine's debug output, avoid printing ADD for instructions that are | Jeffrey Yasskin | 2009-10-08 | 1 | -3/+5 |
| | | | | | | | | already on the worklist, and print Visited when an instruction is about to be visited. Net, on one input, this reduced the output size by at least 9x. llvm-svn: 83510 | ||||
| * | Add codegen support for NEON vld4 intrinsics with <1 x i64> vectors. | Bob Wilson | 2009-10-07 | 3 | -0/+6 |
| | | | | | llvm-svn: 83508 | ||||
| * | Add codegen support for NEON vld3 intrinsics with <1 x i64> vectors. | Bob Wilson | 2009-10-07 | 3 | -0/+6 |
| | | | | | llvm-svn: 83506 | ||||
| * | Add codegen support for NEON vld2 intrinsics with <1 x i64> vectors. | Bob Wilson | 2009-10-07 | 3 | -0/+5 |
| | | | | | llvm-svn: 83502 | ||||
| * | reverting thumb1 scavenging default due to test failure while I figure out ↵ | Jim Grosbach | 2009-10-07 | 4 | -15/+74 |
| | | | | | | | what's up. llvm-svn: 83501 | ||||
| * | second half of lazy liveness removal. | Chris Lattner | 2009-10-07 | 1 | -1/+0 |
| | | | | | llvm-svn: 83500 | ||||
| * | Fix handling of x86 'R' constraint. | Dale Johannesen | 2009-10-07 | 1 | -1/+8 |
| | | | | | llvm-svn: 83499 | ||||
| * | Enable thumb1 register scavenging by default. | Jim Grosbach | 2009-10-07 | 2 | -10/+6 |
| | | | | | llvm-svn: 83496 | ||||
| * | Enable thumb1 register scavenging by default. | Jim Grosbach | 2009-10-07 | 2 | -64/+9 |
| | | | | | llvm-svn: 83494 | ||||
| * | Extract subprogram and compile unit information from the debug info attached ↵ | Devang Patel | 2009-10-07 | 1 | -0/+29 |
| | | | | | | | to an instruction. llvm-svn: 83491 | ||||
| * | Add some instruction encoding bits for NEON load/store instructions. | Bob Wilson | 2009-10-07 | 2 | -140/+165 |
| | | | | | llvm-svn: 83490 | ||||

