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* Fix an issue where a use might be selected before a def, and then we didn't ↵Owen Anderson2008-08-301-8/+23
| | | | | | | | | | | respect the pre-chosen vreg assignment when selecting the def. This is the naive solution to the problem: insert a copy to the pre-chosen vreg. Other solutions might be preferable, such as: 1) Passing the dest reg into FastEmit_. However, this would require the higher level code to know about reg classes, which they don't currently. 2) Selecting blocks in reverse postorder. This has some compile time cost for computing the order, and we'd need to measure its impact. llvm-svn: 55555
* Add ppc partial-word ATOMIC_CMP_SWAP.Dale Johannesen2008-08-301-4/+143
| | | | llvm-svn: 55554
* Swap fp comparison operands and change predicate to allow load folding ↵Evan Cheng2008-08-291-16/+50
| | | | | | (safely this time). llvm-svn: 55553
* Use static_cast instead of C style cast.Evan Cheng2008-08-291-1/+2
| | | | llvm-svn: 55552
* Fix 80 col. violations.Evan Cheng2008-08-291-2/+4
| | | | llvm-svn: 55551
* Back out 55498. It broken Apple style bootstrapping.Evan Cheng2008-08-291-106/+81
| | | | llvm-svn: 55549
* Backing out 55521. Not safe.Evan Cheng2008-08-293-49/+5
| | | | llvm-svn: 55548
* Add partial word version of ATOMIC_SWAP.Dale Johannesen2008-08-291-50/+29
| | | | llvm-svn: 55546
* Add initial support for fast isel of instructions that have inputs pinned to ↵Owen Anderson2008-08-291-0/+1
| | | | | | physical registers. llvm-svn: 55545
* regenerateChris Lattner2008-08-293-1455/+1531
| | | | llvm-svn: 55542
* Asmprint nameless instructions as:Chris Lattner2008-08-291-1/+8
| | | | | | | | | | | | | %4 = add ... instead of: add ... ; 4 This makes opt -print-cfg output actually usable and makes .ll files generally easier to read. This fixes PR2480 llvm-svn: 55541
* Add support for parsing .ll files that have numbers in front ofChris Lattner2008-08-291-5/+39
| | | | | | | | | | nameless values, such as: %3 = add i32 4, 2 This fixes the first half of PR2480 llvm-svn: 55539
* TableGen'ing instruction encodings.Evan Cheng2008-08-291-1/+2
| | | | llvm-svn: 55533
* addrmode1 (data processing) instruction encoding: bits 5-6 are 0, bits 7-10 ↵Evan Cheng2008-08-291-3/+10
| | | | | | encode the opcode. llvm-svn: 55531
* MVN is addrmode1.Evan Cheng2008-08-291-7/+7
| | | | llvm-svn: 55530
* More refactoring.Evan Cheng2008-08-292-45/+55
| | | | llvm-svn: 55528
* Swap fp comparison operands and change predicate to allow load folding.Evan Cheng2008-08-283-5/+49
| | | | llvm-svn: 55521
* Refactor ARM instruction format definitions into a separate file. No ↵Evan Cheng2008-08-282-215/+232
| | | | | | functionality changes. llvm-svn: 55518
* Add a target callback for FastISel.Dan Gohman2008-08-282-2/+27
| | | | llvm-svn: 55512
* remove tabs, fix > 80 colsGabor Greif2008-08-281-10/+16
| | | | llvm-svn: 55511
* rename destroy -> releaseMemory to properly hook into passmgr.Chris Lattner2008-08-281-2/+2
| | | | llvm-svn: 55508
* Add support for JIT exceptions on Darwin. Since we're dealing with libgcc,Nicolas Geoffray2008-08-281-2/+135
| | | | | | | whose darwin code was written after the ability to dynamically register frames, we need to do special hacks to make things work. llvm-svn: 55507
* erect abstraction boundaries for accessing SDValue members, rename Val -> ↵Gabor Greif2008-08-2834-1105/+1113
| | | | | | Node to reflect semantics llvm-svn: 55504
* Implement null and undef values for FastISel.Dan Gohman2008-08-281-0/+5
| | | | llvm-svn: 55500
* In lowering SELECT_CC, removed cases where we can't flip the true and false ↵Mon P Wang2008-08-281-8/+0
| | | | | | when the compare value has a NaN llvm-svn: 55499
* Optimize DAGCombiner's worklist processing. Previously it startedDan Gohman2008-08-281-77/+102
| | | | | | | | | | | | | its work by putting all nodes in the worklist, requiring a big dynamic allocation. Now, DAGCombiner just iterates over the AllNodes list and maintains a worklist for nodes that are newly created or need to be revisited. This allows the worklist to stay small in most cases, so it can be a SmallVector. This has the side effect of making DAGCombine not miss a folding opportunity in alloca-align-rounding.ll. llvm-svn: 55498
* Move CaseBlock, JumpTable, and BitTestBlock to be members ofDan Gohman2008-08-281-80/+77
| | | | | | | | SelectionDAGLowering instead of being in an anonymous namespace. This fixes warnings about SelectionDAGLowering having fields using anonymous namespaces. llvm-svn: 55497
* Fix a FastISel bug where the instructions from lowering the argumentsDan Gohman2008-08-281-12/+16
| | | | | | were being emitted after the first instructions of the entry block. llvm-svn: 55496
* Use resize instead of reserve. Reserve doesn't change size().Rafael Espindola2008-08-281-1/+1
| | | | llvm-svn: 55486
* Reduce the size of the Parts vector.Rafael Espindola2008-08-281-3/+4
| | | | llvm-svn: 55483
* Hook up support for fast-isel of trunc instructions, using the newly working ↵Owen Anderson2008-08-281-1/+4
| | | | | | support for EXTRACT_SUBREG. llvm-svn: 55482
* Implement partial-word binary atomics on ppc.Dale Johannesen2008-08-283-0/+219
| | | | llvm-svn: 55478
* FastEmitInst_extractsubreg doesn't need to be passed the register class. It ↵Owen Anderson2008-08-281-2/+2
| | | | | | can get it from MachineRegisterInfo instead. llvm-svn: 55476
* Revert r55467; it causes regressions in UnitTests/Vector/divides,Dan Gohman2008-08-282-68/+4
| | | | | | Benchmarks/sim/sim, and others on x86-64. llvm-svn: 55475
* Correctly resize the Parts array.Rafael Espindola2008-08-281-1/+1
| | | | llvm-svn: 55471
* If a copy isn't coalesced, but its src is defined by trivial computation. ↵Evan Cheng2008-08-282-4/+68
| | | | | | Re-materialize the src to replace the copy. llvm-svn: 55467
* FsFLD0S{S|D} and V_SETALLONES are as cheap as moves.Evan Cheng2008-08-281-3/+3
| | | | llvm-svn: 55466
* Make the verifier reject instructions which have null pointers Chris Lattner2008-08-281-0/+11
| | | | | | | for operands: rdar://6179606. no testcase, because I can't write a .ll file that is this broken ;-) llvm-svn: 55460
* Clear the intervals list in "destroy", patch by Chris Lattner2008-08-281-0/+1
| | | | | | Prakash Prabhu! llvm-svn: 55458
* Split the ATOMIC NodeType's to include the size, e.g.Dale Johannesen2008-08-287-300/+558
| | | | | | | | | | | | | | | | ATOMIC_LOAD_ADD_{8,16,32,64} instead of ATOMIC_LOAD_ADD. Increased the Hardcoded Constant OpActionsCapacity to match. Large but boring; no functional change. This is to support partial-word atomics on ppc; i8 is not a valid type there, so by the time we get to lowering, the ATOMIC_LOAD nodes looks the same whether the type was i8 or i32. The information can be added to the AtomicSDNode, but that is the largest SDNode; I don't fully understand the SDNode allocation, but it is sensitive to the largest node size, so increasing that must be bad. This is the alternative. llvm-svn: 55457
* Reorganize the lifetimes of the major objects SelectionDAGISelDan Gohman2008-08-272-232/+345
| | | | | | | | | | | | | | | | | | | | works with. SelectionDAG, FunctionLoweringInfo, and SelectionDAGLowering objects now get created once per SelectionDAGISel instance, and can be reused across blocks and across functions. Previously, they were created and destroyed each time they were needed. This reorganization simplifies the handling of PHI nodes, and also SwitchCases, JumpTables, and BitTestBlocks. This simplification has the side effect of fixing a bug in FastISel where successor PHI nodes weren't being updated correctly. This is also a step towards making the transition from FastISel into and out of SelectionDAG faster, and also making plain SelectionDAG faster on code with lots of little blocks. llvm-svn: 55450
* Add a helper method that will be used to support EXTRACT_SUBREG for ↵Owen Anderson2008-08-271-0/+11
| | | | | | selecting trunc's in fast-isel. llvm-svn: 55439
* Make "movdq2q" and "movq2dq" dependent upon having SSE2 because they use theBill Wendling2008-08-272-7/+11
| | | | | | SSE2 registers as well as the MMX registers. llvm-svn: 55436
* Put file scoped constants in an anonymous namespace. Use the "using namespaceBill Wendling2008-08-271-3/+5
| | | | | | llvm" for consistency. llvm-svn: 55435
* Move the check whether it's worth remating to caller.Evan Cheng2008-08-272-3/+2
| | | | llvm-svn: 55434
* Do not apply the transformation if the target does not support DestTy natively.Devang Patel2008-08-271-2/+9
| | | | llvm-svn: 55433
* Fix FastISel's bitcast code for the case where getRegForValue fails.Dan Gohman2008-08-271-1/+4
| | | | llvm-svn: 55431
* Refactor isSafeToReMat out of 2addr pass.Evan Cheng2008-08-272-29/+26
| | | | llvm-svn: 55430
* Use TargetLowering to get the types in fast isel, which handles pointer ↵Owen Anderson2008-08-271-4/+4
| | | | | | types correctly for our purposes. llvm-svn: 55428
* Don't check TLI.getOperationAction. The FastISel way is toDan Gohman2008-08-271-6/+2
| | | | | | | just try to do the action and let the tablegen-generated code determine if there is target-support for an operation. llvm-svn: 55427
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