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* Fix so that pandn is emitted instead of an xor/and combo. Add integerBill Wendling2007-03-272-13/+55
| | | | | | comparison operators. llvm-svn: 35385
* Unbreaks non-debug builds.Evan Cheng2007-03-271-0/+2
| | | | llvm-svn: 35383
* "The C standards do say that "char" may either be a "signed char" or "unsignedLauro Ramos Venancio2007-03-271-1/+1
| | | | | | | | char" and it is up to the compilers implementation or the platform which is followed." http://www.arm.linux.org.uk/docs/faqs/signedchar.php llvm-svn: 35382
* bugfix: sometimes the spiller puts a load between the "mov lr, pc" and "bx" ↵Lauro Ramos Venancio2007-03-273-11/+11
| | | | | | of a CALL_NOLINK. llvm-svn: 35381
* Remove dead codeAnton Korobeynikov2007-03-271-82/+46
| | | | llvm-svn: 35380
* Split big monster into small helpers. No functionality change.Anton Korobeynikov2007-03-271-190/+285
| | | | llvm-svn: 35379
* SDISel does not preserve all, it changes CFG and other info.Evan Cheng2007-03-271-1/+0
| | | | llvm-svn: 35376
* Don't call getOperandConstraint() if operand index is greater thanEvan Cheng2007-03-271-1/+2
| | | | | | TID->numOperands. llvm-svn: 35375
* Spell check.Devang Patel2007-03-271-1/+1
| | | | llvm-svn: 35374
* Implement some minor review feedback.Reid Spencer2007-03-261-3/+3
| | | | llvm-svn: 35373
* For PR1271:Reid Spencer2007-03-261-1/+1
| | | | | | Fix another incorrectly converted shift mask. llvm-svn: 35371
* Reduce malloc/free traffic.Devang Patel2007-03-261-12/+8
| | | | llvm-svn: 35370
* It is not possible to determie dominance between two PHI nodesDevang Patel2007-03-261-0/+6
| | | | | | based on their ordering. llvm-svn: 35369
* Use std::vector<DFCalculateWorkObject> instead ofDevang Patel2007-03-261-7/+4
| | | | | | std::vector<DFCalculateWorkObject *> to reduce malloc/free traffic. llvm-svn: 35368
* findRegisterUseOperand() changed.Evan Cheng2007-03-262-3/+3
| | | | llvm-svn: 35366
* Fix for PR1266. Don't mark a two address operand IsKill.Evan Cheng2007-03-262-22/+33
| | | | llvm-svn: 35365
* Change findRegisterUseOperand() to return operand index instead.Evan Cheng2007-03-261-4/+4
| | | | llvm-svn: 35363
* Fix reversed logic in getRegsUsed. Rename RegStates to RegsAvailable toDale Johannesen2007-03-261-15/+15
| | | | | | hopefully forestall similar errors. llvm-svn: 35362
* eliminate use of std::setChris Lattner2007-03-261-6/+4
| | | | llvm-svn: 35361
* Add a comment to explain a folding transform.Reid Spencer2007-03-261-0/+1
| | | | llvm-svn: 35360
* Get better debug output by having modified instructions print both theReid Spencer2007-03-261-2/+10
| | | | | | | | original and new instruction. A slight performance hit with ostringstream but it is only for debug. Also, clean up an uninitialized variable warning noticed in a release build. llvm-svn: 35358
* Get the number of bits to set in a mask correct for a shl/lshr transform.Reid Spencer2007-03-261-1/+1
| | | | llvm-svn: 35357
* Promote to v1i64 type...Bill Wendling2007-03-261-9/+15
| | | | llvm-svn: 35353
* Updated.Bill Wendling2007-03-261-54/+0
| | | | llvm-svn: 35352
* Add support for the v1i64 type. This makes better code for this:Bill Wendling2007-03-263-28/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | #include <mmintrin.h> extern __m64 C; void baz(__v2si *A, __v2si *B) { *A = C; _mm_empty(); } We get this: _baz: call "L1$pb" "L1$pb": popl %eax movl L_C$non_lazy_ptr-"L1$pb"(%eax), %eax movq (%eax), %mm0 movl 4(%esp), %eax movq %mm0, (%eax) emms ret GCC gives us this: _baz: pushl %ebx call L3 "L00000000001$pb": L3: popl %ebx subl $8, %esp movl L_C$non_lazy_ptr-"L00000000001$pb"(%ebx), %eax movl (%eax), %edx movl 4(%eax), %ecx movl 16(%esp), %eax movl %edx, (%eax) movl %ecx, 4(%eax) emms addl $8, %esp popl %ebx ret llvm-svn: 35351
* SIGN_EXTEND_INREG requires one extra operand, a ValueType node.Evan Cheng2007-03-261-2/+6
| | | | llvm-svn: 35350
* For PR1271:Reid Spencer2007-03-261-1/+1
| | | | | | | | Fix SingleSource/Regression/C/2003-05-21-UnionBitFields.c by changing a getHighBitsSet call to getLowBitsSet call that was incorrectly converted from the original lshr constant expression. llvm-svn: 35348
* Look through bitcast when finding IVs. (Chris' patch really.)Dale Johannesen2007-03-261-0/+10
| | | | llvm-svn: 35347
* For PR1271:Reid Spencer2007-03-251-12/+11
| | | | | | | | | | Remove a use of getLowBitsSet that caused the mask used for replacement of shl/lshr pairs with an AND instruction to be computed incorrectly. Its not clear exactly why this is the case. This solves the disappearing shifts problem, but it doesn't fix Regression/C/2003-05-21-UnionBitFields. It seems there is more going on. llvm-svn: 35342
* implement Transforms/InstCombine/cast2.ll:test3 and PR1263Chris Lattner2007-03-251-1/+21
| | | | llvm-svn: 35341
* Some cleanup from review:Reid Spencer2007-03-251-16/+18
| | | | | | | | | * Don't assume shift amounts are <= 64 bits * Avoid creating an extra APInt in SubOne and AddOne by using -- and ++ * Add another use of getLowBitsSet * Convert a series of if statements to a switch llvm-svn: 35339
* First step of switch lowering refactoring: perform worklist-drivenAnton Korobeynikov2007-03-251-176/+249
| | | | | | strategy, emit JT's where possible. llvm-svn: 35338
* Fix authorshipAnton Korobeynikov2007-03-251-1/+1
| | | | llvm-svn: 35337
* fold constantexprs more aggressively, fixing PR1265Chris Lattner2007-03-251-2/+17
| | | | llvm-svn: 35336
* Refactor several ConstantExpr::getXXX calls with ConstantInt argumentsReid Spencer2007-03-251-27/+40
| | | | | | | | using the facilities of APInt. While this duplicates a tiny fraction of the constant folding code, it also makes the code easier to read and avoids large ConstantExpr overhead for simple, known computations. llvm-svn: 35335
* add a noteChris Lattner2007-03-251-0/+1
| | | | llvm-svn: 35334
* 1. Avoid unnecessary APInt construction if possible.Zhou Sheng2007-03-251-7/+5
| | | | | | | 2. Use isStrictlyPositive() instead of isPositive() in two places where they need APInt value > 0 not only >=0. llvm-svn: 35333
* Implement support for vector operands to inline asm, implementingChris Lattner2007-03-251-4/+16
| | | | | | CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll llvm-svn: 35332
* add a noteChris Lattner2007-03-251-0/+13
| | | | llvm-svn: 35330
* Fix CodeGen/PowerPC/2007-03-24-cntlzd.llChris Lattner2007-03-251-1/+4
| | | | llvm-svn: 35329
* implement initial support for the silly X constraint. Testcase here: ↵Chris Lattner2007-03-251-0/+2
| | | | | | CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll llvm-svn: 35327
* Make more uses of getHighBitsSet and get rid of some pointless & of anReid Spencer2007-03-251-12/+12
| | | | | | APInt with its type mask. llvm-svn: 35325
* Implement CodeGen/X86/2007-03-24-InlineAsmMultiRegConstraint.llChris Lattner2007-03-251-1/+4
| | | | llvm-svn: 35324
* switch TargetLowering::getConstraintType to take the entire constraint,Chris Lattner2007-03-2510-65/+79
| | | | | | not just the first letter. No functionality change. llvm-svn: 35322
* More APIntification:Reid Spencer2007-03-251-24/+24
| | | | | | | | | | | | | | | * Convert the last use of a uint64_t that should have been an APInt. * Change ComputeMaskedBits to have a const reference argument for the Mask so that recursions don't cause unneeded temporaries. This causes temps to be needed in other places (where the mask has to change) but this change optimizes for the recursion which is more frequent. * Remove two instances of &ing a Mask with getAllOnesValue. Its not needed any more because APInt is accurate in its bit computations. * Start using the getLowBitsSet and getHighBits set methods on APInt instead of shifting. This makes it more clear in the code what is going on. llvm-svn: 35321
* Allow the b/h/w/k constraints to be applied to values that have multiple ↵Chris Lattner2007-03-251-1/+4
| | | | | | alternatives, and end up not being registers. llvm-svn: 35320
* enforce the proper range for the i386 N constraint.Chris Lattner2007-03-251-8/+9
| | | | llvm-svn: 35319
* Fix test/CodeGen/X86/2007-03-24-InlineAsmPModifier.llChris Lattner2007-03-251-0/+4
| | | | llvm-svn: 35318
* fix a regression on vector or instructions.Chris Lattner2007-03-241-9/+9
| | | | llvm-svn: 35314
* don't rely on ADLChris Lattner2007-03-241-1/+1
| | | | llvm-svn: 35299
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