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* RABasic fix. Regalloc is responsible for updating block live ins.Andrew Trick2010-11-201-0/+30
| | | | llvm-svn: 119896
* Whitespace.Andrew Trick2010-11-201-20/+20
| | | | llvm-svn: 119895
* Add more Thumb add instruction encodings.Bill Wendling2010-11-201-12/+47
| | | | llvm-svn: 119883
* Add Thumb encodings for some add instructions.Bill Wendling2010-11-201-6/+26
| | | | llvm-svn: 119882
* Add more encodings for Thumb instructions.Bill Wendling2010-11-201-15/+30
| | | | llvm-svn: 119881
* Have the getAddrMode3OpValue() function in ARMCodeEmitter.cpp produce the sameBill Wendling2010-11-201-9/+21
| | | | | | value that the one in ARMMCCodeEmitter.cpp does. llvm-svn: 119878
* Check for _setjmp too, because it's also used.Bill Wendling2010-11-201-0/+1
| | | | llvm-svn: 119875
* Fix ARM LDR* post-indexed operand encoding.Jim Grosbach2010-11-191-5/+5
| | | | llvm-svn: 119869
* Encodings for the compare instructions.Bill Wendling2010-11-191-8/+19
| | | | llvm-svn: 119868
* The Vm and Vn register fields must be the same for a register-register vmov.Owen Anderson2010-11-191-2/+6
| | | | llvm-svn: 119867
* Fix a cut-n-paste-error.Evan Cheng2010-11-191-1/+1
| | | | llvm-svn: 119866
* Document the new GVN number table structure.Owen Anderson2010-11-191-0/+12
| | | | llvm-svn: 119865
* Operand namesJim Grosbach2010-11-191-4/+4
| | | | llvm-svn: 119864
* trailing whitespaceJim Grosbach2010-11-191-16/+16
| | | | llvm-svn: 119863
* Don't need to save piecemeal now.Eric Christopher2010-11-191-4/+2
| | | | llvm-svn: 119862
* Update comment.Eric Christopher2010-11-191-3/+2
| | | | llvm-svn: 119861
* Add encodings for some of the thumb ADD instructions. Tests will come once theBill Wendling2010-11-191-16/+44
| | | | | | asm parser can handle them. llvm-svn: 119860
* Update comment.Eric Christopher2010-11-191-1/+1
| | | | llvm-svn: 119859
* Clarify operand names.Jim Grosbach2010-11-191-3/+3
| | | | llvm-svn: 119858
* Refactor address mode handling into a single struct (ala x86), thisEric Christopher2010-11-191-50/+72
| | | | | | | | should give allow a wider range of addressing modes. No functional change. llvm-svn: 119856
* Fix encoding for ARM MLS instruction.Jim Grosbach2010-11-191-3/+5
| | | | llvm-svn: 119855
* When folding addressing modes in CodeGenPrepare, attempt to look through PHI ↵Owen Anderson2010-11-191-3/+29
| | | | | | | | | nodes if all the operands of the PHI are equivalent. This allows CodeGenPrepare to undo unprofitable PRE transforms. llvm-svn: 119853
* Add ARM encoding information for STRD.Jim Grosbach2010-11-192-17/+4
| | | | llvm-svn: 119852
* Shuffle things around a bit to keep like things together. Tidy up formatting.Jim Grosbach2010-11-191-20/+20
| | | | llvm-svn: 119851
* Revert accidental commit.Bill Wendling2010-11-191-3/+4
| | | | llvm-svn: 119850
* Change long binary encodings to use hex instead. It's more readable. AlsoBill Wendling2010-11-191-17/+20
| | | | | | initialize missing bit. llvm-svn: 119849
* Factor out operand encoding bits for ARM addressing mode 2 store instructions.Jim Grosbach2010-11-192-58/+33
| | | | llvm-svn: 119846
* Delete another dead class.Jim Grosbach2010-11-191-12/+0
| | | | llvm-svn: 119844
* whitespace tweak.Jim Grosbach2010-11-191-1/+0
| | | | llvm-svn: 119843
* Fix a use after free. Patch by Frits van Bommel.Rafael Espindola2010-11-191-6/+9
| | | | llvm-svn: 119842
* Refactor PICSTR* instructions to really be pseudos. Nuke dead classes.Jim Grosbach2010-11-192-52/+6
| | | | llvm-svn: 119841
* Rename ARM .td class AIldst1 to AI2ldst for consistency with the other classes.Jim Grosbach2010-11-192-7/+7
| | | | llvm-svn: 119840
* Add ARM binary encoding information for the rest of the indexed loads.Jim Grosbach2010-11-192-175/+63
| | | | llvm-svn: 119821
* Make isScalarToVector to return false if the node is a scalar. This will preventMon P Wang2010-11-191-0/+2
| | | | | | | DAGCombine from making an illegal transformation of bitcast of a scalar to a vector into a scalar_to_vector. llvm-svn: 119819
* Added support for the Mach-O .symbol_resolver directive. rdar://8673046Kevin Enderby2010-11-196-0/+10
| | | | llvm-svn: 119816
* Remove dead code.Jim Grosbach2010-11-191-10/+0
| | | | llvm-svn: 119815
* ARM LDRD binary encoding.Jim Grosbach2010-11-192-22/+12
| | | | llvm-svn: 119812
* Remove hard tabs.Jim Grosbach2010-11-191-2/+2
| | | | llvm-svn: 119810
* Remove trailing whitespace.Jim Grosbach2010-11-191-62/+62
| | | | llvm-svn: 119806
* Avoid release build warnings.Benjamin Kramer2010-11-192-4/+4
| | | | llvm-svn: 119804
* Fix decoding ambiguities of stdrex and ldrex.Owen Anderson2010-11-191-4/+0
| | | | llvm-svn: 119801
* Silence warning about an uninitialized variable.Benjamin Kramer2010-11-191-1/+1
| | | | llvm-svn: 119800
* Remove threading of Xor over selects and phis, with an explanationDuncan Sands2010-11-191-13/+18
| | | | | | of why such threading is pointless. llvm-svn: 119798
* Add a MCLineSectionOrder vector so that we produce the line tables in aRafael Espindola2010-11-191-10/+15
| | | | | | deterministic order. llvm-svn: 119795
* These instructions are thumb2 only.Evan Cheng2010-11-191-1/+1
| | | | llvm-svn: 119793
* Fix an obvious oversight.Evan Cheng2010-11-191-2/+2
| | | | llvm-svn: 119792
* Don't attempt trivial coalescing for sub-register copies.Jakob Stoklund Olesen2010-11-191-0/+4
| | | | | | Patch by Krister Wombell! llvm-svn: 119791
* Add an assert.Rafael Espindola2010-11-191-1/+3
| | | | llvm-svn: 119788
* Add ADT/IntervalMap.Jakob Stoklund Olesen2010-11-192-0/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a sorted interval map data structure for small keys and values with automatic coalescing and bidirectional iteration over coalesced intervals. Except for coalescing intervals, it provides similar functionality to std::map. It is however much more compact for small keys and values, and hopefully faster too. The container object itself can hold the first few intervals without any allocations, then it switches to a cache conscious B+-tree representation. A recycling allocator can be shared between many containers, even between containers holding different types. The IntervalMap is initially intended to be used with SlotIndex intervals for: - Backing store for LiveIntervalUnion that is smaller and faster than std::set. - Backing store for LiveInterval with less overhead than std::vector for typical intervals and O(N log N) merging of large intervals. 99% of virtual registers need 4 entries or less and would benefit from the small object optimization. - Backing store for LiveDebugVariable which doesn't exist yet, but will track debug variables during register allocation. This is a work in progress. Missing items are: - Performance metrics. - erase(). - insert() shrinkage. - clear(). - More performance metrics. - Simplification and detemplatization. llvm-svn: 119787
* Fix llvm-gcc boostrap on OS X by avoiding printing sleb and uleb whenRafael Espindola2010-11-191-0/+16
| | | | | | possible. llvm-svn: 119785
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