| Commit message (Collapse) | Author | Age | Files | Lines |
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form of", it doesn't pass tests.
llvm-svn: 111385
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llvm-svn: 111384
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llvm-svn: 111383
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issues.
llvm-svn: 111382
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directives for putting contents in .bss, for example.
llvm-svn: 111376
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decomposition that it is doing is very basicaa specific and is only used
by basicaa.
llvm-svn: 111375
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Nothing fancy, just ask the target if any currently available base reg
is in range for the instruction under consideration and use the first one
that is. Placeholder ARM implementation simply returns false for now.
ongoing saga of rdar://8277890
llvm-svn: 111374
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llvm-svn: 111366
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The previous algorithm in LowerVECTOR_SHUFFLE
didn't check all requirements for "monotonic" shuffles.
llvm-svn: 111361
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The "half vectors" are now widened to full size by the legalizer.
The only exception is in parameter passing, where half vectors are
expanded. This causes changes to some dejagnu tests.
llvm-svn: 111360
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"SPU Application Binary Interface Specification, v1.9" by
IBM.
Specifically: use r3-r74 to pass parameters and the return value.
llvm-svn: 111358
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gep P, (zext x) != gep P, (sext x)
DecomposeGEPExpression was getting this wrong, confusing
basicaa.
llvm-svn: 111352
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from the LHS should disable reconsidering that pred on the
RHS. However, knowing something about the pred on the RHS
shouldn't disable subsequent additions on the RHS from
happening.
llvm-svn: 111349
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llvm-svn: 111348
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llvm-svn: 111345
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llvm-svn: 111344
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llvm-svn: 111343
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llvm-svn: 111342
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Testcase from Nick Lewycky.
llvm-svn: 111341
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llvm-svn: 111339
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llvm-svn: 111337
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llvm-svn: 111325
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(e.g. errs()) fails in close() due to (e.g.) a broken pipe. As
previously written, the had_error() flag would get set and then
the raw_ostream dtor would report a fatal error. There is nothing
the client can do about this and we have no way to report the error,
so just eat it.
llvm-svn: 111321
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into report_fatal_error. Just blast the string to stderr with write(2)
and hope for the best! Part of rdar://8318441
llvm-svn: 111320
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vector heavy code. I'll re-enable when we've tracked down the problem.
llvm-svn: 111318
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where the step value is an induction variable from an outer loop, to
avoid trouble trying to re-expand such expressions. This effectively
hides such expressions from indvars and lsr, which prevents them
from getting into trouble.
llvm-svn: 111317
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the local block. Resolve references to those indices to a new base register.
For simplification and testing purposes, a new virtual base register is
allocated for each frame index being resolved. The result is truly horrible,
but correct, code that's good for exercising the new code paths.
Next up is adding thumb1 support, which should be very simple. Following that
will be adding base register re-use and implementing a reasonable ARM
heuristic for when a virtual base register should be generated at all.
llvm-svn: 111315
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re-entering it if the cleanup code crashes.
llvm-svn: 111309
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the active context from anywhere.
llvm-svn: 111308
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llvm-svn: 111307
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PR 7882. Follows suggestion by Amaury Pouly, thanks.
llvm-svn: 111306
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llvm-svn: 111291
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- Do not clobber al during variadic calls, this is AMD64 ABI-only feature
- Emit wincall64, where necessary
Patch by Cameron Esfahani!
llvm-svn: 111289
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Patch by Cameron Esfahani!
llvm-svn: 111288
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Move the requirement to LiveIntervalAnalysis instead. Note this does not change the number of times machineloopinfo is computed.
llvm-svn: 111285
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machine cse before.
llvm-svn: 111281
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llvm-svn: 111277
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llvm-svn: 111274
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llvm-svn: 111271
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llvm-svn: 111266
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Hello world builds & runs now on i386/ELF with -integrated-as.
llvm-svn: 111264
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Modernize predicates a bit.
The Predicate_* methods are not used by TableGen any longer. They are only
emitted for the sake of legacy code.
llvm-svn: 111263
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whether to allocate a virtual frame base register to resolve the frame
index reference in it. Implement a simple version for ARM to aid debugging.
In LocalStackSlotAllocation, scan the function for frame index references
to local frame indices and ask the target whether to allocate virtual
frame base registers for any it encounters. Purely infrastructural for
debug output. Next step is to actually allocate base registers, then add
intelligent re-use of them.
rdar://8277890
llvm-svn: 111262
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llvm-svn: 111260
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llvm-svn: 111259
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clients. Also fixed an erroneous check. An edge is only a back edge when the from and to blocks are in the same loop.
llvm-svn: 111256
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loop, making the resulting loop significantly less ugly. Also, zap
its trivial PHI nodes, since it's easy.
llvm-svn: 111255
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llvm-svn: 111254
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llvm-svn: 111252
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printing "lsl #0". This fixes the remaining parts of pr7792. Make
corresponding changes for encoding/decoding these instructions.
llvm-svn: 111251
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