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* Add a new WeakVH value handle; NFCSanjoy Das2017-04-261-2/+5
| | | | | | | | | | | | | | Summary: WeakVH nulls itself out if the value it was tracking gets deleted, but it does not track RAUW. Reviewers: dblaikie, davide Subscribers: mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D32267 llvm-svn: 301425
* Rename WeakVH to WeakTrackingVH; NFCSanjoy Das2017-04-2625-144/+134
| | | | | | | | | | | | | | | | Summary: I plan to use WeakVH to mean "nulls itself out on deletion, but does not track RAUW" in a subsequent commit. Reviewers: dblaikie, davide Reviewed By: davide Subscribers: arsenm, mehdi_amini, mcrosier, mzolotukhin, jfb, llvm-commits, nhaehnle Differential Revision: https://reviews.llvm.org/D32266 llvm-svn: 301424
* [AMDGPU][MC] Added check for truncation of SOPK imm operandDmitry Preobrazhensky2017-04-263-17/+45
| | | | | | | | | | See bug 30827: https://bugs.llvm.org//show_bug.cgi?id=30827 Reviewers: artem.tamazov, vpykhtin Differential Revision: https://reviews.llvm.org/D32535 llvm-svn: 301418
* [AVR] Remove an unused local variableDylan McKay2017-04-261-1/+0
| | | | llvm-svn: 301413
* Fix unused-variable warning caused by r301407.Haojian Wu2017-04-261-2/+0
| | | | llvm-svn: 301411
* [TargetLowering] fix isConstTrueVal to account for build vector truncationSanjay Patel2017-04-261-13/+17
| | | | | | | | | | | | | | Build vectors have magical truncation powers, so we have things like this: v4i1 = BUILD_VECTOR Constant:i32<1>, Constant:i32<1>, Constant:i32<1>, Constant:i32<1> v4i16 = BUILD_VECTOR Constant:i32<1>, Constant:i32<1>, Constant:i32<1>, Constant:i32<1> If we don't truncate the splat node returned by getConstantSplatNode(), then we won't find truth when ZeroOrNegativeOneBooleanContent is the rule. Differential Revision: https://reviews.llvm.org/D32505 llvm-svn: 301408
* Convert LoopRotation to use SimplifyQuery version of SimplifyInstruction. ↵Daniel Berlin2017-04-261-7/+13
| | | | | | Add AssumptionCache, DominatorTree, TLI if available. llvm-svn: 301407
* Convert SimplifyInstructions to use the SimplifyQuery version of ↵Daniel Berlin2017-04-261-8/+10
| | | | | | SimplifyInstruction llvm-svn: 301406
* Convert CVP to use SimplifyQuery version of SimplifyInstruction. Add ↵Daniel Berlin2017-04-261-10/+20
| | | | | | AssumptionCache, DominatorTree, TLI if available. llvm-svn: 301405
* Fix signed multiplication with overflow fallback.Ranjeet Singh2017-04-261-2/+2
| | | | | | | | | | | | | | | | For targets that don't have ISD::MULHS or ISD::SMUL_LOHI for the type and the double width type is illegal, then the two operands are sign extended to twice their size then multiplied to check for overflow. The extended upper halves were mismatched causing an incorrect result. This fixes the mismatch. A test was added for ARM V6-M where the bug was detected. Patch by James Duley. Differential Revision: https://reviews.llvm.org/D31807 llvm-svn: 301404
* [DAG] add FIXME comments for splat detection; NFCSanjay Patel2017-04-262-0/+7
| | | | llvm-svn: 301403
* Simplify the CFG after loop pass cleanup.Filipe Cabecinhas2017-04-262-0/+9
| | | | | | | | | | | | | | | | Summary: Otherwise we might end up with some empty basic blocks or single-entry-single-exit basic blocks. This fixes PR32085 Reviewers: chandlerc, danielcdh Subscribers: mehdi_amini, RKSimon, llvm-commits Differential Revision: https://reviews.llvm.org/D30468 llvm-svn: 301395
* [mips] Fix test mips64fpldst.ll with machine verifier enabledSagar Thakur2017-04-261-5/+1
| | | | | | | | | Removed micro mips register classes for gp initialization because gp initialization uses pure mips64 instruction. Even when compiling for micro mips, gp initialization can be done with pure mips64 instructions. Reviewed by Simon Dardis Differential: D32286 llvm-svn: 301394
* [X86] Add missing mayLoad/mayStore attributes to some X86 instructions ↵Ayman Musa2017-04-261-4/+6
| | | | | | | | | | (Continue) Complete the patch committed in rL300190. Differential Revision: https://reviews.llvm.org/D32287 llvm-svn: 301393
* [mips] Rework a portion of MipsCC interface. (NFC)Simon Dardis2017-04-264-21/+27
| | | | | | | | | | | | | | | | | r299766 contained a "conditional move or jump depends on uninitialized value" fault, identified by valgrind. This occurred as MipsFastISel::finishCall(..) used CCState over MipsCCState. The latter is required for the TableGen'd calling convention logic due to reliance on pre-analyzing type information to lower call results/returns of vectors correctly. This change modifies the MipsCC AnalyzeCallResult to be useful with both the SelectionDAG and FastISel lowering logic. Reviewers: slthakur Differential Revision: https://reviews.llvm.org/D32004 llvm-svn: 301392
* PR31007 and PR27884 will be closed: a possibility to compile constants like ↵Andrew V. Tischenko2017-04-263-6/+12
| | | | | | 0bH is now supported in MS asm. llvm-svn: 301390
* [X86][SSE2] Fix asm string for movq (Move Quadword) instruction.Ayman Musa2017-04-261-11/+11
| | | | | | | | Replace "mov{d|q}" with "movq". Differential Revision: https://reviews.llvm.org/D32220 llvm-svn: 301386
* Remove tailing whitespaces.Michael Liao2017-04-261-5/+5
| | | | llvm-svn: 301383
* InstructionSimplify: Use braced initializer list for SimplifyQuery creationDaniel Berlin2017-04-261-45/+36
| | | | llvm-svn: 301381
* InstructionSimplify: Have SimplifyFPBinOp pass FastMathFlags by value, like ↵Daniel Berlin2017-04-261-2/+2
| | | | | | we do everywhere else llvm-svn: 301380
* InstructionSimplify: End our long national nightmare of ever-growing ↵Daniel Berlin2017-04-261-158/+287
| | | | | | | | | | | | | | | | | | | | | Simplify* arguments. Summary: Expose the internal query structure, start using it. Note: This is the most minimal change possible i could create. I have trivial followups, like fixing the one use of const FastMathFlags &, the renaming of CtxI to be consistent, etc. This should be NFC. Reviewers: majnemer, davide Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D32448 llvm-svn: 301379
* [AMDGPU] Garbage collect dead code. NFCI.Davide Italiano2017-04-261-10/+0
| | | | llvm-svn: 301375
* [MSP430] Fix PR32769: Select8 and Select16 need to have SR in Uses.Vadzim Dambrouski2017-04-261-0/+2
| | | | | | | | | | | If Select pseudo instruction doesn't have use SR, then CMP instructions are being marked as dead and later can be removed by MachineCSE pass. This leads to incorrect code generation. Differential Revision: https://reviews.llvm.org/D32473 llvm-svn: 301372
* [gcov] Sort file info before printing itVedant Kumar2017-04-261-3/+7
| | | | | | | | | | | | | The order in which GCOV file info is printed depends on the string hash function. This makes some GCOV tests brittle, because the tests must be updated whenever the hash function changes. Sort the filenames before printing out the file info to solve the problem. This should be relatively cheap. Differential Revision: https://reviews.llvm.org/D32512 llvm-svn: 301371
* revert debuggingSam Clegg2017-04-261-1/+1
| | | | llvm-svn: 301370
* [WebAssembly] Allow for signed relocation addendsSam Clegg2017-04-262-3/+4
| | | | | | | | | | | | | | Summary: Addends are used as offsets to addresses of globals and can be both positive and negative. This change prints libObject in line with the spec and the MC layer. Subscribers: jfb, dschuff Differential Revision: https://reviews.llvm.org/D32507 llvm-svn: 301369
* [AVR] Do not kill the dest register for a pseudo instructionDylan McKay2017-04-251-1/+1
| | | | | | | It caused the register to later be dead, which would trigger a verifier error. llvm-svn: 301368
* AMDGPU: Shift down reserved SP register like scratch wave offsetMatt Arsenault2017-04-252-17/+59
| | | | llvm-svn: 301367
* [DAG] fix formatting of isConstantSplat(); NFCSanjay Patel2017-04-251-27/+23
| | | | llvm-svn: 301366
* AMDGPU: Clean up VOP3NoMods patternMatt Arsenault2017-04-253-35/+22
| | | | | | | There is no need to copy the operands or inspect the sources. Also remove some unnecessary clamp/omod usage. llvm-svn: 301363
* AMDGPU: Fix ValueKind code object metadata for imagesKonstantin Zhuravlyov2017-04-251-12/+12
| | | | | | Differential Revision: https://reviews.llvm.org/D32504 llvm-svn: 301360
* [llvm-pdbdump] Allow sorting / filtering by immediate paddingZachary Turner2017-04-251-2/+13
| | | | llvm-svn: 301358
* [llvm-pdbdump] Dump File / Line Info to YAML.Zachary Turner2017-04-251-0/+4
| | | | | | | | | We were already parsing and dumping this to the human readable format, but not to the YAML format. This does so, in preparation for reading it in and reconstructing the line information from YAML. llvm-svn: 301357
* SimplifyLibCalls: Fix crash on memset(notmalloc())Matthias Braun2017-04-251-0/+3
| | | | | | rdar://31520787 llvm-svn: 301352
* Fix an assertion when skipping stack values in DWARF2 mode.Adrian Prantl2017-04-251-1/+5
| | | | | | | | The fix consists of resetting LocationKind when addMachineRegExpression fails. rdar://problem/31803010 llvm-svn: 301351
* [Hexagon] Only increment debug counters if debug option is presentKrzysztof Parzyszek2017-04-251-6/+11
| | | | llvm-svn: 301346
* Skip bitcasts while looking for GEP in LoadStoreVectorizerStanislav Mekhanoshin2017-04-251-4/+19
| | | | | | Differential Revisison: https://reviews.llvm.org/D32101 llvm-svn: 301343
* [InstCombine] Remove redundant code from SimplifyUsingDistributiveLawsCraig Topper2017-04-251-16/+0
| | | | | | | | | | The code I've removed here exists in ExpandBinOp in InstSimplify which we call into before SimplifyUsingDistributiveLaws. The code in InstSimplify looks to have been copied from here. I verified this code doesn't fire on any lit tests. Not that that proves its definitely dead. Differential Revision: https://reviews.llvm.org/D32472 llvm-svn: 301341
* [APInt] Use isSubsetOf, intersects, and bit counting methods to reduce ↵Craig Topper2017-04-256-13/+11
| | | | | | | | | | | | | | temporary APInts This patch uses various APInt methods to reduce temporary APInt creation. This should be all of the unrelated cleanups that got buried in D32376(creating a KnownBits struct) as well as some pointed out by Simon during the review of that. Plus a few improvements to use counting instead of masking. I've left out any places where we do something like (KnownZero & KnownOne) != 0 as I plan to add a helper method to KnownBits to ask that question and didn't want to thrash that code an additional time. Differential Revision: https://reviews.llvm.org/D32495 llvm-svn: 301338
* Print complete DIExpressions in the assembler output DEBUG_VALUE comments.Adrian Prantl2017-04-251-34/+16
| | | | | | The previous code was complex, incorrect, and couldn't print everything. llvm-svn: 301333
* [WebAssembly] Fix relocation count in wasm binaries with call_indirectSam Clegg2017-04-251-1/+1
| | | | | | | | Subscribers: jfb, dschuff Differential Revision: https://reviews.llvm.org/D32459 llvm-svn: 301331
* [WebAssembly] Read global index in init expression as LEBSam Clegg2017-04-252-1/+4
| | | | | | | | Subscribers: jfb, dschuff Differential Revision: https://reviews.llvm.org/D32462 llvm-svn: 301330
* [InstSimplify] Handle (~A & ~B) | (~A ^ B) -> ~A ^ BCraig Topper2017-04-251-4/+10
| | | | | | | | | | The code Sanjay Patel moved over from InstCombine doesn't work properly if the 'and' has both inputs as nots because we used a commuted op matcher on the 'and' first. But this will bind to the first 'not' on 'and' when there could be two 'not's. InstCombine could rely on DeMorgan to ensure the 'and' wouldn't have two 'not's eventually, but InstSimplify can't rely on that. This patch matches the xor first then checks for the ands and allows a not of either operand of the xor. Differential Revision: https://reviews.llvm.org/D32458 llvm-svn: 301329
* [PM] Run IndirectCallPromotion only when PGO is enabled.Davide Italiano2017-04-251-9/+9
| | | | | | Differential Revision: https://reviews.llvm.org/D32465 llvm-svn: 301327
* [InstCombine] Remove superfluous curly braces around a single line if body. NFCCraig Topper2017-04-251-2/+1
| | | | llvm-svn: 301326
* [ValueTracking] Use APInt::operator|=(uint64_t) instead of creating a ↵Craig Topper2017-04-251-2/+2
| | | | | | temporary APInt. NFC llvm-svn: 301325
* [ValueTracking] Use APInt instead of auto. NFCCraig Topper2017-04-251-1/+1
| | | | | | This is a pre-commit for a patch I'm working on to turn KnownZero/One into a struct. Once I do that the type here will be less obvious. llvm-svn: 301324
* [ValueTracking] Use BitWidth local variable instead of re-reading it from ↵Craig Topper2017-04-251-1/+1
| | | | | | | | KnownZero. NFC This is a pre-commit for a patch that I'm working on to merge KnownZero/KnownOne into a KnownBits struct which would have had to touch this line. llvm-svn: 301323
* [SelectionDAG] Added getBuildVector(ArrayRef<SDUse>) helper.Simon Pilgrim2017-04-251-4/+4
| | | | llvm-svn: 301322
* [DAGCombiner] Refactor to make it easy to add support for vectors in a ↵Simon Pilgrim2017-04-251-10/+10
| | | | | | future patch. NFCI. llvm-svn: 301320
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