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* fix typos/formatting; NFCSanjay Patel2017-06-122-7/+4
| | | | llvm-svn: 305243
* Support: Don't set RLIMIT_AS on child processes when applying a memory limitDavid Blaikie2017-06-121-10/+0
| | | | | | | | | | | | | | | | | | | | | | It doesn't seem relevant to set an address space limit - this isn't important in any sense that I'm aware & it gets in the way of things that use a lot of address space, like llvm-symbolizer. This came up when I realized that bugpoint regression tests were much slower with -gsplit-dwarf than plain -g. Turned out that bugpoint subprocesses (opt, etc) were crashing and doing symbolization - but bugpoint runs those subprocesses with a 400MB memory limit. So with plain -g, mmaping the opt binary would exceed the memory limit, fail, and thus be really fast - no symbolization occurred. Whereas with -gsplit-dwarf, comically, having less to map in, it would succeed and then spend lots of time symbolizing. I've fixed at least the critical part of bugpoint's perf problem there by adding an option to allow bugpoint to disable symbolization. Thus improving the perfromance for -gsplit-dwarf and making the -g-esque speed available without this quirk/accidental benefit. llvm-svn: 305242
* Slightly better fix for dealing with no-id-stream PDBs.Zachary Turner2017-06-121-0/+10
| | | | | | | | | The last fix required the user to manually add the required feature. This caused an LLD test to fail because I failed to update LLD. In practice we can hide this logic so it can just be transparently added when we write the PDB. llvm-svn: 305236
* [llvm-pdbdump] Don't fail on PDBs with no ID stream.Zachary Turner2017-06-121-0/+4
| | | | | | | | | Older PDBs don't have this. Its presence is detected by using the various "feature" flags that come at the end of the PDB Stream. Detect this, and don't try to dump the ID stream if the features tells us it's not present. llvm-svn: 305235
* [RS4GC] Drop invalid metadata after pointers are relocatedAnna Thomas2017-06-121-17/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: After RS4GC, we should drop metadata that is no longer valid. These metadata is used by optimizations scheduled after RS4GC, and can cause a miscompile. One such metadata is invariant.load which is used by LICM sinking transform. After rewriting statepoints, the address of a load maybe relocated. With invariant.load metadata on a load instruction, LICM sinking assumes the loaded value (from a dererenceable address) to be invariant, and rematerializes the load operand and the load at the exit block. This transforms the IR to have an unrelocated use of the address after a statepoint, which is incorrect. Other metadata we conservatively remove are related to dereferenceability and noalias metadata. This patch drops such metadata on store and load instructions after rewriting statepoints. Reviewers: reames, sanjoy, apilipenko Reviewed by: reames Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D33756 llvm-svn: 305234
* AMDGPU/GlobalISel: Mark 32-bit G_ADD as legalTom Stellard2017-06-121-0/+2
| | | | | | | | | | | | Reviewers: arsenm Reviewed By: arsenm Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, rovka, kristof.beyls, igorb, dstuttard, tpr, llvm-commits, t-tye Differential Revision: https://reviews.llvm.org/D33992 llvm-svn: 305232
* [ADT] Reduce duplication between {Contextual,}FoldingSet; NFCGeorge Burgess IV2017-06-121-21/+21
| | | | | | | | | | | | | This is a precursor to another change (coming soon) that aims to make FoldingSet's API more type-safe. Without this, the type-safety change would just duplicate 4 more public methods between the already very similar classes. This renames FoldingSetImpl to FoldingSetBase so it's consistent with the FooBase -> FooImpl<T> -> Foo<T> convention we seem to have with other containers. llvm-svn: 305231
* AArch64: don't try to emit an add (shifted reg) for SP.Tim Northover2017-06-121-0/+8
| | | | | | | | | | The "Add/sub (shifted reg)" instructions use the 31 encoding for xzr and wzr rather than the SP, so we need to use different variants. Situations where this actually comes up are rare enough (see test-case) that I think falling back to DAG is fine. llvm-svn: 305230
* Fix a null pointer dereference in llvm-pdbutil pretty.Zachary Turner2017-06-121-2/+3
| | | | | | | | Static data members were causing a problem because I mistakenly assumed all members would affect a class's layout and so the Layout member would be non-null. llvm-svn: 305229
* SplitKit: Fix partially live subreg splittingMatthias Braun2017-06-121-2/+1
| | | | | | | | | Fix thinko/typo in subreg aware liverange splitting logic. I'm not sure how to write a proper testcase for this. The original problem only happens on an out-of-tree target. Forcing subreg enabled targets to spill and split in a predictable way is near impossible. llvm-svn: 305228
* IR: Replace the "Linker Options" module flag with "llvm.linker.options" ↵Peter Collingbourne2017-06-126-44/+41
| | | | | | | | | | named metadata. The new metadata is easier to manipulate than module flags. Differential Revision: https://reviews.llvm.org/D31349 llvm-svn: 305227
* [llvm-ar] Make llvm-lib behave more like the MSVC archiverReid Kleckner2017-06-121-6/+8
| | | | | | | | | | | | | | | | | | | | | | Summary: Use the filepath used to open the archive member as the archive member name instead of the file basename. This path might be absolute or relative. This is important because the archive member name will show up in the PDB, and we want our PDBs to look as much like MSVC's as possible. This also helps avoid an issue in our PDB module descriptor writing code, which assumes that all module names are unique. Relative paths still aren't guaranteed to be unique, but they're much better than basenames, which definitely aren't unique. Reviewers: ruiu, zturner Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D33575 llvm-svn: 305223
* Same expressions on both sides of the returnSylvestre Ledru2017-06-121-1/+1
| | | | | | | | | | | | | | | | | | | Summary: I guess we want PointerToMemberFunction & PointerToDataMember Fix coverity cid 1376038 Reviewers: zturner Reviewed By: zturner Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34110 llvm-svn: 305219
* [PowerPC] Match vec_revb builtins to P9 instructions.Tony Jiang2017-06-124-7/+105
| | | | | | | | | | | | Power9 has instructions that will reverse the bytes within an element for all sizes (half-word, word, double-word and quad-word). These can be used for the vec_revb builtins in altivec.h. However, we implement these to match vector shuffle nodes as that will cover both the builtins and vector shuffles that occur in the SDAG through other means. Differential Revision: https://reviews.llvm.org/D33690 llvm-svn: 305214
* [Power9] Added support for the modsw, moduw, modsd, modud hardware instructions.Tony Jiang2017-06-124-5/+51
| | | | | | | | | | | Note that if we need the result of both the divide and the modulo then we compute the modulo based on the result of the divide and not using the new hardware instruction. Commit on behalf of STEFAN PINTILIE. Differential Revision: https://reviews.llvm.org/D33940 llvm-svn: 305210
* AMDGPU: Don't add same implicit use multiple timesMatt Arsenault2017-06-121-4/+2
| | | | | | | For the last component, the same register use was added as an implicit use and another implicit kill use. llvm-svn: 305205
* [SelectionDAG] Allow sin/cos -> sincos optimization on GNU triples w/ just ↵Geoff Berry2017-06-121-14/+1
| | | | | | | | | | | | | | | | | | | | | -fno-math-errno Summary: This change enables the sin(x) cos(x) -> sincos(x) optimization on GNU target triples. This optimization was being inhibited when -ffast-math wasn't set because sincos in GLibC does not set errno, while sin and cos do. However, this optimization will only run if the attributes on the sin/cos calls include readnone, which is how clang represents the fact that it doesn't care about the errno values set by these functions (via the -fno-math-errno flag). Reviewers: hfinkel, bogner Subscribers: mcrosier, javed.absar, llvm-commits, paul.redmond Differential Revision: https://reviews.llvm.org/D32921 llvm-svn: 305204
* AMDGPU: Teach isLegalAddressingMode about flat offsetsMatt Arsenault2017-06-121-3/+11
| | | | | | | Also fix reporting r+r as a valid addressing mode without offsets. llvm-svn: 305203
* AMDGPU: Start selecting flat instruction offsetsMatt Arsenault2017-06-122-18/+42
| | | | llvm-svn: 305201
* AMDGPU: Verify that flat offsets aren't used pre-GFX9Matt Arsenault2017-06-121-2/+11
| | | | | | | For convenience the operand is always present in the instruction, but it isn't valid to use except on GFX9. llvm-svn: 305200
* [Falkor] Enable SW Prefetch.Haicheng Wu2017-06-121-0/+4
| | | | | | | | SW prefetch is good for Falkor. Differential Revision: http://reviews.llvm.org/D34084 llvm-svn: 305199
* AMDGPU: Start adding offset fields to flat instructionsMatt Arsenault2017-06-125-25/+94
| | | | llvm-svn: 305194
* StackColoring: smarter check for slot overlapThan McIntosh2017-06-121-60/+177
| | | | | | | | | | | | | | | | | | | | | | | Summary: The old check for slot overlap treated 2 slots `S` and `T` as overlapping if there existed a CFG node in which both of the slots could possibly be active. That is overly conservative and caused stack blowups in Rust programs. Instead, check whether there is a single CFG node in which both of the slots are possibly active *together*. Fixes PR32488. Patch by Ariel Ben-Yehuda <ariel.byd@gmail.com> Reviewers: thanm, nagisa, llvm-commits, efriedma, rnk Reviewed By: thanm Subscribers: dotdash Differential Revision: https://reviews.llvm.org/D31583 llvm-svn: 305193
* [DAG] add helper to bind memop chains; NFCISanjay Patel2017-06-124-49/+23
| | | | | | | | | | This step is just intended to reduce code duplication rather than change any functionality. A follow-up would be to replace PPCTargetLowering::spliceIntoChain() usage with this new helper. Differential Revision: https://reviews.llvm.org/D33649 llvm-svn: 305192
* [InstCombine] lshr (sext iM X to iN), N-M --> zext (ashr X, min(N-M, M-1)) to iNSanjay Patel2017-06-121-4/+10
| | | | | | | | | | | | | | | | | | | This is a follow-up to https://reviews.llvm.org/D33879 / https://reviews.llvm.org/rL304939 , and was discussed in https://reviews.llvm.org/D33338. We prefer this form because a narrower shift may be cheaper, and we can more easily fold a zext than a sext. http://rise4fun.com/Alive/slVe Name: shz %s = sext i8 %x to i12 %r = lshr i12 %s, 4 => %a = ashr i8 %x, 4 %r = zext i8 %a to i12 llvm-svn: 305190
* Const correctness for TTI::getRegisterBitWidthDaniel Neilson2017-06-1210-10/+10
| | | | | | | | | | | | | | Summary: The method TargetTransformInfo::getRegisterBitWidth() is declared const, but the type erasing implementation classes (TargetTransformInfo::Concept & TargetTransformInfo::Model) that were introduced by Chandler in https://reviews.llvm.org/D7293 do not have the method declared const. This is an NFC to tidy up the const consistency between TTI and its implementation. Reviewers: chandlerc, rnk, reames Reviewed By: reames Subscribers: reames, jfb, arsenm, dschuff, nemanjai, nhaehnle, javed.absar, sbc100, jgravelle-google, llvm-commits Differential Revision: https://reviews.llvm.org/D33903 llvm-svn: 305189
* [X86][SSE] Change memop fragment to inherit from vec128load with local ↵Simon Pilgrim2017-06-121-8/+4
| | | | | | | | | | | | alignment controls First possible step towards merging SSE/AVX memory folding pattern fragments. Also allows us to remove the duplicate non-temporal load logic. Differential Revision: https://reviews.llvm.org/D33902 llvm-svn: 305184
* [AVX-512] Add VPCONFLICT and VPLZCNT to load folding tables.Craig Topper2017-06-121-0/+36
| | | | llvm-svn: 305180
* Address http://bugs.llvm.org/pr32207 by making BannerPrinted local to ↵Yaron Keren2017-06-121-4/+4
| | | | | | | | | | runOnSCC and skipping banner for function declarations. Reviewed By: Mehdi AMINI Differential Revision: https://reviews.llvm.org/D34086 llvm-svn: 305179
* [x86] use vperm2f128 rather than vinsertf128 when there's a chance to fold a ↵Sanjay Patel2017-06-111-9/+13
| | | | | | | | | | | | | | | | | | | | | 32-byte load I was looking closer at the x86 test diffs in D33866, and the first change seems like it shouldn't happen in the first place. So this patch will resolve that. Using Agner's tables and AMD docs, vperm2f128 and vinsertf128 have identical timing for any given CPU model, so we should be able to interchange those without affecting perf. But as we can see in some of the diffs here, using vperm2f128 allows load folding, so we should take that opportunity to reduce code size and register pressure. A secondary advantage is making AVX1 and AVX2 codegen more similar. Given that vperm2f128 was introduced with AVX1, we should be selecting it in all of the same situations that we would with AVX2. If there's some reason that an AVX1 CPU would not want to use this instruction, that should be fixed up in a later pass. Differential Revision: https://reviews.llvm.org/D33938 llvm-svn: 305171
* [PartialInlining] Support shrinkwrap life_range markersXinliang David Li2017-06-111-16/+203
| | | | | | Differential Revision: http://reviews.llvm.org/D33847 llvm-svn: 305170
* Fix unused variable warning on non-debug EXPENSIVE_CHECKS buildsSimon Pilgrim2017-06-111-1/+2
| | | | llvm-svn: 305163
* [DAGCombine] Make sure we check the ResNo from UADDO before combiningAmaury Sechet2017-06-111-1/+2
| | | | | | | | | | | | Summary: UADDO has 2 result, and one must check the result no before doing any kind of combine. Without it, the transform is invalid. Reviewers: joerg Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34088 llvm-svn: 305162
* [MemorySSA] preservesAll() implies preserves<MemorySSA>(). NFCI.Davide Italiano2017-06-111-1/+0
| | | | llvm-svn: 305160
* dwarfdump: Handle relocs to zlib (.zdebug*) compressed sectionsDavid Blaikie2017-06-101-1/+1
| | | | llvm-svn: 305152
* Fix a ubsan failure introduced by r305092Vedant Kumar2017-06-101-2/+2
| | | | | | | | | | | | lib/Object/WindowsResource.cpp:578:3: runtime error: store to misaligned address 0x7fa09aedebbe for type 'unsigned int', which requires 4 byte alignment 0x7fa09aedebbe: note: pointer points here 00 00 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ^ llvm-svn: 305149
* [EarlyCSE] Add option to use MemorySSA for function simplification run of ↵Geoff Berry2017-06-102-2/+10
| | | | | | | | | | | | | | | | EarlyCSE (off by default). Summary: Use MemorySSA for memory dependency checking in the EarlyCSE pass at the start of the function simplification portion of the pipeline. We rely on the fact that GVNHoist runs just after this pass of EarlyCSE to amortize the MemorySSA construction cost since GVNHoist uses MemorySSA and EarlyCSE preserves it. This is turned off by default. A follow-up change will turn it on to allow for easier reversion in case it breaks something. llvm-svn: 305146
* Added llvm_unreachable as ReportError cannot be specified as noreturn.Galina Kistanova2017-06-101-0/+1
| | | | llvm-svn: 305143
* AMDGPU : Fix ISA Version Definitions.Wei Ding2017-06-104-27/+99
| | | | | | Differential Revision: http://reviews.llvm.org/D28531 llvm-svn: 305137
* [InstSimplify] Don't constant fold or DCE calls that are marked nobuiltinAndrew Kaylor2017-06-097-24/+36
| | | | | | Differential Revision: https://reviews.llvm.org/D33737 llvm-svn: 305132
* [CGP] add a reference to DataLayout in MemCmpExpansion; NFCISanjay Patel2017-06-091-20/+22
| | | | | | | | We're currently passing endian-ness around as a param (and not uniformly), so this eliminates the need for that. I'd like to add a constant fold call too, and that requires a DL. llvm-svn: 305129
* [AArch64] Add fallback in FastISel fp16 conversionsI-Jui (Ray) Sung2017-06-091-1/+5
| | | | | | | | | | | | | | | | | Summary: - Fix assertion failures on F16 to/from int types in FastISel by falling back to regular ISel - Add a testcase of various conversion cases with FastISel (-O0) Reviewers: kristof.beyls, jmolloy, SjoerdMeijer Reviewed By: SjoerdMeijer Subscribers: SjoerdMeijer, llvm-commits, srhines, pirama, aemerson, rengolin, javed.absar, kristof.beyls Differential Revision: https://reviews.llvm.org/D33734 llvm-svn: 305127
* [LVI] Fix spelling error in comment. NFCCraig Topper2017-06-091-1/+1
| | | | llvm-svn: 305115
* [LVI] Const correct and rename the LVILatticeVal parameter to ↵Craig Topper2017-06-091-9/+8
| | | | | | | | getPredicateResult. NFC Previously it was non-const reference named Result which would tend to make someone think that it was an outparam when really its an input. llvm-svn: 305114
* [pdb] Support CoffSymbolRVA debug subsection.Zachary Turner2017-06-094-0/+93
| | | | llvm-svn: 305108
* [SROA] Fix APInt size when load/store have different address spaceYaxun Liu2017-06-091-7/+12
| | | | | | | | | | | | | | | Currently there is a bug in SROA::presplitLoadsAndStores which causes assertion in GEPOperator::accumulateConstantOffset. Basically it does not consider the situation that the pointer operand of load or store may be in a non-zero address space and its size may be different from the size of a pointer in address space 0. This patch fixes assertion when compiling Blender Cycles kernels for amdgpu backend. Diffferential Revision: https://reviews.llvm.org/D33298 llvm-svn: 305107
* [Sink] Fix predicate in legality checkKeno Fischer2017-06-091-1/+1
| | | | | | | | | | | | | | | | | | Summary: isSafeToSpeculativelyExecute is the wrong predicate to use here. All that checks for is whether it is safe to hoist a value due to unaligned/un-dereferencable accesses. However, not only are we doing sinking rather than hoisting, our concern is that the location we're loading from may have been modified. Instead forbid sinking any load across a critical edge. Reviewers: majnemer Subscribers: davide, llvm-commits Differential Revision: https://reviews.llvm.org/D33179 llvm-svn: 305102
* [AMDGPU] Add intrinsics for alignbit and alignbyte instructionsStanislav Mekhanoshin2017-06-091-2/+2
| | | | | | Differential Revision: https://reviews.llvm.org/D34046 llvm-svn: 305098
* Allow VarStreamArray to use stateful extractors.Zachary Turner2017-06-095-16/+15
| | | | | | | | | | | Previously extractors tried to be stateless with any additional context information needed in order to parse items being passed in via the extraction method. This led to quite cumbersome implementation challenges and awkwardness of use. This patch brings back support for stateful extractors, making the implementation and usage simpler. llvm-svn: 305093
* Implement COFF emission for parsed Windows Resource ( .res) files.Eric Beckmann2017-06-091-9/+507
| | | | | | | | | | | | Summary: Add the WindowsResourceCOFFWriter class for producing the final COFF after all parsing is done. Reviewers: hiraditya!, zturner, ruiu Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34020 llvm-svn: 305092
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