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* [LVI] NFC. Fix a typo getValueFromFromCondition -> getValueFromConditionArtur Pilipenko2016-08-021-11/+9
| | | | llvm-svn: 277466
* [CodeGen] Generalize MachineFunctionProperties::print comma handling.Ahmed Bougacha2016-08-021-2/+7
| | | | | | | | This is only used for debug prints, but the previous hardcoded ", " caused it to be printed unnecessarily when OnlySet, and is annoying when adding new properties. llvm-svn: 277465
* [LV] Untangle the concepts of uniform and scalarMatthew Simpson2016-08-021-63/+107
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch refactors the logic in collectLoopUniforms and collectValuesToIgnore, untangling the concepts of "uniform" and "scalar". It adds isScalarAfterVectorization along side isUniformAfterVectorization to distinguish the two. Known scalar values include those that are uniform, getelementptr instructions that won't be vectorized, and induction variables and induction variable update instructions whose users are all known to be scalar. This patch includes the following functional changes: - In collectLoopUniforms, we mark uniform the pointer operands of interleaved accesses. Although non-consecutive, these pointers are treated like consecutive pointers during vectorization. - In collectValuesToIgnore, we insert a value into VecValuesToIgnore if it isScalarAfterVectorization rather than isUniformAfterVectorization. This differs from the previous functionaly in that we now add getelementptr instructions that will not be vectorized into VecValuesToIgnore. This patch also removes the ValuesNotWidened set used for induction variable scalarization since, after the above changes, it is now equivalent to isScalarAfterVectorization. Differential Revision: https://reviews.llvm.org/D22867 llvm-svn: 277460
* [MC] Fix handling of end-of-line preprocessor commentsNirav Dave2016-08-021-0/+34
| | | | | | | | | | | | | | | | | | | | | | Recommitting after fixing test. When parsing assembly where the line comment syntax is not hash, the lexer cannot distinguish between hash's that start a hash line comment and one that is part of an assembly statement and must be distinguished during parsing. Previously, this was incompletely handled by not checking for EndOfStatement at the end of statements and interpreting hash prefixed statements as comments. Change EndOfStatement Parsing to check for Hash comments and reintroduce Hash statement parsing to catch previously handled cases. Reviewers: rnk, majnemer Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D23017 llvm-svn: 277459
* [ARM] Improve smul* and smla* isel for Thumb2Sam Parker2016-08-023-25/+41
| | | | | | | | | | | | | | Added (sra (shl x, 16), 16) to the sext_16_node PatLeaf for ARM to simplify some pattern matching. This has allowed several patterns for smul* and smla* to be removed as well as making it easier to add the matching for the corresponding instructions for Thumb2 targets. Also added two Pat classes that are predicated on Thumb2 with the hasDSP flag and UseMulOps flags. Updated the smul codegen test with the wider range of patterns plus the ThumbV6 and ThumbV6T2 targets. Differential Revision: https://reviews.llvm.org/D22908 llvm-svn: 277450
* HexagonVectorPrint.cpp: Fix r277370. Don't use getInstrVecReg() in the ↵NAKAMURA Takumi2016-08-021-1/+2
| | | | | | expression of assert(). It has side effects. llvm-svn: 277448
* [GlobalISel] Don't RegBankSelect target-specific instructions.Ahmed Bougacha2016-08-021-1/+7
| | | | | | They don't have types and should be using register classes. llvm-svn: 277447
* [GlobalISel] Don't legalize non-generic instructions.Ahmed Bougacha2016-08-021-0/+6
| | | | | | They don't have types and should be legal. llvm-svn: 277446
* [GlobalISel] Const-ify MachineInstrs passed to MachineLegalizer.Ahmed Bougacha2016-08-021-2/+2
| | | | llvm-svn: 277445
* [mips] Update the P5600 scheduler for isComplete = 1Simon Dardis2016-08-023-32/+224
| | | | | | | | | | | These changes update the schedule model for the P5600 and includes the rest of the MSA and MIPS32R5 instruction sets. Reviewers: dsanders, vkalintris Differential Revision: https://reviews.llvm.org/D21835 llvm-svn: 277441
* [ARM] Some saturation instructions not DSP-onlyBernard Ogden2016-08-023-7/+7
| | | | | | | | | | | | | | | | | | | | | Summary: Commit 276701 requires that targets have the DSP extensions to use certain saturating instructions. This requires some corrections. For ARM ISA the instructions in question are available in all v6* architectures. For Thumb2, the instructions in question are available from v6T2. SSAT and USAT are part of the base architecture while SSAT16 and USAT16 require the DSP extensions. Reviewers: rengolin Subscribers: aemerson, rengolin, samparker, llvm-commits Differential Revision: https://reviews.llvm.org/D23010 llvm-svn: 277439
* [LoadStoreVectorizer] Don't use a linear walk for an existence check in a ↵Benjamin Kramer2016-08-021-1/+1
| | | | | | | | SmallPtrSet No functionality change intended. llvm-svn: 277436
* [AVX512] Don't use i128 masked gather/scatter/load/store. Do more accurately ↵Igor Breger2016-08-021-3/+3
| | | | | | | | dataWidth check. Differential Revision: http://reviews.llvm.org/D23055 llvm-svn: 277435
* AArch64: Assert on branch displacement bitsMatt Arsenault2016-08-021-0/+7
| | | | llvm-svn: 277434
* AArch64: Consolidate branch inversion logicMatt Arsenault2016-08-021-20/+22
| | | | llvm-svn: 277431
* AArch64: BranchRelaxtion cleanupsMatt Arsenault2016-08-023-120/+178
| | | | | | Move some logic into TII. llvm-svn: 277430
* AArch64: Fix end iterator dereferenceMatt Arsenault2016-08-021-51/+57
| | | | | | | Not all blocks have terminators. I'm not sure how this wasn't crashing before. llvm-svn: 277427
* [AVX-512] Mark VADDPS/PD and VMULPS/PD as commutable. This necessitated ↵Craig Topper2016-08-021-27/+43
| | | | | | adding itineraries to all of the instructions that use the avx512_fp_binop_p class. llvm-svn: 277422
* [AVX-512] Use SSE_MUL_ITINS_S/SSE_DIV_ITINS_S for the scalar FMUL/FDIV ↵Craig Topper2016-08-021-2/+2
| | | | | | instructions to match SSE/AVX. llvm-svn: 277421
* [AVX-512] Correct ExeDomain for many AVX-512 instructions.Craig Topper2016-08-022-13/+32
| | | | llvm-svn: 277416
* Minor code cleanups. NFC.Junmo Park2016-08-021-2/+2
| | | | llvm-svn: 277415
* [Verifier] Disallow illegal ptr<->int casts in ConstantExprsSanjoy Das2016-08-021-8/+22
| | | | | | | This should have been a part of rL277085, but I hadn't considered this case. llvm-svn: 277413
* Revert r277408 and r277407Bruno Cardoso Lopes2016-08-021-34/+0
| | | | | | | | | | Revert r277408 "Fix test from rL277407." Revert r277407 "[MC] Fix handling of end-of-line preprocessor comments" This is currently breaking: http://lab.llvm.org:8080/green/job/clang-stage1-configure-RA_check/20731 llvm-svn: 277412
* CodeExtractor : Add ability to preserve profile data.Sean Silva2016-08-025-20/+142
| | | | | | | | | | | Added ability to estimate the entry count of the extracted function and the branch probabilities of the exit branches. Patch by River Riddle! Differential Revision: https://reviews.llvm.org/D22744 llvm-svn: 277411
* Tie the Verifier class to a Module; NFCISanjoy Das2016-08-021-72/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This commit changes the Verifier class to accept a Module via the constructor to make it obvious that a specific instance of the class is only intended to work with a specific module. The `updateModule` setter (despite being private) was making this fact less transparent. There are fields in the `Verifier` class like `DeoptimizeDeclarations` and `GlobalValueVisited` which are module specific, so a given Verifier instance will not in fact work across multiple modules today. This change just makes that more obvious. The motivation is to make it easy to get to the datalayout of the module unambiguously. That is required to verify that `inttoptr` and `ptrtoint` constant expressions are well typed in the face of non-integral pointer types. Reviewers: dexonsmith, bkramer, majnemer, chandlerc Subscribers: mehdi_amini, mcrosier, llvm-commits Differential Revision: https://reviews.llvm.org/D23040 llvm-svn: 277409
* [MC] Fix handling of end-of-line preprocessor commentsNirav Dave2016-08-021-0/+34
| | | | | | | | | | | | | | | | | | | | | Summary: When parsing assembly where the line comment syntax is not hash, the lexer cannot distinguish between hash's that start a hash line comment and one that is part of an assembly statement and must be distinguished during parsing. Previously, this was incompletely handled by not checking for EndOfStatement at the end of statements and interpreting hash prefixed statements as comments. Change EndOfStatement Parsing to check for Hash comments and reintroduce Hash statement parsing to catch previously handled cases. Reviewers: rnk, majnemer Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D23017 llvm-svn: 277407
* Revert r276895 "[MC][X86] Fix Intel Operand assembly parsing for .set ids"Hans Wennborg2016-08-011-79/+115
| | | | | | This caused PR28805. Adding a regression test. llvm-svn: 277402
* [ADT] NFC: Generalize GraphTraits requirement of "NodeType *" in interfaces ↵Tim Shen2016-08-012-0/+2
| | | | | | | | | | | | | | to "NodeRef", and migrate SCCIterator.h to use NodeRef Summary: By generalize the interface, users are able to inject more flexible Node token into the algorithm, for example, a pair of vector<Node>* and index integer. Currently I only migrated SCCIterator to use NodeRef, but more is coming. It's a NFC. Reviewers: dblaikie, chandlerc Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D22937 llvm-svn: 277399
* [WebAssembly] Support CFI for WebAssembly targetDerek Schuff2016-08-015-28/+96
| | | | | | | | | | | | | | | Summary: This patch implements CFI for WebAssembly. It modifies the LowerTypeTest pass to pre-assign table indexes to functions that are called indirectly, and lowers type checks to test against the appropriate table indexes. It also modifies the WebAssembly backend to support a special ".indidx" assembly directive that propagates the table index assignments out to the linker. Patch by Dominic Chen Differential Revision: https://reviews.llvm.org/D21768 llvm-svn: 277398
* [Orc] Fix common symbol support in ORC.Lang Hames2016-08-011-2/+8
| | | | | | | | | | | | | Common symbol support in ORC was broken in r270716 when the symbol resolution rules in RuntimeDyld were changed. With the switch to lazily materialized symbols in r277386, common symbols can be supported by having RuntimeDyld::emitCommonSymbols search for (but not materialize!) definitions elsewhere in the logical dylib. This patch adds the 'Common' flag to JITSymbolFlags, and the necessary check to RuntimeDyld::emitCommonSymbols. llvm-svn: 277397
* Simplify some code found when it was moved in r277177David Blaikie2016-08-011-10/+10
| | | | llvm-svn: 277394
* [PM] Port SpeculativeExecution to the new PMMichael Kuperstein2016-08-014-40/+60
| | | | | | Differential Revision: https://reviews.llvm.org/D23033 llvm-svn: 277393
* [WebAssembly] Add asm.js-style exception handling supportDerek Schuff2016-08-014-0/+477
| | | | | | | | | | | | | | | | | | Summary: This patch includes asm.js-style exception handling support for WebAssembly. The WebAssembly MVP does not have any support for unwinding or non-local control flow. In order to support C++ exceptions, emscripten currently uses JavaScript exceptions along with some support code (written in JavaScript) that is bundled by emscripten with the generated code. This scheme lowers exception-related instructions for wasm such that wasm modules can be compatible with emscripten's existing scheme and share the support code. Patch by Heejin Ahn Differential Revision: https://reviews.llvm.org/D22958 llvm-svn: 277391
* [msf] Teach LLVM to parse a split Fpm.Zachary Turner2016-08-011-8/+35
| | | | | | | | | | | | | | | | | | | | The FPM is split at regular intervals across the MSF file, as the MS code suggests. It turns out that the value of the interval is precisely the block size. If the block size is 4096, then there are two Fpm pages every 4096 blocks. So here we teach the PDBFile class to parse a split FPM, and also add more options when dumping the FPM to display some additional information such as orphaned pages (pages which the FPM says are allocated, but which nothing appears to use), use after free pages (pages which the FPM says are not allocated, but which are referenced by a stream), and multiple use pages (pages which the FPM says are allocated but are used more than once). Reviewed By: ruiu Differential Revision: https://reviews.llvm.org/D23022 llvm-svn: 277388
* [ExecutionEngine][MCJIT][Orc] Replace RuntimeDyld::SymbolInfo with JITSymbol.Lang Hames2016-08-0122-89/+86
| | | | | | | | | | | | | | | | This patch replaces RuntimeDyld::SymbolInfo with JITSymbol: A symbol class that is capable of lazy materialization (i.e. the symbol definition needn't be emitted until the address is requested). This can be used to support common and weak symbols in the JIT (though this is not implemented in this patch). For consistency, RuntimeDyld::SymbolResolver is renamed to JITSymbolResolver. For space efficiency a new class, JITEvaluatedSymbol, is introduced that behaves like the old RuntimeDyld::SymbolInfo - i.e. it is just a pair of an address and symbol flags. Instances of JITEvaluatedSymbol can be used in symbol-tables to avoid paying the space cost of the materializer. llvm-svn: 277386
* [Hexagon] Tidy up some code, NFC: reapply r277372 with a fixKrzysztof Parzyszek2016-08-012-192/+175
| | | | llvm-svn: 277383
* [Profile] IR profiling minor cleanup /nfcXinliang David Li2016-08-011-5/+15
| | | | | | Differential Revision: http://reviews.llvm.org/D22995 llvm-svn: 277379
* [LV] Move isGatherOrScatterLegal into LoopVectorizationLegality (NFC)Matthew Simpson2016-08-011-15/+13
| | | | llvm-svn: 277376
* [LV] Use getPointerOperand helper where appropriate (NFC)Matthew Simpson2016-08-011-27/+21
| | | | llvm-svn: 277375
* Revert r277372, it is causing buildbot failuresKrzysztof Parzyszek2016-08-012-173/+186
| | | | llvm-svn: 277374
* [Hexagon] Tidy up some code, NFCKrzysztof Parzyszek2016-08-012-186/+173
| | | | llvm-svn: 277372
* [DAGCombine] Make sext(setcc) combine respect getBooleanContentsMichael Kuperstein2016-08-012-9/+33
| | | | | | | | | | | We used to combine "sext(setcc x, y, cc) -> (select (setcc x, y, cc), -1, 0)" Instead, we should combine to (select (setcc x, y, cc), T, 0) where the value of T is 1 or -1, depending on the type of the setcc, and getBooleanContents() for the type if it is not i1. This fixes PR28504. llvm-svn: 277371
* [Hexagon] Generate vector printing instructionsRon Lieberman2016-08-013-0/+188
| | | | llvm-svn: 277370
* [CFLAA] Remove modref queries from CFLAA.George Burgess IV2016-08-012-188/+0
| | | | | | | | | | | | | | | | | | | | As it turns out, modref queries are broken with CFLAA. Specifically, the data source we were using for determining modref behaviors explicitly ignores operations on non-pointer values. So, it wouldn't note e.g. storing an i32 to an i32* (or loading an i64 from an i64*). It also ignores external function calls, rather than acting conservatively for them. (N.B. These operations, where necessary, *are* tracked by CFLAA; we just use a different mechanism to do so. Said mechanism is relatively imprecise, so it's unlikely that we can provide reasonably good modref answers with it as implemented.) Patch by Jia Chen. Differential Revision: https://reviews.llvm.org/D22978 llvm-svn: 277366
* [AArch64] Add support for Samsung Exynos M2 (NFC).Evandro Menezes2016-08-012-0/+7
| | | | llvm-svn: 277364
* [CFLAA] Make CFLAnders more conservative with new Values.George Burgess IV2016-08-011-4/+7
| | | | | | | | | | | | | | Currently, CFLAnders assumes that values it hasn't seen don't alias anything. This patch fixes that. Given that the only way for this to happen is to query AA, rely on specific transformations happening, then query AA again (looking for a specific set of queries), lit testing is a bit difficult. If someone really wants a test, I'm happy to add one. Patch by Jia Chen. Differential Revision: https://reviews.llvm.org/D22981 llvm-svn: 277362
* [Verifier] Resume instructions can only be in functions w/ a personalityDavid Majnemer2016-08-011-0/+16
| | | | | | This fixes PR28799. llvm-svn: 277360
* Replace MachineInstr* with MachineInstr& in TargetInstrInfo, NFCKrzysztof Parzyszek2016-08-016-40/+40
| | | | | | There were a few cases introduced with the modulo scheduler. llvm-svn: 277358
* [Hexagon] Check for offset overflow when reserving scavenging slotsKrzysztof Parzyszek2016-08-012-2/+16
| | | | | | | | | Scavenging slots were only reserved when pseudo-instruction expansion in frame lowering created new virtual registers. It is possible to still need a scavenging slot even if no virtual registers were created, in cases where the stack is large enough to overflow instruction offsets. llvm-svn: 277355
* [mips][fastisel] Correct argument lowering for (f64, f64, i32) and similar.Daniel Sanders2016-08-011-29/+55
| | | | | | | | | | | | | | | Summary: Allocating an AFGR64 shadows two GPR32's instead of just one. This fixes an LNT regression detected by our internal buildbots. Reviewers: sdardis Subscribers: dsanders, sdardis, llvm-commits Differential Revision: https://reviews.llvm.org/D23012 llvm-svn: 277348
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