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* R600/SI: Define latency for flat instructionsTom Stellard2015-06-111-0/+1
| | | | llvm-svn: 239535
* R600/SI: Move flat instruction defs to CIInstructions.tdTom Stellard2015-06-112-108/+110
| | | | llvm-svn: 239534
* remove function names from comments; NFCSanjay Patel2015-06-111-15/+13
| | | | llvm-svn: 239532
* Fixing MSVC 2013 build error.Aaron Ballman2015-06-111-0/+1
| | | | llvm-svn: 239529
* Recommit "[mips] [IAS] Add support for BNE and BEQ with an immediate ↵Toma Tabacu2015-06-113-2/+72
| | | | | | | | | operand." (r239396). Apparently, Arcanist didn't include some of my local changes in my previous commit attempt. llvm-svn: 239523
* [mips][microMIPS] Implement ERET and ERETNC instructionsZoran Jovanovic2015-06-113-0/+29
| | | | | | http://reviews.llvm.org/D10091 llvm-svn: 239522
* [mips] Change existing uimm10 operand to restrict the accepted immediatesZoran Jovanovic2015-06-112-0/+11
| | | | | | http://reviews.llvm.org/D10312 llvm-svn: 239520
* [LoopVectorize] Revert the enabling of interleaved memory access in Loop ↵Hao Liu2015-06-111-1/+1
| | | | | | Vectorizor, which was wrongly committed in r239514. llvm-svn: 239515
* [AArch64] Match interleaved memory accesses into ldN/stN instructions.Hao Liu2015-06-117-1/+419
| | | | | | | | | | | | | | | | | | | | | | | Add a pass AArch64InterleavedAccess to identify and match interleaved memory accesses. This pass transforms an interleaved load/store into ldN/stN intrinsic. As Loop Vectorizor disables optimization on interleaved accesses by default, this optimization is also disabled by default. To enable it by "-aarch64-interleaved-access-opt=true" E.g. Transform an interleaved load (Factor = 2): %wide.vec = load <8 x i32>, <8 x i32>* %ptr %v0 = shuffle %wide.vec, undef, <0, 2, 4, 6> ; Extract even elements %v1 = shuffle %wide.vec, undef, <1, 3, 5, 7> ; Extract odd elements Into: %ld2 = { <4 x i32>, <4 x i32> } call aarch64.neon.ld2(%ptr) %v0 = extractelement { <4 x i32>, <4 x i32> } %ld2, i32 0 %v1 = extractelement { <4 x i32>, <4 x i32> } %ld2, i32 1 E.g. Transform an interleaved store (Factor = 2): %i.vec = shuffle %v0, %v1, <0, 4, 1, 5, 2, 6, 3, 7> ; Interleaved vec store <8 x i32> %i.vec, <8 x i32>* %ptr Into: %v0 = shuffle %i.vec, undef, <0, 1, 2, 3> %v1 = shuffle %i.vec, undef, <4, 5, 6, 7> call void aarch64.neon.st2(%v0, %v1, %ptr) llvm-svn: 239514
* [LiveVariables] Improve isLiveOut runtime performances. NFC.Arnaud A. de Grandmaison2015-06-111-31/+8
| | | | | | | | | | | | On large goto table based interpreters, where phi nodes can have (very) large fan-ins, isLiveOut exhibited poor performances: about 40% of the full codegen time was spent in PHIElim, sorting MachineBasicBlock addresses. This patch improve the performances for such cases, and does not show compile time regressions on the LNT, at bootstrap (llvm+clang+lldb) or any other benchmarks we have in-house. llvm-svn: 239510
* [X86][SSE] Vectorized i8 and i16 shift operatorsSimon Pilgrim2015-06-112-38/+174
| | | | | | | | | | | | | | | | This patch ensures that SHL/SRL/SRA shifts for i8 and i16 vectors avoid scalarization. It builds on the existing i8 SHL vectorized implementation of moving the shift bits up to the sign bit position and separating the 4, 2 & 1 bit shifts with several improvements: 1 - SSE41 targets can use (v)pblendvb directly with the sign bit instead of performing a comparison to feed into a VSELECT node. 2 - pre-SSE41 targets were masking + comparing with an 0x80 constant - we avoid this by using the fact that a set sign bit means a negative integer which can be compared against zero to then feed into VSELECT, avoiding the need for a constant mask (zero generation is much cheaper). 3 - SRA i8 needs to be unpacked to the upper byte of a i16 so that the i16 psraw instruction can be correctly used for sign extension - we have to do more work than for SHL/SRL but perf tests indicate that this is still beneficial. The i16 implementation is similar but simpler than for i8 - we have to do 8, 4, 2 & 1 bit shifts but less shift masking is involved. SSE41 use of (v)pblendvb requires that the i16 shift amount is splatted to both bytes however. Tested on SSE2, SSE41 and AVX machines. Differential Revision: http://reviews.llvm.org/D9474 llvm-svn: 239509
* [PHIElim] Use ranges and const-ify, NFC.Arnaud A. de Grandmaison2015-06-111-12/+11
| | | | llvm-svn: 239508
* LLVM support for vector quad bit permute and gather instructions through ↵Nemanja Ivanovic2015-06-111-1/+3
| | | | | | | | | | | | | | builtins This patch corresponds to review: http://reviews.llvm.org/D10096 This is the back end portion of the patch related to D10095. The patch adds the instructions and back end intrinsics for: vbpermq vgbbd llvm-svn: 239505
* Revert "Move dllimport name mangling to IR mangler."Reid Kleckner2015-06-116-8/+32
| | | | | | | | | This reverts commit r239437. This broke clang-cl self-hosts. We'd end up calling the __imp_ symbol directly instead of using it to do an indirect function call. llvm-svn: 239502
* Remove MachineModuleInfo::UsedFunctions as it has no users.Pete Cooper2015-06-113-19/+0
| | | | | | | | | | It hasn't been used since r130964. This also removes MachineModuleInfo::isUsedFunction and MachineModuleInfo::AnalyzeModule, both of which were only there to support UsedFunctions. llvm-svn: 239501
* change assert that will never fire to llvm_unreachableSanjay Patel2015-06-101-1/+1
| | | | llvm-svn: 239497
* Stop returning a Use* from allocHungOffUses.Pete Cooper2015-06-102-17/+16
| | | | | | | | | This always just set the User::OperandList which is now set in that method instead of being returned. Reviewed by Duncan Exon Smith. llvm-svn: 239493
* Add User::growHungoffUses and use it to grow the hung off uses. NFC.Pete Cooper2015-06-102-30/+31
| | | | | | | | | | | | | PhiNode, SwitchInst, LandingPad and IndirectBr all had virtually identical logic for growing the hung off uses. Move it to User so that they can all call a single shared implementation. Their destructors were all empty after this change and were deleted. They all have virtual clone_impl methods which can be used as vtable anchors. Reviewed by Duncan Exon Smith. llvm-svn: 239492
* Delete User::dropHungOffUses and move it in to ~User which is the only ↵Pete Cooper2015-06-101-16/+0
| | | | | | | | | | | caller. NFC. Now that the subclasses which care about hung off uses let ~User clean it up, there's no need for a separate method. Just inline it to ~User and delete it. Reviewed by Duncan Exon Smith. llvm-svn: 239491
* Make User track whether a class has 'hung off uses' and delete them in its ↵Pete Cooper2015-06-101-2/+7
| | | | | | | | | | | | | | | | | | | | | destructor. Currently all of the logic for deleting hung off uses, which PHI/switch/etc use, is in their classes. This adds a bit to Value which tracks whether that user had hung off uses, then User can be responsible for clearing them instead of the sub classes. Note, the bit used here was taken from NumOperands which was 30-bits. Given the reduction to 29 bits, and the average User being just over 100 bytes, a single User with 29-bits of num operands would need 50GB of RAM for itself so its reasonable to assume that 29-bits is enough for now. This is a step towards hiding all the hung off uses logic in the User. Reviewed by Duncan Exon Smith. llvm-svn: 239490
* Move the special Phi logic for hung off uses in to User::allocHungOffUses. NFC.Pete Cooper2015-06-102-13/+4
| | | | | | | | | | | | PhiNode's need to allocate space for an array of Use[N] and then BasicBlock*[N]. They had their own allocHungOffUses to handle all of this. This moves the logic in to User::allocHungOffUses and PhiNode passes in a bool to say to allocate the BB* space too. Reviewed by Duncan Exon Smith. llvm-svn: 239489
* ArgumentPromotion: Drop sret attribute on functions that are only called ↵Peter Collingbourne2015-06-102-3/+19
| | | | | | | | | | | | | | | | | | | directly. If the first argument to a function is a 'this' argument and the second has the sret attribute, the ArgumentPromotion pass may promote the 'this' argument to more than one argument, violating the IR constraint that 'sret' may only be applied to the first or second argument. Although this IR constraint is arguably unnecessary, it highlighted the fact that ArgPromotion does not need to preserve this attribute. Dropping the attribute reduces register pressure in the backend by avoiding the register copy required by sret. Because sret implies noalias, we also replace the former with the latter. Differential Revision: http://reviews.llvm.org/D10353 llvm-svn: 239488
* [x86] Add a reassociation optimization to increase ILP via the ↵Sanjay Patel2015-06-103-0/+243
| | | | | | | | | | | | | | | | | | MachineCombiner pass This is a reimplementation of D9780 at the machine instruction level rather than the DAG. Use the MachineCombiner pass to reassociate scalar single-precision AVX additions (just a starting point; see the TODO comments) to increase ILP when it's safe to do so. The code is closely based on the existing MachineCombiner optimization that is implemented for AArch64. This patch should not cause the kind of spilling tragedy that led to the reversion of r236031. Differential Revision: http://reviews.llvm.org/D10321 llvm-svn: 239486
* punctuation policing; NFCSanjay Patel2015-06-101-5/+5
| | | | llvm-svn: 239484
* [WinEH] _except_handlerN uses 0 instead of 1 to indicate catch-allReid Kleckner2015-06-101-6/+4
| | | | | | Our usage of 1 was a holdover from __C_specific_handler. llvm-svn: 239482
* Add new EliminateAvailableExternally module pass, which is performed inTeresa Johnson2015-06-103-0/+109
| | | | | | | | | | | | | | | | O2 compiles just before GlobalDCE, unless we are preparing for LTO. This pass eliminates available externally globals (turning them into declarations), regardless of whether they are dead/unreferenced, since we are guaranteed to have a copy available elsewhere at link time. This enables additional opportunities for GlobalDCE. If we are preparing for LTO (e.g. a -flto -c compile), the pass is not included as we want to preserve available externally functions for possible link time inlining. The FE indicates whether we are doing an -flto compile via the new PrepareForLTO flag on the PassManagerBuilder. llvm-svn: 239480
* [GVN] Set proper debug locations for some instructions created by GVN.Alexey Samsonov2015-06-102-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Determining proper debug locations for instructions created in PHITransAddr is tricky. We use a simple approach here and simply copy debug locations from instructions computing load address to "corresponding" instructions re-creating the address computation in predecessor basic blocks. This may not always be correct, given all the rearrangement and simplification going on, and debug locations may jump around a lot, as the basic blocks we copy locations between may be very far from each other. Still, this would work good in most simple cases (e.g. when chain of address computing instruction is short, or our mapping turns out to be 1-to-1), and we desire to have *some* reasonable debug locations associated with newly inserted instructions. See http://reviews.llvm.org/D10351 review thread for more details. Test Plan: regression test suite Reviewers: spatel, dblaikie Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10351 llvm-svn: 239479
* fix typo in comment; NFCSanjay Patel2015-06-101-1/+1
| | | | llvm-svn: 239478
* [Hexagon] Adding decoders for signed operands and ensuring all signed ↵Colin LeMahieu2015-06-104-331/+361
| | | | | | operand types disassemble correctly. llvm-svn: 239477
* [Hexagon] Make global arrays 'static const'. NFC.Benjamin Kramer2015-06-101-33/+33
| | | | llvm-svn: 239475
* [StatepointLowering] Reuse stack slots across basic blocksIgor Laevsky2015-06-101-66/+115
| | | | | | | | | | | During statepoint lowering we can sometimes avoid spilling of the value if we know that it was already spilled for previous statepoint. We were doing this by checking if incoming statepoint value was lowered into load from stack slot. This was working only in boundaries of one basic block. But instead of looking at the lowered node we can look directly at the llvm-ir value and if it was gc.relocate (or some simple modification of it) look up stack slot for it's derived pointer and reuse stack slot from it. This allows us to look across basic block boundaries. Differential Revision: http://reviews.llvm.org/D10251 llvm-svn: 239472
* Replace string GNU Triples with llvm::Triple in MCSubtargetInfo and ↵Daniel Sanders2015-06-1061-149/+139
| | | | | | | | | | | | | | | | | | create*MCSubtargetInfo(). NFC. Summary: This continues the patch series to eliminate StringRef forms of GNU triples from the internals of LLVM that began in r239036. Reviewers: rafael Reviewed By: rafael Subscribers: rafael, ted, jfb, llvm-commits, rengolin, jholewinski Differential Revision: http://reviews.llvm.org/D10311 llvm-svn: 239467
* Replace string GNU Triples with llvm::Triple in create*MCRelocationInfo(). NFC.Daniel Sanders2015-06-103-7/+6
| | | | | | | | | | | | | | | | Summary: This continues the patch series to eliminate StringRef forms of GNU triples from the internals of LLVM that began in r239036. Reviewers: rafael Reviewed By: rafael Subscribers: rafael, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D10307 llvm-svn: 239465
* Replace string GNU Triples with llvm::Triple in MCAsmBackend subclasses and ↵Daniel Sanders2015-06-1024-97/+94
| | | | | | | | | | | | | | | | | | create*AsmBackend(). NFC. Summary: This continues the patch series to eliminate StringRef forms of GNU triples from the internals of LLVM that began in r239036. Reviewers: echristo, rafael Reviewed By: rafael Subscribers: rafael, llvm-commits, rengolin Differential Revision: http://reviews.llvm.org/D10243 llvm-svn: 239464
* AVX-512: Fixed a bug in comparison of i1 vectors.Elena Demikhovsky2015-06-102-7/+7
| | | | | | | | | cmp eq should give kxnor instruction cmp neq should give kxor https://llvm.org/bugs/show_bug.cgi?id=23631 llvm-svn: 239460
* fix crashAlexei Starovoitov2015-06-101-1/+2
| | | | | | | | | fix segfault by checking for UnknownArch, since getArchTypePrefix() will return nullptr for UnknownArch. This fixes regression caused by r238424. llvm-svn: 239456
* Remove unnecessary conversion from StringRef to std::string and back to ↵Craig Topper2015-06-101-1/+1
| | | | | | StringRef. NFC. llvm-svn: 239455
* [WinEH] Call llvm.stackrestore in __except blocksReid Kleckner2015-06-101-1/+19
| | | | | | | We have to do this manually, the runtime only sets up ebp. Fixes a crash when returning after catching an exception. llvm-svn: 239451
* Remove safeseh debug print and remove extra bracesReid Kleckner2015-06-101-5/+2
| | | | llvm-svn: 239449
* [WinEH] Emit .safeseh directives for all 32-bit exception handlersReid Kleckner2015-06-103-6/+23
| | | | | | | | | | Use a "safeseh" string attribute to do this. You would think we chould just accumulate the set of personalities like we do on dwarf, but this fails to account for the LSDA-loading thunks we use for __CxxFrameHandler3. Each of those needs to make it into .sxdata as well. The string attribute seemed like the most straightforward approach. llvm-svn: 239448
* Fix -Wsign-compare warning in WinException.cppReid Kleckner2015-06-101-1/+2
| | | | llvm-svn: 239445
* Fix warning of comparing different enums. NFCPete Cooper2015-06-091-1/+1
| | | | llvm-svn: 239443
* Revert "Move MCSymbol Value in to the union of Offset and CommonSize."Pete Cooper2015-06-091-4/+0
| | | | | | | | | This reverts commit 2e449ec5bcdf67b52b315b16c2128aaf25d5b73c. This was svn r239440. Its currently failing an ARM test so reverting while I work out what to do next. llvm-svn: 239441
* Move MCSymbol Value in to the union of Offset and CommonSize.Pete Cooper2015-06-091-0/+4
| | | | | | | | | It wasn't possible to have a variable Symbol with offset or 'isCommon' so this just enables better packing of the MCSymbol class. Reviewed by Rafael Espindola. llvm-svn: 239440
* [RegisterScavenger] Fix handling of predicated instructionsTobias Edler von Koch2015-06-091-7/+3
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: The RegisterScavenger explicitly ignores <kill> flags on operands of predicated instructions and therefore assumes that such registers remain live. When it then scavenges such a register, it inserts a spill of this (killed) register. This is invalid code and gets flagged up by the verifier. Nowadays kill flags are set correctly on predicated instructions. This patch makes the Scavenger respect them. The bug has so far only been triggered by an internal pass, so I don't have a test case unfortunately. Fixes PR23119. Reviewers: hfinkel, tobiasvk_caf Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D9039 llvm-svn: 239439
* [BasicBlockUtils] Set debug locations for instructions created in ↵Alexey Samsonov2015-06-092-4/+5
| | | | | | | | | | | | | | SplitBlockPredecessors. Test Plan: regression test suite Reviewers: eugenis, dblaikie Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10343 llvm-svn: 239438
* Move dllimport name mangling to IR mangler.Peter Collingbourne2015-06-096-32/+8
| | | | | | | | This ensures that LTO clients see the correct external symbol name. Differential Revision: http://reviews.llvm.org/D10318 llvm-svn: 239437
* [NVPTX] fix a crash bug in NVPTXFavorNonGenericAddrSpacesJingyue Wu2015-06-091-54/+60
| | | | | | | | | | | | | | | | | | | | | | Summary: We used to assume V->RAUW only modifies the operand list of V's user. However, if V and V's user are Constants, RAUW may replace and invalidate V's user entirely. This patch fixes the above issue by letting the caller replace the operand instead of calling RAUW on Constants. Test Plan: @nested_const_expr and @rauw in access-non-generic.ll Reviewers: broune, jholewinski Reviewed By: broune, jholewinski Subscribers: jholewinski, llvm-commits Differential Revision: http://reviews.llvm.org/D10345 llvm-svn: 239435
* LibDriver, llvm-lib: introduce.Peter Collingbourne2015-06-098-3/+204
| | | | | | | | | | llvm-lib is intended to be a lib.exe compatible utility that also understands bitcode. The implementation lives in a library so that lld can use it to implement /lib. Differential Revision: http://reviews.llvm.org/D10297 llvm-svn: 239434
* [WinEH] Add 32-bit SEH state table emission prototypeReid Kleckner2015-06-097-13/+219
| | | | | | | | | | | | This gets all the handler info through to the asm printer and we can look at the .xdata tables now. I've convinced one small catch-all test case to work, but other than that, it would be a stretch to say this is functional. The state numbering algorithm avoids doing any scope reconstruction as we do for C++ to simplify the implementation. llvm-svn: 239433
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