| Commit message (Collapse) | Author | Age | Files | Lines | ||
|---|---|---|---|---|---|---|
| ... | ||||||
| * | Fix 64-bit immediate patterns. | Akira Hatanaka | 2011-12-07 | 3 | -6/+25 | |
| | | | | | llvm-svn: 146059 | |||||
| * | Nuke inadvertant debugging commit. | Jim Grosbach | 2011-12-07 | 1 | -3/+0 | |
| | | | | | llvm-svn: 146057 | |||||
| * | Darwin assembler improved relocs when w/o subsections_via_symbols. | Jim Grosbach | 2011-12-07 | 2 | -1/+9 | |
| | | | | | | | | | When the file isn't being built with subsections-via-symbols, symbol differences involving non-local symbols can be resolved more aggressively. Needed for gas compatibility. llvm-svn: 146054 | |||||
| * | Remove unneeded semicolon. | Jakub Staszak | 2011-12-07 | 1 | -3/+3 | |
| | | | | | | | Skip two looking up at BlockChain. llvm-svn: 146053 | |||||
| * | Thumb2 alias for long-form pop and friends. | Jim Grosbach | 2011-12-07 | 1 | -0/+12 | |
| | | | | | | | rdar://10542474 llvm-svn: 146046 | |||||
| * | ARM support the .arm and .thumb directives for assembly mode switching. | Jim Grosbach | 2011-12-07 | 1 | -3/+19 | |
| | | | | | llvm-svn: 146042 | |||||
| * | ARM NEON VCLT(register) is a pseudo aliasing VCGT(register). | Jim Grosbach | 2011-12-07 | 1 | -0/+31 | |
| | | | | | llvm-svn: 146039 | |||||
| * | Remove unused include. | Duncan Sands | 2011-12-07 | 1 | -1/+0 | |
| | | | | | llvm-svn: 146037 | |||||
| * | Fix a bunch of SSE/AVX patterns to use proper memop types. In particular, ↵ | Craig Topper | 2011-12-07 | 1 | -68/+46 | |
| | | | | | | | not using integer loads other than v2i64/v4i64 since the others are all promoted. llvm-svn: 146031 | |||||
| * | Adjust the stack by one pointer size for all frameless stacks. | Bill Wendling | 2011-12-07 | 1 | -1/+2 | |
| | | | | | llvm-svn: 146030 | |||||
| * | Fix off-by-one error when encoding the stack size for a frameless stack. | Bill Wendling | 2011-12-07 | 1 | -1/+1 | |
| | | | | | llvm-svn: 146029 | |||||
| * | Add bundle aware API for querying instruction properties and switch the code | Evan Cheng | 2011-12-07 | 67 | -260/+248 | |
| | | | | | | | | | | | | | | | generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. llvm-svn: 146026 | |||||
| * | Adding missing anchor to DATDeltaAlgorithm. | David Blaikie | 2011-12-07 | 1 | -0/+3 | |
| | | | | | llvm-svn: 146025 | |||||
| * | make CR spill and restore 64-bit clean (no functional change), and fix some ↵ | Hal Finkel | 2011-12-07 | 6 | -12/+39 | |
| | | | | | | | other problems found with -verify-machineinstrs llvm-svn: 146024 | |||||
| * | make base register selection used in eliminateFrameIndex 64-bit clean | Hal Finkel | 2011-12-07 | 1 | -8/+13 | |
| | | | | | llvm-svn: 146023 | |||||
| * | set mayStore and mayLoad on CR pseudos | Hal Finkel | 2011-12-07 | 1 | -2/+4 | |
| | | | | | llvm-svn: 146022 | |||||
| * | 64-bit LR8 load should use X11 not R11 | Hal Finkel | 2011-12-07 | 1 | -3/+3 | |
| | | | | | llvm-svn: 146021 | |||||
| * | Eliminate delta argument from AdjustBBOffsetsAfter. | Jakob Stoklund Olesen | 2011-12-07 | 1 | -24/+15 | |
| | | | | | | | | | | The block offset can be computed from the previous block. That is more robust than keeping track of a delta. Eliminate one redundant AdjustBBOffsetsAfter call. llvm-svn: 146018 | |||||
| * | Compute some alignment information for each basic block. | Jakob Stoklund Olesen | 2011-12-07 | 1 | -14/+48 | |
| | | | | | | | These fields are not used for anything yet. llvm-svn: 146017 | |||||
| * | Zap unnecessary isIntDivCheap() check. PR11485. No testcase because this ↵ | Eli Friedman | 2011-12-07 | 1 | -1/+1 | |
| | | | | | | | doesn't affect any in-tree target. llvm-svn: 146015 | |||||
| * | ARM tidy up and remove no longer needed InstAlias definitions. | Jim Grosbach | 2011-12-07 | 3 | -426/+23 | |
| | | | | | | | The TokenAlias handling of data type suffices renders these unnecessary. llvm-svn: 146010 | |||||
| * | Move common expression into a method. | Jakob Stoklund Olesen | 2011-12-07 | 1 | -10/+10 | |
| | | | | | llvm-svn: 146008 | |||||
| * | ARM Implement ARM ARM Table A7-3 via TokenAlias. | Jim Grosbach | 2011-12-07 | 1 | -0/+20 | |
| | | | | | | | | | | Data type suffix aliasing. Previously handled via lots of instruction aliases. Cleanup of those forthcoming. rdar://10435076 llvm-svn: 146007 | |||||
| * | Group BBSizes and BBOffsets into a single vector<BasicBlockInfo>. | Jakob Stoklund Olesen | 2011-12-07 | 1 | -74/+78 | |
| | | | | | | | No functional change is intended. llvm-svn: 146005 | |||||
| * | Add missing check. | Jakob Stoklund Olesen | 2011-12-07 | 1 | -1/+1 | |
| | | | | | llvm-svn: 146004 | |||||
| * | ARM: NEON SHLL instruction immediate operand range checking. | Jim Grosbach | 2011-12-07 | 3 | -11/+90 | |
| | | | | | llvm-svn: 146003 | |||||
| * | Support vector bitcasts in the AsmPrinter. PR11495. | Eli Friedman | 2011-12-07 | 1 | -2/+24 | |
| | | | | | llvm-svn: 146001 | |||||
| * | Add a few moreLocal/Global R_MIPS_GOT related fixups and | Bruno Cardoso Lopes | 2011-12-07 | 8 | -48/+48 | |
| | | | | | | | | | make the addend fixup code a bit more generic Patch by Jack Carter. llvm-svn: 145998 | |||||
| * | Add MachineOperand IsInternalRead flag. | Jakob Stoklund Olesen | 2011-12-07 | 1 | -5/+18 | |
| | | | | | | | | This flag is used when bundling machine instructions. It indicates whether the operand reads a value defined inside or outside its bundle. llvm-svn: 145997 | |||||
| * | Fix an optimization involving EXTRACT_SUBVECTOR in DAGCombine so it behaves ↵ | Eli Friedman | 2011-12-07 | 1 | -13/+17 | |
| | | | | | | | correctly. PR11494. llvm-svn: 145996 | |||||
| * | Remove unneeded type. | Jakub Staszak | 2011-12-07 | 1 | -2/+0 | |
| | | | | | llvm-svn: 145995 | |||||
| * | ARM: Parameterize the immediate operand type for NEON VSHLL. | Jim Grosbach | 2011-12-07 | 1 | -10/+10 | |
| | | | | | | | | No functional change yet. Will be implementing range-checked immediates for better diagnostics and disambiguation of instructions. llvm-svn: 145994 | |||||
| * | - Remove unneeded #includes. | Jakub Staszak | 2011-12-06 | 1 | -25/+4 | |
| | | | | | | | | - Remove unused types/fields. - Add some constantness. llvm-svn: 145993 | |||||
| * | Revert r145971: "Use conservative size estimate for tBR_JTr." | Jakob Stoklund Olesen | 2011-12-06 | 2 | -4/+26 | |
| | | | | | | | This caused more offset errors. llvm-svn: 145980 | |||||
| * | Re-enable compact unwind. It seems to work now. <rdar://problem/10441838> | Bill Wendling | 2011-12-06 | 1 | -4/+1 | |
| | | | | | llvm-svn: 145977 | |||||
| * | Explicitly check for the different SUB instructions. | Bill Wendling | 2011-12-06 | 1 | -5/+2 | |
| | | | | | llvm-svn: 145976 | |||||
| * | First chunk of MachineInstr bundle support. | Evan Cheng | 2011-12-06 | 13 | -40/+119 | |
| | | | | | | | | | | 1. Added opcode BUNDLE 2. Taught MachineInstr class to deal with bundled MIs 3. Changed MachineBasicBlock iterator to skip over bundled MIs; added an iterator to walk all the MIs 4. Taught MachineBasicBlock methods about bundled MIs llvm-svn: 145975 | |||||
| * | Use conservative size estimate for tBR_JTr. | Jakob Stoklund Olesen | 2011-12-06 | 2 | -26/+4 | |
| | | | | | | | | | | | This pseudo-instruction contains a .align directive in its expansion, so the total size may vary by 2 bytes. It is too difficult to accurately keep track of this alignment directive, just use the worst-case size instead. llvm-svn: 145971 | |||||
| * | Remove alignment from deserted constant islands. | Jakob Stoklund Olesen | 2011-12-06 | 1 | -0/+3 | |
| | | | | | | | | | | | | | | | | | ARMConstantIslandPass may sometimes leave empty constant islands behind (it really shouldn't). Remove the alignment from the empty islands so the size calculations are still correct. This should fix the many Thumb1 assembler errors in the nightly test suite. The reduced test case for this problem is way too big. That is to be expected for ARMConstantIslandPass bugs. <rdar://problem/10534709> llvm-svn: 145970 | |||||
| * | Encode the total stack if there isn't a frame. | Bill Wendling | 2011-12-06 | 1 | -2/+3 | |
| | | | | | llvm-svn: 145969 | |||||
| * | * Add a macro to remove a magic number. | Bill Wendling | 2011-12-06 | 1 | -30/+35 | |
| | | | | | | | * Rename variables to reflect what they're actually used for. llvm-svn: 145968 | |||||
| * | Pretty-print basic block alignment. | Jakob Stoklund Olesen | 2011-12-06 | 1 | -2/+6 | |
| | | | | | llvm-svn: 145965 | |||||
| * | add RESTORE_CR and support CR unspills | Hal Finkel | 2011-12-06 | 5 | -28/+89 | |
| | | | | | llvm-svn: 145961 | |||||
| * | remove old FIXME | Hal Finkel | 2011-12-06 | 1 | -1/+0 | |
| | | | | | llvm-svn: 145960 | |||||
| * | Check the correct value for small stack sizes. Also modify some comments. | Bill Wendling | 2011-12-06 | 1 | -5/+8 | |
| | | | | | llvm-svn: 145954 | |||||
| * | For a small sized stack, we encode that value directly with no "stack ↵ | Bill Wendling | 2011-12-06 | 1 | -1/+3 | |
| | | | | | | | adjust" value. llvm-svn: 145952 | |||||
| * | PTX: Continue to fix up the register mess. | Justin Holewinski | 2011-12-06 | 7 | -139/+260 | |
| | | | | | llvm-svn: 145947 | |||||
| * | PTX: Encode registers as unsigned values in the MC asm printer instead of ↵ | Justin Holewinski | 2011-12-06 | 4 | -14/+88 | |
| | | | | | | | using external symbols llvm-svn: 145946 | |||||
| * | use space star instead of star space | Sebastian Pop | 2011-12-06 | 1 | -9/+9 | |
| | | | | | llvm-svn: 145944 | |||||
| * | add missing point at the end of sentences | Sebastian Pop | 2011-12-06 | 1 | -6/+6 | |
| | | | | | llvm-svn: 145943 | |||||

